diff options
| author | Roger Quadros <rogerq@ti.com> | 2013-02-13 06:12:35 -0500 |
|---|---|---|
| committer | Roger Quadros <rogerq@ti.com> | 2013-02-13 06:22:34 -0500 |
| commit | 7f07863ec60f7d3dbeec5aff881ea074db3925ed (patch) | |
| tree | 88dc0b9dd8bf69e8c5154b2d2a3d9ed1962fa829 /include/linux/platform_data | |
| parent | 88b62b915b0b7e25870eb0604ed9a92ba4bfc9f7 (diff) | |
ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3)
Let's have a single platform data structure for the OMAP's High-Speed
USB host subsystem instead of having 3 separate ones i.e. one for
board data, one for USB Host (UHH) module and one for USB-TLL module.
This makes the code much simpler and avoids creating multiple copies of
platform data.
Part 1 touches platform headers
Part 2 touches drivers
Part 3 touches platform data
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'include/linux/platform_data')
| -rw-r--r-- | include/linux/platform_data/usb-omap.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/include/linux/platform_data/usb-omap.h b/include/linux/platform_data/usb-omap.h index ef65b67c56c3..e697c85ad3bc 100644 --- a/include/linux/platform_data/usb-omap.h +++ b/include/linux/platform_data/usb-omap.h | |||
| @@ -55,13 +55,17 @@ struct ohci_hcd_omap_platform_data { | |||
| 55 | }; | 55 | }; |
| 56 | 56 | ||
| 57 | struct usbhs_omap_platform_data { | 57 | struct usbhs_omap_platform_data { |
| 58 | enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; | 58 | enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; |
| 59 | int reset_gpio_port[OMAP3_HS_USB_PORTS]; | ||
| 60 | struct regulator *regulator[OMAP3_HS_USB_PORTS]; | ||
| 59 | 61 | ||
| 60 | struct ehci_hcd_omap_platform_data *ehci_data; | 62 | struct ehci_hcd_omap_platform_data *ehci_data; |
| 61 | struct ohci_hcd_omap_platform_data *ohci_data; | 63 | struct ohci_hcd_omap_platform_data *ohci_data; |
| 62 | 64 | ||
| 63 | /* OMAP3 <= ES2.1 have a single ulpi bypass control bit */ | 65 | /* OMAP3 <= ES2.1 have a single ulpi bypass control bit */ |
| 64 | unsigned single_ulpi_bypass:1; | 66 | unsigned single_ulpi_bypass:1; |
| 67 | unsigned es2_compatibility:1; | ||
| 68 | unsigned phy_reset:1; | ||
| 65 | }; | 69 | }; |
| 66 | 70 | ||
| 67 | /*-------------------------------------------------------------------------*/ | 71 | /*-------------------------------------------------------------------------*/ |
