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authorLinus Torvalds <torvalds@linux-foundation.org>2013-07-02 17:33:21 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-02 17:33:21 -0400
commit0bf6a210a43f7118d858806200127e421649fc4e (patch)
tree9a17d88ebd1b9bc693fba7f39c12123dec96e930 /include/linux/platform_data
parentee1a8d402e7e204d57fb108aa40003b6d1633036 (diff)
parent5c913a9a9772f4b434aaea7328836419287b5d1c (diff)
Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver specific changes from Arnd Bergmann: "These changes are all driver specific and cross over between arm-soc contents and some other subsystem, in these cases cpufreq, crypto, dma, pinctrl, mailbox and usb, and the subsystem owners agreed to have these changes merged through arm-soc. As we proceed to untangle the dependencies between platform code and driver code, the amount of changes in this category is fortunately shrinking, for 3.11 we have 16 branches here and 101 non-merge changesets, the majority of which are for the stedma40 dma engine driver used in the ux500 platform. Cleaning up that code touches multiple subsystems, but gets rid of the dependency in the end. The mailbox code moved out from mach-omap2 to drivers/mailbox is an intermediate step and is still omap specific at the moment. Patches exist to generalize the subsystem and add other drivers with the same API, but those did not make it for 3.11." * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits) crypto: ux500: use dmaengine_submit API crypto: ux500: use dmaengine_prep_slave_sg API crypto: ux500: use dmaengine_device_control API crypto: ux500/crypt: add missing __iomem qualifiers crypto: ux500/hash: add missing static qualifiers crypto: ux500/hash: use readl on iomem addresses dmaengine: ste_dma40: Declare memcpy config as static ARM: ux500: Remove mop500_snowball_ethernet_clock_enable() ARM: ux500: Correct the EN_3v3 regulator's on/off GPIO ARM: ux500: Provide a AB8500 GPIO Device Tree node gpio: rcar: fix gpio_rcar_of_table gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections gpio-rcar: Reference core gpio documentation in the DT bindings clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2 ARM: dts: Update Samsung I2S documentation ARM: dts: add clock provider information for i2s controllers in Exynos5250 ARM: dts: add Exynos audio subsystem clock controller node clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: use #include for all device trees for Samsung pinctrl: s3c24xx: use correct header for chained_irq functions ...
Diffstat (limited to 'include/linux/platform_data')
-rw-r--r--include/linux/platform_data/dma-ste-dma40.h41
-rw-r--r--include/linux/platform_data/mailbox-omap.h58
-rw-r--r--include/linux/platform_data/usb-musb-ux500.h5
3 files changed, 66 insertions, 38 deletions
diff --git a/include/linux/platform_data/dma-ste-dma40.h b/include/linux/platform_data/dma-ste-dma40.h
index 4b781014b0a0..1bb9b1852256 100644
--- a/include/linux/platform_data/dma-ste-dma40.h
+++ b/include/linux/platform_data/dma-ste-dma40.h
@@ -70,23 +70,8 @@ enum stedma40_flow_ctrl {
70 STEDMA40_FLOW_CTRL, 70 STEDMA40_FLOW_CTRL,
71}; 71};
72 72
73enum stedma40_periph_data_width {
74 STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
75 STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
76 STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT,
77 STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
78};
79
80enum stedma40_xfer_dir {
81 STEDMA40_MEM_TO_MEM = 1,
82 STEDMA40_MEM_TO_PERIPH,
83 STEDMA40_PERIPH_TO_MEM,
84 STEDMA40_PERIPH_TO_PERIPH
85};
86
87
88/** 73/**
89 * struct stedma40_chan_cfg - dst/src channel configuration 74 * struct stedma40_half_channel_info - dst/src channel configuration
90 * 75 *
91 * @big_endian: true if the src/dst should be read as big endian 76 * @big_endian: true if the src/dst should be read as big endian
92 * @data_width: Data width of the src/dst hardware 77 * @data_width: Data width of the src/dst hardware
@@ -95,7 +80,7 @@ enum stedma40_xfer_dir {
95 */ 80 */
96struct stedma40_half_channel_info { 81struct stedma40_half_channel_info {
97 bool big_endian; 82 bool big_endian;
98 enum stedma40_periph_data_width data_width; 83 enum dma_slave_buswidth data_width;
99 int psize; 84 int psize;
100 enum stedma40_flow_ctrl flow_ctrl; 85 enum stedma40_flow_ctrl flow_ctrl;
101}; 86};
@@ -109,8 +94,7 @@ struct stedma40_half_channel_info {
109 * version 3+, i.e DB8500v2+ 94 * version 3+, i.e DB8500v2+
110 * @mode: channel mode: physical, logical, or operation 95 * @mode: channel mode: physical, logical, or operation
111 * @mode_opt: options for the chosen channel mode 96 * @mode_opt: options for the chosen channel mode
112 * @src_dev_type: Src device type 97 * @dev_type: src/dst device type (driver uses dir to figure out which)
113 * @dst_dev_type: Dst device type
114 * @src_info: Parameters for dst half channel 98 * @src_info: Parameters for dst half channel
115 * @dst_info: Parameters for dst half channel 99 * @dst_info: Parameters for dst half channel
116 * @use_fixed_channel: if true, use physical channel specified by phy_channel 100 * @use_fixed_channel: if true, use physical channel specified by phy_channel
@@ -121,13 +105,12 @@ struct stedma40_half_channel_info {
121 * 105 *
122 */ 106 */
123struct stedma40_chan_cfg { 107struct stedma40_chan_cfg {
124 enum stedma40_xfer_dir dir; 108 enum dma_transfer_direction dir;
125 bool high_priority; 109 bool high_priority;
126 bool realtime; 110 bool realtime;
127 enum stedma40_mode mode; 111 enum stedma40_mode mode;
128 enum stedma40_mode_opt mode_opt; 112 enum stedma40_mode_opt mode_opt;
129 int src_dev_type; 113 int dev_type;
130 int dst_dev_type;
131 struct stedma40_half_channel_info src_info; 114 struct stedma40_half_channel_info src_info;
132 struct stedma40_half_channel_info dst_info; 115 struct stedma40_half_channel_info dst_info;
133 116
@@ -138,13 +121,8 @@ struct stedma40_chan_cfg {
138/** 121/**
139 * struct stedma40_platform_data - Configuration struct for the dma device. 122 * struct stedma40_platform_data - Configuration struct for the dma device.
140 * 123 *
141 * @dev_len: length of dev_tx and dev_rx
142 * @dev_tx: mapping between destination event line and io address 124 * @dev_tx: mapping between destination event line and io address
143 * @dev_rx: mapping between source event line and io address 125 * @dev_rx: mapping between source event line and io address
144 * @memcpy: list of memcpy event lines
145 * @memcpy_len: length of memcpy
146 * @memcpy_conf_phy: default configuration of physical channel memcpy
147 * @memcpy_conf_log: default configuration of logical channel memcpy
148 * @disabled_channels: A vector, ending with -1, that marks physical channels 126 * @disabled_channels: A vector, ending with -1, that marks physical channels
149 * that are for different reasons not available for the driver. 127 * that are for different reasons not available for the driver.
150 * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW 128 * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW
@@ -154,22 +132,17 @@ struct stedma40_chan_cfg {
154 * @num_of_soft_lli_chans: The number of channels that needs to be configured 132 * @num_of_soft_lli_chans: The number of channels that needs to be configured
155 * to use SoftLLI. 133 * to use SoftLLI.
156 * @use_esram_lcla: flag for mapping the lcla into esram region 134 * @use_esram_lcla: flag for mapping the lcla into esram region
135 * @num_of_memcpy_chans: The number of channels reserved for memcpy.
157 * @num_of_phy_chans: The number of physical channels implemented in HW. 136 * @num_of_phy_chans: The number of physical channels implemented in HW.
158 * 0 means reading the number of channels from DMA HW but this is only valid 137 * 0 means reading the number of channels from DMA HW but this is only valid
159 * for 'multiple of 4' channels, like 8. 138 * for 'multiple of 4' channels, like 8.
160 */ 139 */
161struct stedma40_platform_data { 140struct stedma40_platform_data {
162 u32 dev_len;
163 const dma_addr_t *dev_tx;
164 const dma_addr_t *dev_rx;
165 int *memcpy;
166 u32 memcpy_len;
167 struct stedma40_chan_cfg *memcpy_conf_phy;
168 struct stedma40_chan_cfg *memcpy_conf_log;
169 int disabled_channels[STEDMA40_MAX_PHYS]; 141 int disabled_channels[STEDMA40_MAX_PHYS];
170 int *soft_lli_chans; 142 int *soft_lli_chans;
171 int num_of_soft_lli_chans; 143 int num_of_soft_lli_chans;
172 bool use_esram_lcla; 144 bool use_esram_lcla;
145 int num_of_memcpy_chans;
173 int num_of_phy_chans; 146 int num_of_phy_chans;
174}; 147};
175 148
diff --git a/include/linux/platform_data/mailbox-omap.h b/include/linux/platform_data/mailbox-omap.h
new file mode 100644
index 000000000000..4631dbb4255e
--- /dev/null
+++ b/include/linux/platform_data/mailbox-omap.h
@@ -0,0 +1,58 @@
1/*
2 * mailbox-omap.h
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef _PLAT_MAILBOX_H
17#define _PLAT_MAILBOX_H
18
19/* Interrupt register configuration types */
20#define MBOX_INTR_CFG_TYPE1 (0)
21#define MBOX_INTR_CFG_TYPE2 (1)
22
23/**
24 * struct omap_mbox_dev_info - OMAP mailbox device attribute info
25 * @name: name of the mailbox device
26 * @tx_id: mailbox queue id used for transmitting messages
27 * @rx_id: mailbox queue id on which messages are received
28 * @irq_id: irq identifier number to use from the hwmod data
29 * @usr_id: mailbox user id for identifying the interrupt into
30 * the MPU interrupt controller.
31 */
32struct omap_mbox_dev_info {
33 const char *name;
34 u32 tx_id;
35 u32 rx_id;
36 u32 irq_id;
37 u32 usr_id;
38};
39
40/**
41 * struct omap_mbox_pdata - OMAP mailbox platform data
42 * @intr_type: type of interrupt configuration registers used
43 while programming mailbox queue interrupts
44 * @num_users: number of users (processor devices) that the mailbox
45 * h/w block can interrupt
46 * @num_fifos: number of h/w fifos within the mailbox h/w block
47 * @info_cnt: number of mailbox devices for the platform
48 * @info: array of mailbox device attributes
49 */
50struct omap_mbox_pdata {
51 u32 intr_type;
52 u32 num_users;
53 u32 num_fifos;
54 u32 info_cnt;
55 struct omap_mbox_dev_info *info;
56};
57
58#endif /* _PLAT_MAILBOX_H */
diff --git a/include/linux/platform_data/usb-musb-ux500.h b/include/linux/platform_data/usb-musb-ux500.h
index 4c1cc50a595a..dd9c83ac7de0 100644
--- a/include/linux/platform_data/usb-musb-ux500.h
+++ b/include/linux/platform_data/usb-musb-ux500.h
@@ -9,14 +9,11 @@
9 9
10#include <linux/dmaengine.h> 10#include <linux/dmaengine.h>
11 11
12#define UX500_MUSB_DMA_NUM_RX_CHANNELS 8 12#define UX500_MUSB_DMA_NUM_RX_TX_CHANNELS 8
13#define UX500_MUSB_DMA_NUM_TX_CHANNELS 8
14 13
15struct ux500_musb_board_data { 14struct ux500_musb_board_data {
16 void **dma_rx_param_array; 15 void **dma_rx_param_array;
17 void **dma_tx_param_array; 16 void **dma_tx_param_array;
18 u32 num_rx_channels;
19 u32 num_tx_channels;
20 bool (*dma_filter)(struct dma_chan *chan, void *filter_param); 17 bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
21}; 18};
22 19