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authorJiri Slaby <jirislaby@gmail.com>2007-06-18 04:55:30 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2007-07-11 19:02:10 -0400
commit03966e097db1a3b7aff5d364277f2e66069923df (patch)
tree134d2a492bb39a2ef94167cd30e8314e34c7ac3e /include/linux/pci_ids.h
parentc43eaa02abf3b034a9694dcca5c177ecb6072f89 (diff)
PCI: pci_ids, reorder some entries
pci_ids, reorder some entries Some lines are not vendor sorted, reorder it to comply with the rest of document. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r--include/linux/pci_ids.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 228e0befeda1..0058fb920c74 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -133,6 +133,9 @@
133 133
134/* Vendors and devices. Sort key: vendor first, device next. */ 134/* Vendors and devices. Sort key: vendor first, device next. */
135 135
136#define PCI_VENDOR_ID_TTTECH 0x0357
137#define PCI_DEVICE_ID_TTTECH_MC322 0x000a
138
136#define PCI_VENDOR_ID_DYNALINK 0x0675 139#define PCI_VENDOR_ID_DYNALINK 0x0675
137#define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702 140#define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702
138 141
@@ -1902,6 +1905,8 @@
1902#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521 1905#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521
1903#define PCI_DEVICE_ID_OXSEMI_16PCI952PP 0x9523 1906#define PCI_DEVICE_ID_OXSEMI_16PCI952PP 0x9523
1904 1907
1908#define PCI_VENDOR_ID_CHELSIO 0x1425
1909
1905#define PCI_VENDOR_ID_SAMSUNG 0x144d 1910#define PCI_VENDOR_ID_SAMSUNG 0x144d
1906 1911
1907#define PCI_VENDOR_ID_MYRICOM 0x14c1 1912#define PCI_VENDOR_ID_MYRICOM 0x14c1
@@ -2010,8 +2015,6 @@
2010#define PCI_DEVICE_ID_ENE_720 0x1421 2015#define PCI_DEVICE_ID_ENE_720 0x1421
2011#define PCI_DEVICE_ID_ENE_722 0x1422 2016#define PCI_DEVICE_ID_ENE_722 0x1422
2012 2017
2013#define PCI_VENDOR_ID_CHELSIO 0x1425
2014
2015#define PCI_SUBVENDOR_ID_PERLE 0x155f 2018#define PCI_SUBVENDOR_ID_PERLE 0x155f
2016#define PCI_SUBDEVICE_ID_PCI_RAS4 0xf001 2019#define PCI_SUBDEVICE_ID_PCI_RAS4 0xf001
2017#define PCI_SUBDEVICE_ID_PCI_RAS8 0xf010 2020#define PCI_SUBDEVICE_ID_PCI_RAS8 0xf010
@@ -2035,6 +2038,9 @@
2035#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c 2038#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c
2036#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 2039#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
2037 2040
2041#define PCI_VENDOR_ID_QUICKNET 0x15e2
2042#define PCI_DEVICE_ID_QUICKNET_XJ 0x0500
2043
2038#define PCI_VENDOR_ID_PDC 0x15e9 2044#define PCI_VENDOR_ID_PDC 0x15e9
2039 2045
2040 2046
@@ -2412,13 +2418,7 @@
2412#define PCI_DEVICE_ID_TIGERJET_300 0x0001 2418#define PCI_DEVICE_ID_TIGERJET_300 0x0001
2413#define PCI_DEVICE_ID_TIGERJET_100 0x0002 2419#define PCI_DEVICE_ID_TIGERJET_100 0x0002
2414 2420
2415#define PCI_VENDOR_ID_TTTECH 0x0357
2416#define PCI_DEVICE_ID_TTTECH_MC322 0x000A
2417
2418#define PCI_VENDOR_ID_XILINX_RME 0xea60 2421#define PCI_VENDOR_ID_XILINX_RME 0xea60
2419#define PCI_DEVICE_ID_RME_DIGI32 0x9896 2422#define PCI_DEVICE_ID_RME_DIGI32 0x9896
2420#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897 2423#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897
2421#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898 2424#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898
2422
2423#define PCI_VENDOR_ID_QUICKNET 0x15E2
2424#define PCI_DEVICE_ID_QUICKNET_XJ 0x0500