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authorJiang Liu <jiang.liu@huawei.com>2012-07-24 05:20:05 -0400
committerBjorn Helgaas <bhelgaas@google.com>2012-08-23 11:41:20 -0400
commit8c0d3a02c1309eb6112d2e7c8172e8ceb26ecfca (patch)
tree2fc4d3ef417623384d44b5feb9321dd483408186 /include/linux/pci.h
parentb2ef39be5744d4d3575474444345e71bd95013ba (diff)
PCI: Add accessors for PCI Express Capability
The PCI Express Capability (PCIe spec r3.0, sec 7.8) comes in two versions, v1 and v2. In v1 Capability structures (PCIe spec r1.0 and r1.1), some fields are optional, so the structure size depends on the device type. This patch adds functions to access this capability so drivers don't have to be aware of the differences between v1 and v2. Note that these new functions apply only to the "PCI Express Capability," not to any of the other "PCI Express Extended Capabilities" (AER, VC, ACS, MFVC, etc.) Function pcie_capability_read_word/dword() reads the PCIe Capabilities register and returns the value in the reference parameter "val". If the PCIe Capabilities register is not implemented on the PCIe device, "val" is set to 0. Function pcie_capability_write_word/dword() writes the value to the specified PCIe Capability register. Function pcie_capability_clear_and_set_word/dword() sets and/or clears bits of a PCIe Capability register. [bhelgaas: changelog, drop "pci_" prefixes, don't export pcie_capability_reg_implemented()] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/linux/pci.h')
-rw-r--r--include/linux/pci.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 9807da507e1f..b8667e0548e0 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -816,6 +816,39 @@ static inline int pci_write_config_dword(const struct pci_dev *dev, int where,
816 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); 816 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
817} 817}
818 818
819int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
820int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
821int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
822int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val);
823int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
824 u16 clear, u16 set);
825int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
826 u32 clear, u32 set);
827
828static inline int pcie_capability_set_word(struct pci_dev *dev, int pos,
829 u16 set)
830{
831 return pcie_capability_clear_and_set_word(dev, pos, 0, set);
832}
833
834static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos,
835 u32 set)
836{
837 return pcie_capability_clear_and_set_dword(dev, pos, 0, set);
838}
839
840static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos,
841 u16 clear)
842{
843 return pcie_capability_clear_and_set_word(dev, pos, clear, 0);
844}
845
846static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
847 u32 clear)
848{
849 return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
850}
851
819/* user-space driven config access */ 852/* user-space driven config access */
820int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); 853int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
821int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); 854int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);