diff options
| author | Kyungmin Park <kyungmin.park@samsung.com> | 2005-09-03 02:07:19 -0400 |
|---|---|---|
| committer | Thomas Gleixner <tglx@mtd.linutronix.de> | 2005-11-06 15:19:37 -0500 |
| commit | 52b0eea73de05df33c51ca652e288a3ba1bba03b (patch) | |
| tree | 6ddb928b70458a0137481e434cea416e41ca4bb8 /include/linux/mtd | |
| parent | cd5f6346bc28a41375412b49b290d22ee4e4bbe8 (diff) | |
[PATCH] OneNAND: Sync. Burst Read support
Add OneNAND Sync. Burst Read support
Tested with OMAP platform
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/linux/mtd')
| -rw-r--r-- | include/linux/mtd/onenand.h | 1 | ||||
| -rw-r--r-- | include/linux/mtd/onenand_regs.h | 17 |
2 files changed, 16 insertions, 2 deletions
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index b9a64117d646..c557caa24a6c 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h | |||
| @@ -95,6 +95,7 @@ struct onenand_chip { | |||
| 95 | const unsigned char *buffer, int offset, size_t count); | 95 | const unsigned char *buffer, int offset, size_t count); |
| 96 | unsigned short (*read_word)(void __iomem *addr); | 96 | unsigned short (*read_word)(void __iomem *addr); |
| 97 | void (*write_word)(unsigned short value, void __iomem *addr); | 97 | void (*write_word)(unsigned short value, void __iomem *addr); |
| 98 | void (*mmcontrol)(struct mtd_info *mtd, int sync_read); | ||
| 98 | 99 | ||
| 99 | spinlock_t chip_lock; | 100 | spinlock_t chip_lock; |
| 100 | wait_queue_head_t wq; | 101 | wait_queue_head_t wq; |
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h index 4a2daad7d738..d7832ef8ed63 100644 --- a/include/linux/mtd/onenand_regs.h +++ b/include/linux/mtd/onenand_regs.h | |||
| @@ -121,8 +121,21 @@ | |||
| 121 | * System Configuration 1 Register F221h (R, R/W) | 121 | * System Configuration 1 Register F221h (R, R/W) |
| 122 | */ | 122 | */ |
| 123 | #define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) | 123 | #define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) |
| 124 | #define ONENAND_SYS_CFG1_BRL (1 << 12) | 124 | #define ONENAND_SYS_CFG1_BRL_7 (7 << 12) |
| 125 | #define ONENAND_SYS_CFG1_BL (1 << 9) | 125 | #define ONENAND_SYS_CFG1_BRL_6 (6 << 12) |
| 126 | #define ONENAND_SYS_CFG1_BRL_5 (5 << 12) | ||
| 127 | #define ONENAND_SYS_CFG1_BRL_4 (4 << 12) | ||
| 128 | #define ONENAND_SYS_CFG1_BRL_3 (3 << 12) | ||
| 129 | #define ONENAND_SYS_CFG1_BRL_10 (2 << 12) | ||
| 130 | #define ONENAND_SYS_CFG1_BRL_9 (1 << 12) | ||
| 131 | #define ONENAND_SYS_CFG1_BRL_8 (0 << 12) | ||
| 132 | #define ONENAND_SYS_CFG1_BRL_SHIFT (12) | ||
| 133 | #define ONENAND_SYS_CFG1_BL_32 (4 << 9) | ||
| 134 | #define ONENAND_SYS_CFG1_BL_16 (3 << 9) | ||
| 135 | #define ONENAND_SYS_CFG1_BL_8 (2 << 9) | ||
| 136 | #define ONENAND_SYS_CFG1_BL_4 (1 << 9) | ||
| 137 | #define ONENAND_SYS_CFG1_BL_CONT (0 << 9) | ||
| 138 | #define ONENAND_SYS_CFG1_BL_SHIFT (9) | ||
| 126 | #define ONENAND_SYS_CFG1_NO_ECC (1 << 8) | 139 | #define ONENAND_SYS_CFG1_NO_ECC (1 << 8) |
| 127 | #define ONENAND_SYS_CFG1_RDY (1 << 7) | 140 | #define ONENAND_SYS_CFG1_RDY (1 << 7) |
| 128 | #define ONENAND_SYS_CFG1_INT (1 << 6) | 141 | #define ONENAND_SYS_CFG1_INT (1 << 6) |
