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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /include/linux/mtd
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/bbm.h4
-rw-r--r--include/linux/mtd/blktrans.h3
-rw-r--r--include/linux/mtd/cfi.h7
-rw-r--r--include/linux/mtd/fsmc.h163
-rw-r--r--include/linux/mtd/inftl.h14
-rw-r--r--include/linux/mtd/latch-addr-flash.h29
-rw-r--r--include/linux/mtd/mtd.h43
-rw-r--r--include/linux/mtd/nand.h433
-rw-r--r--include/linux/mtd/nand_bch.h72
-rw-r--r--include/linux/mtd/onenand.h15
-rw-r--r--include/linux/mtd/onenand_regs.h1
-rw-r--r--include/linux/mtd/partitions.h23
-rw-r--r--include/linux/mtd/physmap.h9
-rw-r--r--include/linux/mtd/super.h5
-rw-r--r--include/linux/mtd/ubi.h26
-rw-r--r--include/linux/mtd/xip.h2
16 files changed, 647 insertions, 202 deletions
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index 7fa20beb2ab9..57cc0e63714f 100644
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -84,7 +84,7 @@ struct nand_bbt_descr {
84#define NAND_BBT_PERCHIP 0x00000080 84#define NAND_BBT_PERCHIP 0x00000080
85/* bbt has a version counter at offset veroffs */ 85/* bbt has a version counter at offset veroffs */
86#define NAND_BBT_VERSION 0x00000100 86#define NAND_BBT_VERSION 0x00000100
87/* Create a bbt if none axists */ 87/* Create a bbt if none exists */
88#define NAND_BBT_CREATE 0x00000200 88#define NAND_BBT_CREATE 0x00000200
89/* Search good / bad pattern through all pages of a block */ 89/* Search good / bad pattern through all pages of a block */
90#define NAND_BBT_SCANALLPAGES 0x00000400 90#define NAND_BBT_SCANALLPAGES 0x00000400
@@ -102,6 +102,8 @@ struct nand_bbt_descr {
102#define NAND_BBT_SCANBYTE1AND6 0x00100000 102#define NAND_BBT_SCANBYTE1AND6 0x00100000
103/* The nand_bbt_descr was created dynamicaly and must be freed */ 103/* The nand_bbt_descr was created dynamicaly and must be freed */
104#define NAND_BBT_DYNAMICSTRUCT 0x00200000 104#define NAND_BBT_DYNAMICSTRUCT 0x00200000
105/* The bad block table does not OOB for marker */
106#define NAND_BBT_NO_OOB 0x00400000
105 107
106/* The maximum number of blocks to scan for a bbt */ 108/* The maximum number of blocks to scan for a bbt */
107#define NAND_BBT_SCAN_MAXBLOCKS 4 109#define NAND_BBT_SCAN_MAXBLOCKS 4
diff --git a/include/linux/mtd/blktrans.h b/include/linux/mtd/blktrans.h
index 26529ebd59cc..1bbd9f289245 100644
--- a/include/linux/mtd/blktrans.h
+++ b/include/linux/mtd/blktrans.h
@@ -36,6 +36,7 @@ struct mtd_blktrans_dev {
36 struct mtd_info *mtd; 36 struct mtd_info *mtd;
37 struct mutex lock; 37 struct mutex lock;
38 int devnum; 38 int devnum;
39 bool bg_stop;
39 unsigned long size; 40 unsigned long size;
40 int readonly; 41 int readonly;
41 int open; 42 int open;
@@ -62,6 +63,7 @@ struct mtd_blktrans_ops {
62 unsigned long block, char *buffer); 63 unsigned long block, char *buffer);
63 int (*discard)(struct mtd_blktrans_dev *dev, 64 int (*discard)(struct mtd_blktrans_dev *dev,
64 unsigned long block, unsigned nr_blocks); 65 unsigned long block, unsigned nr_blocks);
66 void (*background)(struct mtd_blktrans_dev *dev);
65 67
66 /* Block layer ioctls */ 68 /* Block layer ioctls */
67 int (*getgeo)(struct mtd_blktrans_dev *dev, struct hd_geometry *geo); 69 int (*getgeo)(struct mtd_blktrans_dev *dev, struct hd_geometry *geo);
@@ -85,6 +87,7 @@ extern int register_mtd_blktrans(struct mtd_blktrans_ops *tr);
85extern int deregister_mtd_blktrans(struct mtd_blktrans_ops *tr); 87extern int deregister_mtd_blktrans(struct mtd_blktrans_ops *tr);
86extern int add_mtd_blktrans_dev(struct mtd_blktrans_dev *dev); 88extern int add_mtd_blktrans_dev(struct mtd_blktrans_dev *dev);
87extern int del_mtd_blktrans_dev(struct mtd_blktrans_dev *dev); 89extern int del_mtd_blktrans_dev(struct mtd_blktrans_dev *dev);
90extern int mtd_blktrans_cease_background(struct mtd_blktrans_dev *dev);
88 91
89 92
90#endif /* __MTD_TRANS_H__ */ 93#endif /* __MTD_TRANS_H__ */
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index d2118b0eac9a..d24925492972 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -289,6 +289,7 @@ struct cfi_private {
289 must be of the same type. */ 289 must be of the same type. */
290 int mfr, id; 290 int mfr, id;
291 int numchips; 291 int numchips;
292 map_word sector_erase_cmd;
292 unsigned long chipshift; /* Because they're of the same type */ 293 unsigned long chipshift; /* Because they're of the same type */
293 const char *im_name; /* inter_module name for cmdset_setup */ 294 const char *im_name; /* inter_module name for cmdset_setup */
294 struct flchip chips[0]; /* per-chip data structure for each chip */ 295 struct flchip chips[0]; /* per-chip data structure for each chip */
@@ -307,7 +308,7 @@ static inline uint32_t cfi_build_cmd_addr(uint32_t cmd_ofs,
307 308
308 addr = (cmd_ofs * type) * interleave; 309 addr = (cmd_ofs * type) * interleave;
309 310
310 /* Modify the unlock address if we are in compatiblity mode. 311 /* Modify the unlock address if we are in compatibility mode.
311 * For 16bit devices on 8 bit busses 312 * For 16bit devices on 8 bit busses
312 * and 32bit devices on 16 bit busses 313 * and 32bit devices on 16 bit busses
313 * set the low bit of the alternating bit sequence of the address. 314 * set the low bit of the alternating bit sequence of the address.
@@ -526,8 +527,7 @@ struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t s
526struct cfi_fixup { 527struct cfi_fixup {
527 uint16_t mfr; 528 uint16_t mfr;
528 uint16_t id; 529 uint16_t id;
529 void (*fixup)(struct mtd_info *mtd, void* param); 530 void (*fixup)(struct mtd_info *mtd);
530 void* param;
531}; 531};
532 532
533#define CFI_MFR_ANY 0xFFFF 533#define CFI_MFR_ANY 0xFFFF
@@ -535,6 +535,7 @@ struct cfi_fixup {
535#define CFI_MFR_CONTINUATION 0x007F 535#define CFI_MFR_CONTINUATION 0x007F
536 536
537#define CFI_MFR_AMD 0x0001 537#define CFI_MFR_AMD 0x0001
538#define CFI_MFR_AMIC 0x0037
538#define CFI_MFR_ATMEL 0x001F 539#define CFI_MFR_ATMEL 0x001F
539#define CFI_MFR_EON 0x001C 540#define CFI_MFR_EON 0x001C
540#define CFI_MFR_FUJITSU 0x0004 541#define CFI_MFR_FUJITSU 0x0004
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
new file mode 100644
index 000000000000..6987995ad3cf
--- /dev/null
+++ b/include/linux/mtd/fsmc.h
@@ -0,0 +1,163 @@
1/*
2 * incude/mtd/fsmc.h
3 *
4 * ST Microelectronics
5 * Flexible Static Memory Controller (FSMC)
6 * platform data interface and header file
7 *
8 * Copyright © 2010 ST Microelectronics
9 * Vipin Kumar <vipin.kumar@st.com>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15
16#ifndef __MTD_FSMC_H
17#define __MTD_FSMC_H
18
19#include <linux/io.h>
20#include <linux/platform_device.h>
21#include <linux/mtd/physmap.h>
22#include <linux/types.h>
23#include <linux/mtd/partitions.h>
24#include <asm/param.h>
25
26#define FSMC_NAND_BW8 1
27#define FSMC_NAND_BW16 2
28
29/*
30 * The placement of the Command Latch Enable (CLE) and
31 * Address Latch Enable (ALE) is twisted around in the
32 * SPEAR310 implementation.
33 */
34#if defined(CONFIG_MACH_SPEAR310)
35#define PLAT_NAND_CLE (1 << 17)
36#define PLAT_NAND_ALE (1 << 16)
37#else
38#define PLAT_NAND_CLE (1 << 16)
39#define PLAT_NAND_ALE (1 << 17)
40#endif
41
42#define FSMC_MAX_NOR_BANKS 4
43#define FSMC_MAX_NAND_BANKS 4
44
45#define FSMC_FLASH_WIDTH8 1
46#define FSMC_FLASH_WIDTH16 2
47
48struct fsmc_nor_bank_regs {
49 uint32_t ctrl;
50 uint32_t ctrl_tim;
51};
52
53/* ctrl register definitions */
54#define BANK_ENABLE (1 << 0)
55#define MUXED (1 << 1)
56#define NOR_DEV (2 << 2)
57#define WIDTH_8 (0 << 4)
58#define WIDTH_16 (1 << 4)
59#define RSTPWRDWN (1 << 6)
60#define WPROT (1 << 7)
61#define WRT_ENABLE (1 << 12)
62#define WAIT_ENB (1 << 13)
63
64/* ctrl_tim register definitions */
65
66struct fsmc_nand_bank_regs {
67 uint32_t pc;
68 uint32_t sts;
69 uint32_t comm;
70 uint32_t attrib;
71 uint32_t ioata;
72 uint32_t ecc1;
73 uint32_t ecc2;
74 uint32_t ecc3;
75};
76
77#define FSMC_NOR_REG_SIZE 0x40
78
79struct fsmc_regs {
80 struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS];
81 uint8_t reserved_1[0x40 - 0x20];
82 struct fsmc_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
83 uint8_t reserved_2[0xfe0 - 0xc0];
84 uint32_t peripid0; /* 0xfe0 */
85 uint32_t peripid1; /* 0xfe4 */
86 uint32_t peripid2; /* 0xfe8 */
87 uint32_t peripid3; /* 0xfec */
88 uint32_t pcellid0; /* 0xff0 */
89 uint32_t pcellid1; /* 0xff4 */
90 uint32_t pcellid2; /* 0xff8 */
91 uint32_t pcellid3; /* 0xffc */
92};
93
94#define FSMC_BUSY_WAIT_TIMEOUT (1 * HZ)
95
96/* pc register definitions */
97#define FSMC_RESET (1 << 0)
98#define FSMC_WAITON (1 << 1)
99#define FSMC_ENABLE (1 << 2)
100#define FSMC_DEVTYPE_NAND (1 << 3)
101#define FSMC_DEVWID_8 (0 << 4)
102#define FSMC_DEVWID_16 (1 << 4)
103#define FSMC_ECCEN (1 << 6)
104#define FSMC_ECCPLEN_512 (0 << 7)
105#define FSMC_ECCPLEN_256 (1 << 7)
106#define FSMC_TCLR_1 (1 << 9)
107#define FSMC_TAR_1 (1 << 13)
108
109/* sts register definitions */
110#define FSMC_CODE_RDY (1 << 15)
111
112/* comm register definitions */
113#define FSMC_TSET_0 (0 << 0)
114#define FSMC_TWAIT_6 (6 << 8)
115#define FSMC_THOLD_4 (4 << 16)
116#define FSMC_THIZ_1 (1 << 24)
117
118/*
119 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8
120 * and it has to be read consecutively and immediately after the 512
121 * byte data block for hardware to generate the error bit offsets
122 * Managing the ecc bytes in the following way is easier. This way is
123 * similar to oobfree structure maintained already in u-boot nand driver
124 */
125#define MAX_ECCPLACE_ENTRIES 32
126
127struct fsmc_nand_eccplace {
128 uint8_t offset;
129 uint8_t length;
130};
131
132struct fsmc_eccplace {
133 struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES];
134};
135
136/**
137 * fsmc_nand_platform_data - platform specific NAND controller config
138 * @partitions: partition table for the platform, use a default fallback
139 * if this is NULL
140 * @nr_partitions: the number of partitions in the previous entry
141 * @options: different options for the driver
142 * @width: bus width
143 * @bank: default bank
144 * @select_bank: callback to select a certain bank, this is
145 * platform-specific. If the controller only supports one bank
146 * this may be set to NULL
147 */
148struct fsmc_nand_platform_data {
149 struct mtd_partition *partitions;
150 unsigned int nr_partitions;
151 unsigned int options;
152 unsigned int width;
153 unsigned int bank;
154 void (*select_bank)(uint32_t bank, uint32_t busw);
155};
156
157extern int __init fsmc_nor_init(struct platform_device *pdev,
158 unsigned long base, uint32_t bank, uint32_t width);
159extern void __init fsmc_init_board_info(struct platform_device *pdev,
160 struct mtd_partition *partitions, unsigned int nr_partitions,
161 unsigned int width);
162
163#endif /* __MTD_FSMC_H */
diff --git a/include/linux/mtd/inftl.h b/include/linux/mtd/inftl.h
index 64ee53ce95a9..02cd5f9b79b8 100644
--- a/include/linux/mtd/inftl.h
+++ b/include/linux/mtd/inftl.h
@@ -37,14 +37,14 @@ struct INFTLrecord {
37 __u16 firstEUN; 37 __u16 firstEUN;
38 __u16 lastEUN; 38 __u16 lastEUN;
39 __u16 numfreeEUNs; 39 __u16 numfreeEUNs;
40 __u16 LastFreeEUN; /* To speed up finding a free EUN */ 40 __u16 LastFreeEUN; /* To speed up finding a free EUN */
41 int head,sect,cyl; 41 int head,sect,cyl;
42 __u16 *PUtable; /* Physical Unit Table */ 42 __u16 *PUtable; /* Physical Unit Table */
43 __u16 *VUtable; /* Virtual Unit Table */ 43 __u16 *VUtable; /* Virtual Unit Table */
44 unsigned int nb_blocks; /* number of physical blocks */ 44 unsigned int nb_blocks; /* number of physical blocks */
45 unsigned int nb_boot_blocks; /* number of blocks used by the bios */ 45 unsigned int nb_boot_blocks; /* number of blocks used by the bios */
46 struct erase_info instr; 46 struct erase_info instr;
47 struct nand_ecclayout oobinfo; 47 struct nand_ecclayout oobinfo;
48}; 48};
49 49
50int INFTL_mount(struct INFTLrecord *s); 50int INFTL_mount(struct INFTLrecord *s);
diff --git a/include/linux/mtd/latch-addr-flash.h b/include/linux/mtd/latch-addr-flash.h
new file mode 100644
index 000000000000..e94b8e128074
--- /dev/null
+++ b/include/linux/mtd/latch-addr-flash.h
@@ -0,0 +1,29 @@
1/*
2 * Interface for NOR flash driver whose high address lines are latched
3 *
4 * Copyright © 2008 MontaVista Software, Inc. <source@mvista.com>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10#ifndef __LATCH_ADDR_FLASH__
11#define __LATCH_ADDR_FLASH__
12
13struct map_info;
14struct mtd_partition;
15
16struct latch_addr_flash_data {
17 unsigned int width;
18 unsigned int size;
19
20 int (*init)(void *data, int cs);
21 void (*done)(void *data);
22 void (*set_window)(unsigned long offset, void *data);
23 void *data;
24
25 unsigned int nr_parts;
26 struct mtd_partition *parts;
27};
28
29#endif
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 8485e42a9b09..2541fb848daa 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -110,6 +110,21 @@ struct mtd_oob_ops {
110 uint8_t *oobbuf; 110 uint8_t *oobbuf;
111}; 111};
112 112
113#define MTD_MAX_OOBFREE_ENTRIES_LARGE 32
114#define MTD_MAX_ECCPOS_ENTRIES_LARGE 448
115/*
116 * Internal ECC layout control structure. For historical reasons, there is a
117 * similar, smaller struct nand_ecclayout_user (in mtd-abi.h) that is retained
118 * for export to user-space via the ECCGETLAYOUT ioctl.
119 * nand_ecclayout should be expandable in the future simply by the above macros.
120 */
121struct nand_ecclayout {
122 __u32 eccbytes;
123 __u32 eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE];
124 __u32 oobavail;
125 struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE];
126};
127
113struct mtd_info { 128struct mtd_info {
114 u_char type; 129 u_char type;
115 uint32_t flags; 130 uint32_t flags;
@@ -129,6 +144,17 @@ struct mtd_info {
129 */ 144 */
130 uint32_t writesize; 145 uint32_t writesize;
131 146
147 /*
148 * Size of the write buffer used by the MTD. MTD devices having a write
149 * buffer can write multiple writesize chunks at a time. E.g. while
150 * writing 4 * writesize bytes to a device with 2 * writesize bytes
151 * buffer the MTD driver can (but doesn't have to) do 2 writesize
152 * operations, but not 4. Currently, all NANDs have writebufsize
153 * equivalent to writesize (NAND page size). Some NOR flashes do have
154 * writebufsize greater than writesize.
155 */
156 uint32_t writebufsize;
157
132 uint32_t oobsize; // Amount of OOB data per block (e.g. 16) 158 uint32_t oobsize; // Amount of OOB data per block (e.g. 16)
133 uint32_t oobavail; // Available OOB bytes per block 159 uint32_t oobavail; // Available OOB bytes per block
134 160
@@ -296,9 +322,12 @@ static inline uint32_t mtd_mod_by_ws(uint64_t sz, struct mtd_info *mtd)
296 322
297 /* Kernel-side ioctl definitions */ 323 /* Kernel-side ioctl definitions */
298 324
299extern int add_mtd_device(struct mtd_info *mtd); 325struct mtd_partition;
300extern int del_mtd_device (struct mtd_info *mtd);
301 326
327extern int mtd_device_register(struct mtd_info *master,
328 const struct mtd_partition *parts,
329 int nr_parts);
330extern int mtd_device_unregister(struct mtd_info *master);
302extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num); 331extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
303extern int __get_mtd_device(struct mtd_info *mtd); 332extern int __get_mtd_device(struct mtd_info *mtd);
304extern void __put_mtd_device(struct mtd_info *mtd); 333extern void __put_mtd_device(struct mtd_info *mtd);
@@ -322,15 +351,9 @@ int default_mtd_writev(struct mtd_info *mtd, const struct kvec *vecs,
322int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs, 351int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs,
323 unsigned long count, loff_t from, size_t *retlen); 352 unsigned long count, loff_t from, size_t *retlen);
324 353
325#ifdef CONFIG_MTD_PARTITIONS 354void *mtd_kmalloc_up_to(const struct mtd_info *mtd, size_t *size);
355
326void mtd_erase_callback(struct erase_info *instr); 356void mtd_erase_callback(struct erase_info *instr);
327#else
328static inline void mtd_erase_callback(struct erase_info *instr)
329{
330 if (instr->callback)
331 instr->callback(instr);
332}
333#endif
334 357
335/* 358/*
336 * Debugging macro and defines 359 * Debugging macro and defines
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 102e12c58cb3..c2b9ac4fbc4a 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -27,15 +27,17 @@
27struct mtd_info; 27struct mtd_info;
28struct nand_flash_dev; 28struct nand_flash_dev;
29/* Scan and identify a NAND device */ 29/* Scan and identify a NAND device */
30extern int nand_scan (struct mtd_info *mtd, int max_chips); 30extern int nand_scan(struct mtd_info *mtd, int max_chips);
31/* Separate phases of nand_scan(), allowing board driver to intervene 31/*
32 * and override command or ECC setup according to flash type */ 32 * Separate phases of nand_scan(), allowing board driver to intervene
33 * and override command or ECC setup according to flash type.
34 */
33extern int nand_scan_ident(struct mtd_info *mtd, int max_chips, 35extern int nand_scan_ident(struct mtd_info *mtd, int max_chips,
34 struct nand_flash_dev *table); 36 struct nand_flash_dev *table);
35extern int nand_scan_tail(struct mtd_info *mtd); 37extern int nand_scan_tail(struct mtd_info *mtd);
36 38
37/* Free resources held by the NAND device */ 39/* Free resources held by the NAND device */
38extern void nand_release (struct mtd_info *mtd); 40extern void nand_release(struct mtd_info *mtd);
39 41
40/* Internal helper for board drivers which need to override command function */ 42/* Internal helper for board drivers which need to override command function */
41extern void nand_wait_ready(struct mtd_info *mtd); 43extern void nand_wait_ready(struct mtd_info *mtd);
@@ -49,12 +51,13 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
49/* The maximum number of NAND chips in an array */ 51/* The maximum number of NAND chips in an array */
50#define NAND_MAX_CHIPS 8 52#define NAND_MAX_CHIPS 8
51 53
52/* This constant declares the max. oobsize / page, which 54/*
55 * This constant declares the max. oobsize / page, which
53 * is supported now. If you add a chip with bigger oobsize/page 56 * is supported now. If you add a chip with bigger oobsize/page
54 * adjust this accordingly. 57 * adjust this accordingly.
55 */ 58 */
56#define NAND_MAX_OOBSIZE 256 59#define NAND_MAX_OOBSIZE 576
57#define NAND_MAX_PAGESIZE 4096 60#define NAND_MAX_PAGESIZE 8192
58 61
59/* 62/*
60 * Constants for hardware specific CLE/ALE/NCE function 63 * Constants for hardware specific CLE/ALE/NCE function
@@ -88,6 +91,7 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
88#define NAND_CMD_RNDIN 0x85 91#define NAND_CMD_RNDIN 0x85
89#define NAND_CMD_READID 0x90 92#define NAND_CMD_READID 0x90
90#define NAND_CMD_ERASE2 0xd0 93#define NAND_CMD_ERASE2 0xd0
94#define NAND_CMD_PARAM 0xec
91#define NAND_CMD_RESET 0xff 95#define NAND_CMD_RESET 0xff
92 96
93#define NAND_CMD_LOCK 0x2a 97#define NAND_CMD_LOCK 0x2a
@@ -136,6 +140,7 @@ typedef enum {
136 NAND_ECC_HW, 140 NAND_ECC_HW,
137 NAND_ECC_HW_SYNDROME, 141 NAND_ECC_HW_SYNDROME,
138 NAND_ECC_HW_OOB_FIRST, 142 NAND_ECC_HW_OOB_FIRST,
143 NAND_ECC_SOFT_BCH,
139} nand_ecc_modes_t; 144} nand_ecc_modes_t;
140 145
141/* 146/*
@@ -152,9 +157,10 @@ typedef enum {
152#define NAND_GET_DEVICE 0x80 157#define NAND_GET_DEVICE 0x80
153 158
154 159
155/* Option constants for bizarre disfunctionality and real 160/*
156* features 161 * Option constants for bizarre disfunctionality and real
157*/ 162 * features.
163 */
158/* Chip can not auto increment pages */ 164/* Chip can not auto increment pages */
159#define NAND_NO_AUTOINCR 0x00000001 165#define NAND_NO_AUTOINCR 0x00000001
160/* Buswitdh is 16 bit */ 166/* Buswitdh is 16 bit */
@@ -165,19 +171,27 @@ typedef enum {
165#define NAND_CACHEPRG 0x00000008 171#define NAND_CACHEPRG 0x00000008
166/* Chip has copy back function */ 172/* Chip has copy back function */
167#define NAND_COPYBACK 0x00000010 173#define NAND_COPYBACK 0x00000010
168/* AND Chip which has 4 banks and a confusing page / block 174/*
169 * assignment. See Renesas datasheet for further information */ 175 * AND Chip which has 4 banks and a confusing page / block
176 * assignment. See Renesas datasheet for further information.
177 */
170#define NAND_IS_AND 0x00000020 178#define NAND_IS_AND 0x00000020
171/* Chip has a array of 4 pages which can be read without 179/*
172 * additional ready /busy waits */ 180 * Chip has a array of 4 pages which can be read without
181 * additional ready /busy waits.
182 */
173#define NAND_4PAGE_ARRAY 0x00000040 183#define NAND_4PAGE_ARRAY 0x00000040
174/* Chip requires that BBT is periodically rewritten to prevent 184/*
185 * Chip requires that BBT is periodically rewritten to prevent
175 * bits from adjacent blocks from 'leaking' in altering data. 186 * bits from adjacent blocks from 'leaking' in altering data.
176 * This happens with the Renesas AG-AND chips, possibly others. */ 187 * This happens with the Renesas AG-AND chips, possibly others.
188 */
177#define BBT_AUTO_REFRESH 0x00000080 189#define BBT_AUTO_REFRESH 0x00000080
178/* Chip does not require ready check on read. True 190/*
191 * Chip does not require ready check on read. True
179 * for all large page devices, as they do not support 192 * for all large page devices, as they do not support
180 * autoincrement.*/ 193 * autoincrement.
194 */
181#define NAND_NO_READRDY 0x00000100 195#define NAND_NO_READRDY 0x00000100
182/* Chip does not allow subpage writes */ 196/* Chip does not allow subpage writes */
183#define NAND_NO_SUBPAGE_WRITE 0x00000200 197#define NAND_NO_SUBPAGE_WRITE 0x00000200
@@ -205,16 +219,27 @@ typedef enum {
205#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) 219#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
206 220
207/* Non chip related options */ 221/* Non chip related options */
208/* Use a flash based bad block table. This option is passed to the 222/*
209 * default bad block table function. */ 223 * Use a flash based bad block table. OOB identifier is saved in OOB area.
224 * This option is passed to the default bad block table function.
225 */
210#define NAND_USE_FLASH_BBT 0x00010000 226#define NAND_USE_FLASH_BBT 0x00010000
211/* This option skips the bbt scan during initialization. */ 227/* This option skips the bbt scan during initialization. */
212#define NAND_SKIP_BBTSCAN 0x00020000 228#define NAND_SKIP_BBTSCAN 0x00020000
213/* This option is defined if the board driver allocates its own buffers 229/*
214 (e.g. because it needs them DMA-coherent */ 230 * This option is defined if the board driver allocates its own buffers
231 * (e.g. because it needs them DMA-coherent).
232 */
215#define NAND_OWN_BUFFERS 0x00040000 233#define NAND_OWN_BUFFERS 0x00040000
216/* Chip may not exist, so silence any errors in scan */ 234/* Chip may not exist, so silence any errors in scan */
217#define NAND_SCAN_SILENT_NODEV 0x00080000 235#define NAND_SCAN_SILENT_NODEV 0x00080000
236/*
237 * If passed additionally to NAND_USE_FLASH_BBT then BBT code will not touch
238 * the OOB area.
239 */
240#define NAND_USE_FLASH_BBT_NO_OOB 0x00800000
241/* Create an empty BBT with no vendor information if the BBT is available */
242#define NAND_CREATE_EMPTY_BBT 0x01000000
218 243
219/* Options set by nand scan */ 244/* Options set by nand scan */
220/* Nand scan has allocated controller struct */ 245/* Nand scan has allocated controller struct */
@@ -227,15 +252,80 @@ typedef enum {
227/* Keep gcc happy */ 252/* Keep gcc happy */
228struct nand_chip; 253struct nand_chip;
229 254
255struct nand_onfi_params {
256 /* rev info and features block */
257 /* 'O' 'N' 'F' 'I' */
258 u8 sig[4];
259 __le16 revision;
260 __le16 features;
261 __le16 opt_cmd;
262 u8 reserved[22];
263
264 /* manufacturer information block */
265 char manufacturer[12];
266 char model[20];
267 u8 jedec_id;
268 __le16 date_code;
269 u8 reserved2[13];
270
271 /* memory organization block */
272 __le32 byte_per_page;
273 __le16 spare_bytes_per_page;
274 __le32 data_bytes_per_ppage;
275 __le16 spare_bytes_per_ppage;
276 __le32 pages_per_block;
277 __le32 blocks_per_lun;
278 u8 lun_count;
279 u8 addr_cycles;
280 u8 bits_per_cell;
281 __le16 bb_per_lun;
282 __le16 block_endurance;
283 u8 guaranteed_good_blocks;
284 __le16 guaranteed_block_endurance;
285 u8 programs_per_page;
286 u8 ppage_attr;
287 u8 ecc_bits;
288 u8 interleaved_bits;
289 u8 interleaved_ops;
290 u8 reserved3[13];
291
292 /* electrical parameter block */
293 u8 io_pin_capacitance_max;
294 __le16 async_timing_mode;
295 __le16 program_cache_timing_mode;
296 __le16 t_prog;
297 __le16 t_bers;
298 __le16 t_r;
299 __le16 t_ccs;
300 __le16 src_sync_timing_mode;
301 __le16 src_ssync_features;
302 __le16 clk_pin_capacitance_typ;
303 __le16 io_pin_capacitance_typ;
304 __le16 input_pin_capacitance_typ;
305 u8 input_pin_capacitance_max;
306 u8 driver_strenght_support;
307 __le16 t_int_r;
308 __le16 t_ald;
309 u8 reserved4[7];
310
311 /* vendor */
312 u8 reserved5[90];
313
314 __le16 crc;
315} __attribute__((packed));
316
317#define ONFI_CRC_BASE 0x4F4E
318
230/** 319/**
231 * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices 320 * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
232 * @lock: protection lock 321 * @lock: protection lock
233 * @active: the mtd device which holds the controller currently 322 * @active: the mtd device which holds the controller currently
234 * @wq: wait queue to sleep on if a NAND operation is in progress 323 * @wq: wait queue to sleep on if a NAND operation is in
235 * used instead of the per chip wait queue when a hw controller is available 324 * progress used instead of the per chip wait queue
325 * when a hw controller is available.
236 */ 326 */
237struct nand_hw_control { 327struct nand_hw_control {
238 spinlock_t lock; 328 spinlock_t lock;
239 struct nand_chip *active; 329 struct nand_chip *active;
240 wait_queue_head_t wq; 330 wait_queue_head_t wq;
241}; 331};
@@ -250,57 +340,50 @@ struct nand_hw_control {
250 * @prepad: padding information for syndrome based ecc generators 340 * @prepad: padding information for syndrome based ecc generators
251 * @postpad: padding information for syndrome based ecc generators 341 * @postpad: padding information for syndrome based ecc generators
252 * @layout: ECC layout control struct pointer 342 * @layout: ECC layout control struct pointer
343 * @priv: pointer to private ecc control data
253 * @hwctl: function to control hardware ecc generator. Must only 344 * @hwctl: function to control hardware ecc generator. Must only
254 * be provided if an hardware ECC is available 345 * be provided if an hardware ECC is available
255 * @calculate: function for ecc calculation or readback from ecc hardware 346 * @calculate: function for ecc calculation or readback from ecc hardware
256 * @correct: function for ecc correction, matching to ecc generator (sw/hw) 347 * @correct: function for ecc correction, matching to ecc generator (sw/hw)
257 * @read_page_raw: function to read a raw page without ECC 348 * @read_page_raw: function to read a raw page without ECC
258 * @write_page_raw: function to write a raw page without ECC 349 * @write_page_raw: function to write a raw page without ECC
259 * @read_page: function to read a page according to the ecc generator requirements 350 * @read_page: function to read a page according to the ecc generator
351 * requirements.
260 * @read_subpage: function to read parts of the page covered by ECC. 352 * @read_subpage: function to read parts of the page covered by ECC.
261 * @write_page: function to write a page according to the ecc generator requirements 353 * @write_page: function to write a page according to the ecc generator
354 * requirements.
262 * @read_oob: function to read chip OOB data 355 * @read_oob: function to read chip OOB data
263 * @write_oob: function to write chip OOB data 356 * @write_oob: function to write chip OOB data
264 */ 357 */
265struct nand_ecc_ctrl { 358struct nand_ecc_ctrl {
266 nand_ecc_modes_t mode; 359 nand_ecc_modes_t mode;
267 int steps; 360 int steps;
268 int size; 361 int size;
269 int bytes; 362 int bytes;
270 int total; 363 int total;
271 int prepad; 364 int prepad;
272 int postpad; 365 int postpad;
273 struct nand_ecclayout *layout; 366 struct nand_ecclayout *layout;
274 void (*hwctl)(struct mtd_info *mtd, int mode); 367 void *priv;
275 int (*calculate)(struct mtd_info *mtd, 368 void (*hwctl)(struct mtd_info *mtd, int mode);
276 const uint8_t *dat, 369 int (*calculate)(struct mtd_info *mtd, const uint8_t *dat,
277 uint8_t *ecc_code); 370 uint8_t *ecc_code);
278 int (*correct)(struct mtd_info *mtd, uint8_t *dat, 371 int (*correct)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc,
279 uint8_t *read_ecc, 372 uint8_t *calc_ecc);
280 uint8_t *calc_ecc); 373 int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
281 int (*read_page_raw)(struct mtd_info *mtd, 374 uint8_t *buf, int page);
282 struct nand_chip *chip, 375 void (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
283 uint8_t *buf, int page); 376 const uint8_t *buf);
284 void (*write_page_raw)(struct mtd_info *mtd, 377 int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
285 struct nand_chip *chip, 378 uint8_t *buf, int page);
286 const uint8_t *buf); 379 int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
287 int (*read_page)(struct mtd_info *mtd, 380 uint32_t offs, uint32_t len, uint8_t *buf);
288 struct nand_chip *chip, 381 void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
289 uint8_t *buf, int page); 382 const uint8_t *buf);
290 int (*read_subpage)(struct mtd_info *mtd, 383 int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page,
291 struct nand_chip *chip, 384 int sndcmd);
292 uint32_t offs, uint32_t len, 385 int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
293 uint8_t *buf); 386 int page);
294 void (*write_page)(struct mtd_info *mtd,
295 struct nand_chip *chip,
296 const uint8_t *buf);
297 int (*read_oob)(struct mtd_info *mtd,
298 struct nand_chip *chip,
299 int page,
300 int sndcmd);
301 int (*write_oob)(struct mtd_info *mtd,
302 struct nand_chip *chip,
303 int page);
304}; 387};
305 388
306/** 389/**
@@ -320,102 +403,134 @@ struct nand_buffers {
320 403
321/** 404/**
322 * struct nand_chip - NAND Private Flash Chip Data 405 * struct nand_chip - NAND Private Flash Chip Data
323 * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device 406 * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the
324 * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device 407 * flash device
408 * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the
409 * flash device.
325 * @read_byte: [REPLACEABLE] read one byte from the chip 410 * @read_byte: [REPLACEABLE] read one byte from the chip
326 * @read_word: [REPLACEABLE] read one word from the chip 411 * @read_word: [REPLACEABLE] read one word from the chip
327 * @write_buf: [REPLACEABLE] write data from the buffer to the chip 412 * @write_buf: [REPLACEABLE] write data from the buffer to the chip
328 * @read_buf: [REPLACEABLE] read data from the chip into the buffer 413 * @read_buf: [REPLACEABLE] read data from the chip into the buffer
329 * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data 414 * @verify_buf: [REPLACEABLE] verify buffer contents against the chip
415 * data.
330 * @select_chip: [REPLACEABLE] select chip nr 416 * @select_chip: [REPLACEABLE] select chip nr
331 * @block_bad: [REPLACEABLE] check, if the block is bad 417 * @block_bad: [REPLACEABLE] check, if the block is bad
332 * @block_markbad: [REPLACEABLE] mark the block bad 418 * @block_markbad: [REPLACEABLE] mark the block bad
333 * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific funtion for controlling 419 * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific function for controlling
334 * ALE/CLE/nCE. Also used to write command and address 420 * ALE/CLE/nCE. Also used to write command and address
335 * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line 421 * @init_size: [BOARDSPECIFIC] hardwarespecific function for setting
336 * If set to NULL no access to ready/busy is available and the ready/busy information 422 * mtd->oobsize, mtd->writesize and so on.
337 * is read from the chip status register 423 * @id_data contains the 8 bytes values of NAND_CMD_READID.
338 * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip 424 * Return with the bus width.
339 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready 425 * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing
426 * device ready/busy line. If set to NULL no access to
427 * ready/busy is available and the ready/busy information
428 * is read from the chip status register.
429 * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing
430 * commands to the chip.
431 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
432 * ready.
340 * @ecc: [BOARDSPECIFIC] ecc control ctructure 433 * @ecc: [BOARDSPECIFIC] ecc control ctructure
341 * @buffers: buffer structure for read/write 434 * @buffers: buffer structure for read/write
342 * @hwcontrol: platform-specific hardware control structure 435 * @hwcontrol: platform-specific hardware control structure
343 * @ops: oob operation operands 436 * @ops: oob operation operands
344 * @erase_cmd: [INTERN] erase command write function, selectable due to AND support 437 * @erase_cmd: [INTERN] erase command write function, selectable due
438 * to AND support.
345 * @scan_bbt: [REPLACEABLE] function to scan bad block table 439 * @scan_bbt: [REPLACEABLE] function to scan bad block table
346 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) 440 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring
441 * data from array to read regs (tR).
347 * @state: [INTERN] the current state of the NAND device 442 * @state: [INTERN] the current state of the NAND device
348 * @oob_poi: poison value buffer 443 * @oob_poi: poison value buffer
349 * @page_shift: [INTERN] number of address bits in a page (column address bits) 444 * @page_shift: [INTERN] number of address bits in a page (column
445 * address bits).
350 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock 446 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
351 * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry 447 * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
352 * @chip_shift: [INTERN] number of address bits in one chip 448 * @chip_shift: [INTERN] number of address bits in one chip
353 * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about 449 * @options: [BOARDSPECIFIC] various chip options. They can partly
354 * special functionality. See the defines for further explanation 450 * be set to inform nand_scan about special functionality.
355 * @badblockpos: [INTERN] position of the bad block marker in the oob area 451 * See the defines for further explanation.
452 * @badblockpos: [INTERN] position of the bad block marker in the oob
453 * area.
454 * @badblockbits: [INTERN] number of bits to left-shift the bad block
455 * number
356 * @cellinfo: [INTERN] MLC/multichip data from chip ident 456 * @cellinfo: [INTERN] MLC/multichip data from chip ident
357 * @numchips: [INTERN] number of physical chips 457 * @numchips: [INTERN] number of physical chips
358 * @chipsize: [INTERN] the size of one chip for multichip arrays 458 * @chipsize: [INTERN] the size of one chip for multichip arrays
359 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 459 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
360 * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf 460 * @pagebuf: [INTERN] holds the pagenumber which is currently in
461 * data_buf.
361 * @subpagesize: [INTERN] holds the subpagesize 462 * @subpagesize: [INTERN] holds the subpagesize
463 * @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
464 * non 0 if ONFI supported.
465 * @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
466 * supported, 0 otherwise.
362 * @ecclayout: [REPLACEABLE] the default ecc placement scheme 467 * @ecclayout: [REPLACEABLE] the default ecc placement scheme
363 * @bbt: [INTERN] bad block table pointer 468 * @bbt: [INTERN] bad block table pointer
364 * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup 469 * @bbt_td: [REPLACEABLE] bad block table descriptor for flash
470 * lookup.
365 * @bbt_md: [REPLACEABLE] bad block table mirror descriptor 471 * @bbt_md: [REPLACEABLE] bad block table mirror descriptor
366 * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan 472 * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial
367 * @controller: [REPLACEABLE] a pointer to a hardware controller structure 473 * bad block scan.
368 * which is shared among multiple independend devices 474 * @controller: [REPLACEABLE] a pointer to a hardware controller
475 * structure which is shared among multiple independend
476 * devices.
369 * @priv: [OPTIONAL] pointer to private chip date 477 * @priv: [OPTIONAL] pointer to private chip date
370 * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks 478 * @errstat: [OPTIONAL] hardware specific function to perform
371 * (determine if errors are correctable) 479 * additional error status checks (determine if errors are
480 * correctable).
372 * @write_page: [REPLACEABLE] High-level page write function 481 * @write_page: [REPLACEABLE] High-level page write function
373 */ 482 */
374 483
375struct nand_chip { 484struct nand_chip {
376 void __iomem *IO_ADDR_R; 485 void __iomem *IO_ADDR_R;
377 void __iomem *IO_ADDR_W; 486 void __iomem *IO_ADDR_W;
378 487
379 uint8_t (*read_byte)(struct mtd_info *mtd); 488 uint8_t (*read_byte)(struct mtd_info *mtd);
380 u16 (*read_word)(struct mtd_info *mtd); 489 u16 (*read_word)(struct mtd_info *mtd);
381 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 490 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
382 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); 491 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
383 int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 492 int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
384 void (*select_chip)(struct mtd_info *mtd, int chip); 493 void (*select_chip)(struct mtd_info *mtd, int chip);
385 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); 494 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
386 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); 495 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
387 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, 496 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
388 unsigned int ctrl); 497 int (*init_size)(struct mtd_info *mtd, struct nand_chip *this,
389 int (*dev_ready)(struct mtd_info *mtd); 498 u8 *id_data);
390 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr); 499 int (*dev_ready)(struct mtd_info *mtd);
391 int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this); 500 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,
392 void (*erase_cmd)(struct mtd_info *mtd, int page); 501 int page_addr);
393 int (*scan_bbt)(struct mtd_info *mtd); 502 int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
394 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page); 503 void (*erase_cmd)(struct mtd_info *mtd, int page);
395 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, 504 int (*scan_bbt)(struct mtd_info *mtd);
396 const uint8_t *buf, int page, int cached, int raw); 505 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
397 506 int status, int page);
398 int chip_delay; 507 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
399 unsigned int options; 508 const uint8_t *buf, int page, int cached, int raw);
400 509
401 int page_shift; 510 int chip_delay;
402 int phys_erase_shift; 511 unsigned int options;
403 int bbt_erase_shift; 512
404 int chip_shift; 513 int page_shift;
405 int numchips; 514 int phys_erase_shift;
406 uint64_t chipsize; 515 int bbt_erase_shift;
407 int pagemask; 516 int chip_shift;
408 int pagebuf; 517 int numchips;
409 int subpagesize; 518 uint64_t chipsize;
410 uint8_t cellinfo; 519 int pagemask;
411 int badblockpos; 520 int pagebuf;
412 int badblockbits; 521 int subpagesize;
413 522 uint8_t cellinfo;
414 flstate_t state; 523 int badblockpos;
415 524 int badblockbits;
416 uint8_t *oob_poi; 525
417 struct nand_hw_control *controller; 526 int onfi_version;
418 struct nand_ecclayout *ecclayout; 527 struct nand_onfi_params onfi_params;
528
529 flstate_t state;
530
531 uint8_t *oob_poi;
532 struct nand_hw_control *controller;
533 struct nand_ecclayout *ecclayout;
419 534
420 struct nand_ecc_ctrl ecc; 535 struct nand_ecc_ctrl ecc;
421 struct nand_buffers *buffers; 536 struct nand_buffers *buffers;
@@ -423,13 +538,13 @@ struct nand_chip {
423 538
424 struct mtd_oob_ops ops; 539 struct mtd_oob_ops ops;
425 540
426 uint8_t *bbt; 541 uint8_t *bbt;
427 struct nand_bbt_descr *bbt_td; 542 struct nand_bbt_descr *bbt_td;
428 struct nand_bbt_descr *bbt_md; 543 struct nand_bbt_descr *bbt_md;
429 544
430 struct nand_bbt_descr *badblock_pattern; 545 struct nand_bbt_descr *badblock_pattern;
431 546
432 void *priv; 547 void *priv;
433}; 548};
434 549
435/* 550/*
@@ -473,7 +588,7 @@ struct nand_flash_dev {
473*/ 588*/
474struct nand_manufacturers { 589struct nand_manufacturers {
475 int id; 590 int id;
476 char * name; 591 char *name;
477}; 592};
478 593
479extern struct nand_flash_dev nand_flash_ids[]; 594extern struct nand_flash_dev nand_flash_ids[];
@@ -486,7 +601,7 @@ extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt);
486extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, 601extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
487 int allowbbt); 602 int allowbbt);
488extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, 603extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
489 size_t * retlen, uint8_t * buf); 604 size_t *retlen, uint8_t *buf);
490 605
491/** 606/**
492 * struct platform_nand_chip - chip level device structure 607 * struct platform_nand_chip - chip level device structure
@@ -502,17 +617,16 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
502 * @priv: hardware controller specific settings 617 * @priv: hardware controller specific settings
503 */ 618 */
504struct platform_nand_chip { 619struct platform_nand_chip {
505 int nr_chips; 620 int nr_chips;
506 int chip_offset; 621 int chip_offset;
507 int nr_partitions; 622 int nr_partitions;
508 struct mtd_partition *partitions; 623 struct mtd_partition *partitions;
509 struct nand_ecclayout *ecclayout; 624 struct nand_ecclayout *ecclayout;
510 int chip_delay; 625 int chip_delay;
511 unsigned int options; 626 unsigned int options;
512 const char **part_probe_types; 627 const char **part_probe_types;
513 void (*set_parts)(uint64_t size, 628 void (*set_parts)(uint64_t size, struct platform_nand_chip *chip);
514 struct platform_nand_chip *chip); 629 void *priv;
515 void *priv;
516}; 630};
517 631
518/* Keep gcc happy */ 632/* Keep gcc happy */
@@ -534,18 +648,15 @@ struct platform_device;
534 * All fields are optional and depend on the hardware driver requirements 648 * All fields are optional and depend on the hardware driver requirements
535 */ 649 */
536struct platform_nand_ctrl { 650struct platform_nand_ctrl {
537 int (*probe)(struct platform_device *pdev); 651 int (*probe)(struct platform_device *pdev);
538 void (*remove)(struct platform_device *pdev); 652 void (*remove)(struct platform_device *pdev);
539 void (*hwcontrol)(struct mtd_info *mtd, int cmd); 653 void (*hwcontrol)(struct mtd_info *mtd, int cmd);
540 int (*dev_ready)(struct mtd_info *mtd); 654 int (*dev_ready)(struct mtd_info *mtd);
541 void (*select_chip)(struct mtd_info *mtd, int chip); 655 void (*select_chip)(struct mtd_info *mtd, int chip);
542 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, 656 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
543 unsigned int ctrl); 657 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
544 void (*write_buf)(struct mtd_info *mtd, 658 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
545 const uint8_t *buf, int len); 659 void *priv;
546 void (*read_buf)(struct mtd_info *mtd,
547 uint8_t *buf, int len);
548 void *priv;
549}; 660};
550 661
551/** 662/**
@@ -554,8 +665,8 @@ struct platform_nand_ctrl {
554 * @ctrl: controller level device structure 665 * @ctrl: controller level device structure
555 */ 666 */
556struct platform_nand_data { 667struct platform_nand_data {
557 struct platform_nand_chip chip; 668 struct platform_nand_chip chip;
558 struct platform_nand_ctrl ctrl; 669 struct platform_nand_ctrl ctrl;
559}; 670};
560 671
561/* Some helpers to access the data structures */ 672/* Some helpers to access the data structures */
diff --git a/include/linux/mtd/nand_bch.h b/include/linux/mtd/nand_bch.h
new file mode 100644
index 000000000000..74acf5367556
--- /dev/null
+++ b/include/linux/mtd/nand_bch.h
@@ -0,0 +1,72 @@
1/*
2 * Copyright © 2011 Ivan Djelic <ivan.djelic@parrot.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This file is the header for the NAND BCH ECC implementation.
9 */
10
11#ifndef __MTD_NAND_BCH_H__
12#define __MTD_NAND_BCH_H__
13
14struct mtd_info;
15struct nand_bch_control;
16
17#if defined(CONFIG_MTD_NAND_ECC_BCH)
18
19static inline int mtd_nand_has_bch(void) { return 1; }
20
21/*
22 * Calculate BCH ecc code
23 */
24int nand_bch_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
25 u_char *ecc_code);
26
27/*
28 * Detect and correct bit errors
29 */
30int nand_bch_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc,
31 u_char *calc_ecc);
32/*
33 * Initialize BCH encoder/decoder
34 */
35struct nand_bch_control *
36nand_bch_init(struct mtd_info *mtd, unsigned int eccsize,
37 unsigned int eccbytes, struct nand_ecclayout **ecclayout);
38/*
39 * Release BCH encoder/decoder resources
40 */
41void nand_bch_free(struct nand_bch_control *nbc);
42
43#else /* !CONFIG_MTD_NAND_ECC_BCH */
44
45static inline int mtd_nand_has_bch(void) { return 0; }
46
47static inline int
48nand_bch_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
49 u_char *ecc_code)
50{
51 return -1;
52}
53
54static inline int
55nand_bch_correct_data(struct mtd_info *mtd, unsigned char *buf,
56 unsigned char *read_ecc, unsigned char *calc_ecc)
57{
58 return -1;
59}
60
61static inline struct nand_bch_control *
62nand_bch_init(struct mtd_info *mtd, unsigned int eccsize,
63 unsigned int eccbytes, struct nand_ecclayout **ecclayout)
64{
65 return NULL;
66}
67
68static inline void nand_bch_free(struct nand_bch_control *nbc) {}
69
70#endif /* CONFIG_MTD_NAND_ECC_BCH */
71
72#endif /* __MTD_NAND_BCH_H__ */
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 0c8815bfae1c..52b6f187bf49 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -118,6 +118,8 @@ struct onenand_chip {
118 int (*chip_probe)(struct mtd_info *mtd); 118 int (*chip_probe)(struct mtd_info *mtd);
119 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); 119 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
120 int (*scan_bbt)(struct mtd_info *mtd); 120 int (*scan_bbt)(struct mtd_info *mtd);
121 int (*enable)(struct mtd_info *mtd);
122 int (*disable)(struct mtd_info *mtd);
121 123
122 struct completion complete; 124 struct completion complete;
123 int irq; 125 int irq;
@@ -137,6 +139,14 @@ struct onenand_chip {
137 void *bbm; 139 void *bbm;
138 140
139 void *priv; 141 void *priv;
142
143 /*
144 * Shows that the current operation is composed
145 * of sequence of commands. For example, cache program.
146 * Such command status OnGo bit is checked at the end of
147 * sequence.
148 */
149 unsigned int ongoing;
140}; 150};
141 151
142/* 152/*
@@ -171,6 +181,9 @@ struct onenand_chip {
171#define ONENAND_IS_2PLANE(this) (0) 181#define ONENAND_IS_2PLANE(this) (0)
172#endif 182#endif
173 183
184#define ONENAND_IS_CACHE_PROGRAM(this) \
185 (this->options & ONENAND_HAS_CACHE_PROGRAM)
186
174/* Check byte access in OneNAND */ 187/* Check byte access in OneNAND */
175#define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1) 188#define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1)
176 189
@@ -181,9 +194,11 @@ struct onenand_chip {
181#define ONENAND_HAS_UNLOCK_ALL (0x0002) 194#define ONENAND_HAS_UNLOCK_ALL (0x0002)
182#define ONENAND_HAS_2PLANE (0x0004) 195#define ONENAND_HAS_2PLANE (0x0004)
183#define ONENAND_HAS_4KB_PAGE (0x0008) 196#define ONENAND_HAS_4KB_PAGE (0x0008)
197#define ONENAND_HAS_CACHE_PROGRAM (0x0010)
184#define ONENAND_SKIP_UNLOCK_CHECK (0x0100) 198#define ONENAND_SKIP_UNLOCK_CHECK (0x0100)
185#define ONENAND_PAGEBUF_ALLOC (0x1000) 199#define ONENAND_PAGEBUF_ALLOC (0x1000)
186#define ONENAND_OOBBUF_ALLOC (0x2000) 200#define ONENAND_OOBBUF_ALLOC (0x2000)
201#define ONENAND_SKIP_INITIAL_UNLOCKING (0x4000)
187 202
188#define ONENAND_IS_4KB_PAGE(this) \ 203#define ONENAND_IS_4KB_PAGE(this) \
189 (this->options & ONENAND_HAS_4KB_PAGE) 204 (this->options & ONENAND_HAS_4KB_PAGE)
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
index cd6f3b431195..d60130f88eed 100644
--- a/include/linux/mtd/onenand_regs.h
+++ b/include/linux/mtd/onenand_regs.h
@@ -168,6 +168,7 @@
168#define ONENAND_SYS_CFG1_INT (1 << 6) 168#define ONENAND_SYS_CFG1_INT (1 << 6)
169#define ONENAND_SYS_CFG1_IOBE (1 << 5) 169#define ONENAND_SYS_CFG1_IOBE (1 << 5)
170#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) 170#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4)
171#define ONENAND_SYS_CFG1_VHF (1 << 3)
171#define ONENAND_SYS_CFG1_HF (1 << 2) 172#define ONENAND_SYS_CFG1_HF (1 << 2)
172#define ONENAND_SYS_CFG1_SYNC_WRITE (1 << 1) 173#define ONENAND_SYS_CFG1_SYNC_WRITE (1 << 1)
173 174
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index 274b6196091d..3a6f0372fc96 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -16,7 +16,7 @@
16 * Partition definition structure: 16 * Partition definition structure:
17 * 17 *
18 * An array of struct partition is passed along with a MTD object to 18 * An array of struct partition is passed along with a MTD object to
19 * add_mtd_partitions() to create them. 19 * mtd_device_register() to create them.
20 * 20 *
21 * For each partition, these fields are available: 21 * For each partition, these fields are available:
22 * name: string that will be used to label the partition's MTD device. 22 * name: string that will be used to label the partition's MTD device.
@@ -39,7 +39,7 @@ struct mtd_partition {
39 uint64_t size; /* partition size */ 39 uint64_t size; /* partition size */
40 uint64_t offset; /* offset within the master MTD space */ 40 uint64_t offset; /* offset within the master MTD space */
41 uint32_t mask_flags; /* master MTD flags to mask out for this partition */ 41 uint32_t mask_flags; /* master MTD flags to mask out for this partition */
42 struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only)*/ 42 struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only) */
43}; 43};
44 44
45#define MTDPART_OFS_NXTBLK (-2) 45#define MTDPART_OFS_NXTBLK (-2)
@@ -49,9 +49,6 @@ struct mtd_partition {
49 49
50struct mtd_info; 50struct mtd_info;
51 51
52int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
53int del_mtd_partitions(struct mtd_info *);
54
55/* 52/*
56 * Functions dealing with the various ways of partitioning the space 53 * Functions dealing with the various ways of partitioning the space
57 */ 54 */
@@ -73,14 +70,17 @@ extern int parse_mtd_partitions(struct mtd_info *master, const char **types,
73struct device; 70struct device;
74struct device_node; 71struct device_node;
75 72
73#ifdef CONFIG_MTD_OF_PARTS
76int __devinit of_mtd_parse_partitions(struct device *dev, 74int __devinit of_mtd_parse_partitions(struct device *dev,
77 struct device_node *node, 75 struct device_node *node,
78 struct mtd_partition **pparts); 76 struct mtd_partition **pparts);
79
80#ifdef CONFIG_MTD_PARTITIONS
81static inline int mtd_has_partitions(void) { return 1; }
82#else 77#else
83static inline int mtd_has_partitions(void) { return 0; } 78static inline int of_mtd_parse_partitions(struct device *dev,
79 struct device_node *node,
80 struct mtd_partition **pparts)
81{
82 return 0;
83}
84#endif 84#endif
85 85
86#ifdef CONFIG_MTD_CMDLINE_PARTS 86#ifdef CONFIG_MTD_CMDLINE_PARTS
@@ -89,4 +89,9 @@ static inline int mtd_has_cmdlinepart(void) { return 1; }
89static inline int mtd_has_cmdlinepart(void) { return 0; } 89static inline int mtd_has_cmdlinepart(void) { return 0; }
90#endif 90#endif
91 91
92int mtd_is_partition(struct mtd_info *mtd);
93int mtd_add_partition(struct mtd_info *master, char *name,
94 long long offset, long long length);
95int mtd_del_partition(struct mtd_info *master, int partno);
96
92#endif 97#endif
diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h
index bcfd9f777454..e5f21d293c70 100644
--- a/include/linux/mtd/physmap.h
+++ b/include/linux/mtd/physmap.h
@@ -19,10 +19,13 @@
19#include <linux/mtd/partitions.h> 19#include <linux/mtd/partitions.h>
20 20
21struct map_info; 21struct map_info;
22struct platform_device;
22 23
23struct physmap_flash_data { 24struct physmap_flash_data {
24 unsigned int width; 25 unsigned int width;
25 void (*set_vpp)(struct map_info *, int); 26 int (*init)(struct platform_device *);
27 void (*exit)(struct platform_device *);
28 void (*set_vpp)(struct platform_device *, int);
26 unsigned int nr_parts; 29 unsigned int nr_parts;
27 unsigned int pfow_base; 30 unsigned int pfow_base;
28 char *probe_type; 31 char *probe_type;
@@ -35,8 +38,6 @@ struct physmap_flash_data {
35void physmap_configure(unsigned long addr, unsigned long size, 38void physmap_configure(unsigned long addr, unsigned long size,
36 int bankwidth, void (*set_vpp)(struct map_info *, int) ); 39 int bankwidth, void (*set_vpp)(struct map_info *, int) );
37 40
38#ifdef CONFIG_MTD_PARTITIONS
39
40/* 41/*
41 * Machines that wish to do flash partition may want to call this function in 42 * Machines that wish to do flash partition may want to call this function in
42 * their setup routine. 43 * their setup routine.
@@ -48,6 +49,4 @@ void physmap_configure(unsigned long addr, unsigned long size,
48 */ 49 */
49void physmap_set_partitions(struct mtd_partition *parts, int num_parts); 50void physmap_set_partitions(struct mtd_partition *parts, int num_parts);
50 51
51#endif /* defined(CONFIG_MTD_PARTITIONS) */
52
53#endif /* __LINUX_MTD_PHYSMAP__ */ 52#endif /* __LINUX_MTD_PHYSMAP__ */
diff --git a/include/linux/mtd/super.h b/include/linux/mtd/super.h
index 4016dd6fe336..f456230f9330 100644
--- a/include/linux/mtd/super.h
+++ b/include/linux/mtd/super.h
@@ -18,10 +18,9 @@
18#include <linux/fs.h> 18#include <linux/fs.h>
19#include <linux/mount.h> 19#include <linux/mount.h>
20 20
21extern int get_sb_mtd(struct file_system_type *fs_type, int flags, 21extern struct dentry *mount_mtd(struct file_system_type *fs_type, int flags,
22 const char *dev_name, void *data, 22 const char *dev_name, void *data,
23 int (*fill_super)(struct super_block *, void *, int), 23 int (*fill_super)(struct super_block *, void *, int));
24 struct vfsmount *mnt);
25extern void kill_mtd_super(struct super_block *sb); 24extern void kill_mtd_super(struct super_block *sb);
26 25
27 26
diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h
index b31bd9e9bca3..15da0e99f48a 100644
--- a/include/linux/mtd/ubi.h
+++ b/include/linux/mtd/ubi.h
@@ -21,7 +21,7 @@
21#ifndef __LINUX_UBI_H__ 21#ifndef __LINUX_UBI_H__
22#define __LINUX_UBI_H__ 22#define __LINUX_UBI_H__
23 23
24#include <asm/ioctl.h> 24#include <linux/ioctl.h>
25#include <linux/types.h> 25#include <linux/types.h>
26#include <mtd/ubi-user.h> 26#include <mtd/ubi-user.h>
27 27
@@ -87,7 +87,7 @@ enum {
87 * physical eraseblock size and on how much bytes UBI headers consume. But 87 * physical eraseblock size and on how much bytes UBI headers consume. But
88 * because of the volume alignment (@alignment), the usable size of logical 88 * because of the volume alignment (@alignment), the usable size of logical
89 * eraseblocks if a volume may be less. The following equation is true: 89 * eraseblocks if a volume may be less. The following equation is true:
90 * @usable_leb_size = LEB size - (LEB size mod @alignment), 90 * @usable_leb_size = LEB size - (LEB size mod @alignment),
91 * where LEB size is the logical eraseblock size defined by the UBI device. 91 * where LEB size is the logical eraseblock size defined by the UBI device.
92 * 92 *
93 * The alignment is multiple to the minimal flash input/output unit size or %1 93 * The alignment is multiple to the minimal flash input/output unit size or %1
@@ -116,18 +116,40 @@ struct ubi_volume_info {
116 * struct ubi_device_info - UBI device description data structure. 116 * struct ubi_device_info - UBI device description data structure.
117 * @ubi_num: ubi device number 117 * @ubi_num: ubi device number
118 * @leb_size: logical eraseblock size on this UBI device 118 * @leb_size: logical eraseblock size on this UBI device
119 * @leb_start: starting offset of logical eraseblocks within physical
120 * eraseblocks
119 * @min_io_size: minimal I/O unit size 121 * @min_io_size: minimal I/O unit size
122 * @max_write_size: maximum amount of bytes the underlying flash can write at a
123 * time (MTD write buffer size)
120 * @ro_mode: if this device is in read-only mode 124 * @ro_mode: if this device is in read-only mode
121 * @cdev: UBI character device major and minor numbers 125 * @cdev: UBI character device major and minor numbers
122 * 126 *
123 * Note, @leb_size is the logical eraseblock size offered by the UBI device. 127 * Note, @leb_size is the logical eraseblock size offered by the UBI device.
124 * Volumes of this UBI device may have smaller logical eraseblock size if their 128 * Volumes of this UBI device may have smaller logical eraseblock size if their
125 * alignment is not equivalent to %1. 129 * alignment is not equivalent to %1.
130 *
131 * The @max_write_size field describes flash write maximum write unit. For
132 * example, NOR flash allows for changing individual bytes, so @min_io_size is
133 * %1. However, it does not mean than NOR flash has to write data byte-by-byte.
134 * Instead, CFI NOR flashes have a write-buffer of, e.g., 64 bytes, and when
135 * writing large chunks of data, they write 64-bytes at a time. Obviously, this
136 * improves write throughput.
137 *
138 * Also, the MTD device may have N interleaved (striped) flash chips
139 * underneath, in which case @min_io_size can be physical min. I/O size of
140 * single flash chip, while @max_write_size can be N * @min_io_size.
141 *
142 * The @max_write_size field is always greater or equivalent to @min_io_size.
143 * E.g., some NOR flashes may have (@min_io_size = 1, @max_write_size = 64). In
144 * contrast, NAND flashes usually have @min_io_size = @max_write_size = NAND
145 * page size.
126 */ 146 */
127struct ubi_device_info { 147struct ubi_device_info {
128 int ubi_num; 148 int ubi_num;
129 int leb_size; 149 int leb_size;
150 int leb_start;
130 int min_io_size; 151 int min_io_size;
152 int max_write_size;
131 int ro_mode; 153 int ro_mode;
132 dev_t cdev; 154 dev_t cdev;
133}; 155};
diff --git a/include/linux/mtd/xip.h b/include/linux/mtd/xip.h
index 36efcba15ecd..abed4dec5c2f 100644
--- a/include/linux/mtd/xip.h
+++ b/include/linux/mtd/xip.h
@@ -51,7 +51,7 @@
51 * return in usecs the elapsed timebetween now and the reference x as 51 * return in usecs the elapsed timebetween now and the reference x as
52 * returned by xip_currtime(). 52 * returned by xip_currtime().
53 * 53 *
54 * note 1: convertion to usec can be approximated, as long as the 54 * note 1: conversion to usec can be approximated, as long as the
55 * returned value is <= the real elapsed time. 55 * returned value is <= the real elapsed time.
56 * note 2: this should be able to cope with a few seconds without 56 * note 2: this should be able to cope with a few seconds without
57 * overflowing. 57 * overflowing.
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-14 15:21:47 -0400