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authorSimon Horman <horms@verge.net.au>2011-06-20 19:00:08 -0400
committerChris Ball <cjb@laptop.org>2011-07-20 17:20:55 -0400
commit95c7348d948dc4832434ddfaeba804ac14732f02 (patch)
treef1795c7d0ad42672d0884430f070f2cdaeed07f2 /include/linux/mmc
parent4c2b8f26eb8b54203e0e7834e0f7a11a7ae15ef1 (diff)
mmc: tmio: name 0xd8 as CTL_DMA_ENABLE
This reflects at least the current usage of this register and I think it improves the readability of the code ever so slightly. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'include/linux/mmc')
-rw-r--r--include/linux/mmc/tmio.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mmc/tmio.h b/include/linux/mmc/tmio.h
index 551490f0613d..3ae377623db0 100644
--- a/include/linux/mmc/tmio.h
+++ b/include/linux/mmc/tmio.h
@@ -30,6 +30,7 @@
30#define CTL_TRANSACTION_CTL 0x34 30#define CTL_TRANSACTION_CTL 0x34
31#define CTL_SDIO_STATUS 0x36 31#define CTL_SDIO_STATUS 0x36
32#define CTL_SDIO_IRQ_MASK 0x38 32#define CTL_SDIO_IRQ_MASK 0x38
33#define CTL_DMA_ENABLE 0xd8
33#define CTL_RESET_SD 0xe0 34#define CTL_RESET_SD 0xe0
34#define CTL_SDIO_REGS 0x100 35#define CTL_SDIO_REGS 0x100
35#define CTL_CLK_AND_WAIT_CTL 0x138 36#define CTL_CLK_AND_WAIT_CTL 0x138