diff options
| author | Yevgeny Petrilin <yevgenyp@mellanox.co.il> | 2008-10-22 18:38:42 -0400 |
|---|---|---|
| committer | Roland Dreier <rolandd@cisco.com> | 2008-10-22 18:38:42 -0400 |
| commit | 7ff93f8b7ecbc36e7ffc5c11a61643821c1bfee5 (patch) | |
| tree | 4b38e1ead8b27a480cc766f6927dccf5b63793ae /include/linux/mlx4 | |
| parent | 2a2336f8228292b8197f4187e54b0748903e6645 (diff) | |
mlx4_core: Multiple port type support
Multi-protocol adapters support different port types. Each consumer
of mlx4_core queries for supported port types; in particular mlx4_ib
can no longer assume that all physical ports belong to it. Port type
is configured through a sysfs interface. When the type of a port is
changed, all mlx4 interfaces are unregistered, and then registered
again with the new port types.
Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'include/linux/mlx4')
| -rw-r--r-- | include/linux/mlx4/device.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 1951fe70a251..bd9977b89490 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h | |||
| @@ -60,6 +60,7 @@ enum { | |||
| 60 | MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 << 7, | 60 | MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 << 7, |
| 61 | MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 << 8, | 61 | MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 << 8, |
| 62 | MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 << 9, | 62 | MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 << 9, |
| 63 | MLX4_DEV_CAP_FLAG_DPDP = 1 << 12, | ||
| 63 | MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 << 16, | 64 | MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 << 16, |
| 64 | MLX4_DEV_CAP_FLAG_APM = 1 << 17, | 65 | MLX4_DEV_CAP_FLAG_APM = 1 << 17, |
| 65 | MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18, | 66 | MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18, |
| @@ -153,6 +154,11 @@ enum mlx4_qp_region { | |||
| 153 | MLX4_NUM_QP_REGION | 154 | MLX4_NUM_QP_REGION |
| 154 | }; | 155 | }; |
| 155 | 156 | ||
| 157 | enum mlx4_port_type { | ||
| 158 | MLX4_PORT_TYPE_IB = 1 << 0, | ||
| 159 | MLX4_PORT_TYPE_ETH = 1 << 1, | ||
| 160 | }; | ||
| 161 | |||
| 156 | enum mlx4_special_vlan_idx { | 162 | enum mlx4_special_vlan_idx { |
| 157 | MLX4_NO_VLAN_IDX = 0, | 163 | MLX4_NO_VLAN_IDX = 0, |
| 158 | MLX4_VLAN_MISS_IDX, | 164 | MLX4_VLAN_MISS_IDX, |
| @@ -226,6 +232,9 @@ struct mlx4_caps { | |||
| 226 | int log_num_macs; | 232 | int log_num_macs; |
| 227 | int log_num_vlans; | 233 | int log_num_vlans; |
| 228 | int log_num_prios; | 234 | int log_num_prios; |
| 235 | enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1]; | ||
| 236 | u8 supported_type[MLX4_MAX_PORTS + 1]; | ||
| 237 | u32 port_mask; | ||
| 229 | }; | 238 | }; |
| 230 | 239 | ||
| 231 | struct mlx4_buf_list { | 240 | struct mlx4_buf_list { |
| @@ -380,6 +389,11 @@ struct mlx4_init_port_param { | |||
| 380 | u64 si_guid; | 389 | u64 si_guid; |
| 381 | }; | 390 | }; |
| 382 | 391 | ||
| 392 | #define mlx4_foreach_port(port, dev, type) \ | ||
| 393 | for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ | ||
| 394 | if (((type) == MLX4_PORT_TYPE_IB ? (dev)->caps.port_mask : \ | ||
| 395 | ~(dev)->caps.port_mask) & 1 << ((port) - 1)) | ||
| 396 | |||
| 383 | int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, | 397 | int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, |
| 384 | struct mlx4_buf *buf); | 398 | struct mlx4_buf *buf); |
| 385 | void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); | 399 | void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); |
