diff options
| author | Roger Tseng <rogerable@realtek.com> | 2013-02-04 02:45:59 -0500 |
|---|---|---|
| committer | Samuel Ortiz <sameo@linux.intel.com> | 2013-02-13 18:22:59 -0500 |
| commit | e12379320b2e1ceffc4211ad174989bc042149d9 (patch) | |
| tree | 6dbf4d9e74fc6e43a59641dc9f4489f558415730 /include/linux/mfd | |
| parent | 88a7ee37f3c5c73b000f7ba2000b27c5002a5286 (diff) | |
mfd: rtsx: Support RTS5227
Support new model RTS5227.
Signed-off-by: Roger Tseng <rogerable@realtek.com>
Reviewed-by: Wei WANG <wei_wang@realsil.com.cn>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/rtsx_pci.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h index 3f2bf26ca0d1..5d9b81e8aff4 100644 --- a/include/linux/mfd/rtsx_pci.h +++ b/include/linux/mfd/rtsx_pci.h | |||
| @@ -581,8 +581,11 @@ | |||
| 581 | #define CARD_GPIO_DIR 0xFD57 | 581 | #define CARD_GPIO_DIR 0xFD57 |
| 582 | #define CARD_GPIO 0xFD58 | 582 | #define CARD_GPIO 0xFD58 |
| 583 | #define CARD_DATA_SOURCE 0xFD5B | 583 | #define CARD_DATA_SOURCE 0xFD5B |
| 584 | #define SD30_CLK_DRIVE_SEL 0xFD5A | ||
| 584 | #define CARD_SELECT 0xFD5C | 585 | #define CARD_SELECT 0xFD5C |
| 585 | #define SD30_DRIVE_SEL 0xFD5E | 586 | #define SD30_DRIVE_SEL 0xFD5E |
| 587 | #define SD30_CMD_DRIVE_SEL 0xFD5E | ||
| 588 | #define SD30_DAT_DRIVE_SEL 0xFD5F | ||
| 586 | #define CARD_CLK_EN 0xFD69 | 589 | #define CARD_CLK_EN 0xFD69 |
| 587 | #define SDIO_CTRL 0xFD6B | 590 | #define SDIO_CTRL 0xFD6B |
| 588 | #define CD_PAD_CTL 0xFD73 | 591 | #define CD_PAD_CTL 0xFD73 |
| @@ -655,6 +658,8 @@ | |||
| 655 | #define MSGTXDATA3 0xFE47 | 658 | #define MSGTXDATA3 0xFE47 |
| 656 | #define MSGTXCTL 0xFE48 | 659 | #define MSGTXCTL 0xFE48 |
| 657 | #define PETXCFG 0xFE49 | 660 | #define PETXCFG 0xFE49 |
| 661 | #define LTR_CTL 0xFE4A | ||
| 662 | #define OBFF_CFG 0xFE4C | ||
| 658 | 663 | ||
| 659 | #define CDRESUMECTL 0xFE52 | 664 | #define CDRESUMECTL 0xFE52 |
| 660 | #define WAKE_SEL_CTL 0xFE54 | 665 | #define WAKE_SEL_CTL 0xFE54 |
