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authorDavide Ciminaghi <ciminaghi@gnudd.com>2012-11-09 09:19:53 -0500
committerSamuel Ortiz <sameo@linux.intel.com>2012-11-20 06:21:14 -0500
commitd94e25535a7979a6c81922496f475a5dd0e006b4 (patch)
tree93a5e8c9dbd8d64b278eabdca201aa02c653744f /include/linux/mfd
parent1950c7164646bfeeb82c34bc299d82119706afb5 (diff)
mfd: sta2x11-mfd: Add regmap support
Signed-off-by: Davide Ciminaghi <ciminaghi@gnudd.com> Acked-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include/linux/mfd')
-rw-r--r--include/linux/mfd/sta2x11-mfd.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mfd/sta2x11-mfd.h b/include/linux/mfd/sta2x11-mfd.h
index 4d858797d7e2..83344304f2cf 100644
--- a/include/linux/mfd/sta2x11-mfd.h
+++ b/include/linux/mfd/sta2x11-mfd.h
@@ -246,6 +246,7 @@ u32 sta2x11_sctl_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
246#define SCTL_SCPEREN1 0x20 /* Peripheral clock enable register 1 */ 246#define SCTL_SCPEREN1 0x20 /* Peripheral clock enable register 1 */
247#define SCTL_SCPEREN2 0x24 /* Peripheral clock enable register 2 */ 247#define SCTL_SCPEREN2 0x24 /* Peripheral clock enable register 2 */
248#define SCTL_SCGRST 0x28 /* Peripheral global reset */ 248#define SCTL_SCGRST 0x28 /* Peripheral global reset */
249#define SCTL_SCPCIECSBRST 0x2c /* PCIe PAB CSB reset status register */
249#define SCTL_SCPCIPMCR1 0x30 /* PCI power management control 1 */ 250#define SCTL_SCPCIPMCR1 0x30 /* PCI power management control 1 */
250#define SCTL_SCPCIPMCR2 0x34 /* PCI power management control 2 */ 251#define SCTL_SCPCIPMCR2 0x34 /* PCI power management control 2 */
251#define SCTL_SCPCIPMSR1 0x38 /* PCI power management status 1 */ 252#define SCTL_SCPCIPMSR1 0x38 /* PCI power management status 1 */