diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-21 13:58:17 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-21 13:58:17 -0500 |
| commit | ac26663572db5b64522b92f3941a58678a832a36 (patch) | |
| tree | 3a8d27153de37cb3f3fb0ff6843a1e727c961005 /include/linux/mfd | |
| parent | d4371f94bc003e912d4825f5c4bdf57959857073 (diff) | |
| parent | 02915661dbb91b25b621ab3f387ab55311bded7f (diff) | |
Merge tag 'mfd-3.14-1' of git://git.linaro.org/people/ljones/mfd
Pull MFD changes from Lee Jones:
"New drivers
- Samsung Maxim 14577; Micro USB, Regulator, IRQ Controller and
Battery Charger
- TI/National Semiconductor LP3943 I2C GPIO Expander and PWM
Generator
Existing driver adaptions
- Expansion of Wolfson Arizona DSP and High-Pass filter controls
- TI TWL6040 default Regmap support and Regcache addition/bypass
- Some nice Smatch catch fixes
- Conversion of TI OMAP-USB and TI TWL6030 to endian neutralness
- ChromeOS EC timing (delay) adaptions and added dependency on OF
- Many constifications of 'struct {mfd_cell,regmap_irq,et.al}'
- Watchdog support added for NVIDIA AS3722
- Convert functions to static in TI AM335x
- Realigned previously defeated functionality in TI AM335x
- IIO ADC-TSC concurrency dead-lock/timeout resolution
- Addition of Power Management and Clock support for Samsung core
- DEFINE_PCI_DEVICE_TABLE macro removal from MFD Subsystem
- Greater use of irqdomain functionality in ST-E AB8500
- Removal of 'include/linux/mfd/abx500/ab8500-gpio.h'
- Wolfson WM831x PMIC Power Management changes s/poweroff/shutdown/
- Device Tree documentation added for TI/Nat Semi LP3943
- Version detection and voltage tables for TI TPS6586x PMIC devices
- Simplification of Freescale MC13XXX (de-)initialisation routines
- Clean-up and simplification of the Realtek parent driver
- Added support for RTL8402 Realtek PCI-Express card reader
- Resource leak fix for Maxim 77686
- Possible suspend BUG() fix in OMAP USB TLL
- Support for new Wolfson WM5110 Revision (D)
- Testing of automatic assignment of of_node in mfd_add_device()
- Reversion of the above when it started to cause issues
- Remove legacy Platform Data from;
TI TWL Core, Qualcomm SSBI and ST-E ABx500 Pinctrl
- Clean-ups; tabbing issues, function name changes, 'drvdata = NULL'
removal, unused uninitialised warning mitigation, error
message clarity, removal of redundant/duplicate checks,
licensing (GPL -> GPL2), coding consistency, duplicate
function declaration, ret checks, commit corrections,
redundant of_match_ptr() helper removal, spelling,
#if-deffery removal and header guards name changes"
* tag 'mfd-3.14-1' of git://git.linaro.org/people/ljones/mfd: (78 commits)
mfd: wm5110: Add register patch for rev D chip
mfd: omap-usb-tll: Don't hold lock during pm_runtime_get/put_sync()
gpio: lp3943: Remove redundant of_match_ptr helper
mfd: sta2x11-mfd: Use named constants for pci_power_t values
Documentation: mfd: Fix LDO index in s2mps11.txt
mfd: Cleanup mfd-mcp-sa11x0.h header
mfd: max8997: Use "IS_ENABLED(CONFIG_OF)" for DT code.
mfd: twl6030: Fix endianness problem in IRQ handler
mfd: sec-core: Add cells for S5M8767-clocks
mfd: max14577: Remove redundant of_match_ptr helper
mfd: twl6040: Fix sparse non static symbol warning
mfd: Revert "mfd: Always assign of_node in mfd_add_device()"
mfd: rtsx: Fix sparse non static symbol warning
mfd: max77693: Set proper maximum register for MUIC regmap
mfd: max77686: Fix regmap resource leak on driver remove
mfd: Represent correct filenames in file headers
mfd: rtsx: Add support for card reader rtl8402
mfd: rtsx: Add set pull control macro and simplify rtl8411
mfd: max8997: Enforce mfd_add_devices() return value check
mfd: mc13xxx: Simplify probe() & remove()
...
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/abx500/ab8500-gpio.h | 33 | ||||
| -rw-r--r-- | include/linux/mfd/abx500/ab8500.h | 2 | ||||
| -rw-r--r-- | include/linux/mfd/lp3943.h | 114 | ||||
| -rw-r--r-- | include/linux/mfd/max14577-private.h | 330 | ||||
| -rw-r--r-- | include/linux/mfd/max14577.h | 69 | ||||
| -rw-r--r-- | include/linux/mfd/max77686-private.h | 2 | ||||
| -rw-r--r-- | include/linux/mfd/max8997-private.h | 2 | ||||
| -rw-r--r-- | include/linux/mfd/max8998-private.h | 2 | ||||
| -rw-r--r-- | include/linux/mfd/mc13xxx.h | 2 | ||||
| -rw-r--r-- | include/linux/mfd/ti_am335x_tscadc.h | 8 | ||||
| -rw-r--r-- | include/linux/mfd/tps6586x.h | 7 |
11 files changed, 529 insertions, 42 deletions
diff --git a/include/linux/mfd/abx500/ab8500-gpio.h b/include/linux/mfd/abx500/ab8500-gpio.h deleted file mode 100644 index 172b2f201ae0..000000000000 --- a/include/linux/mfd/abx500/ab8500-gpio.h +++ /dev/null | |||
| @@ -1,33 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright ST-Ericsson 2010. | ||
| 3 | * | ||
| 4 | * Author: Bibek Basu <bibek.basu@stericsson.com> | ||
| 5 | * Licensed under GPLv2. | ||
| 6 | */ | ||
| 7 | |||
| 8 | #ifndef _AB8500_GPIO_H | ||
| 9 | #define _AB8500_GPIO_H | ||
| 10 | |||
| 11 | /* | ||
| 12 | * Platform data to register a block: only the initial gpio/irq number. | ||
| 13 | * Array sizes are large enough to contain all AB8500 and AB9540 GPIO | ||
| 14 | * registers. | ||
| 15 | */ | ||
| 16 | |||
| 17 | struct abx500_gpio_platform_data { | ||
| 18 | int gpio_base; | ||
| 19 | }; | ||
| 20 | |||
| 21 | enum abx500_gpio_pull_updown { | ||
| 22 | ABX500_GPIO_PULL_DOWN = 0x0, | ||
| 23 | ABX500_GPIO_PULL_NONE = 0x1, | ||
| 24 | ABX500_GPIO_PULL_UP = 0x3, | ||
| 25 | }; | ||
| 26 | |||
| 27 | enum abx500_gpio_vinsel { | ||
| 28 | ABX500_GPIO_VINSEL_VBAT = 0x0, | ||
| 29 | ABX500_GPIO_VINSEL_VIN_1V8 = 0x1, | ||
| 30 | ABX500_GPIO_VINSEL_VDD_BIF = 0x2, | ||
| 31 | }; | ||
| 32 | |||
| 33 | #endif /* _AB8500_GPIO_H */ | ||
diff --git a/include/linux/mfd/abx500/ab8500.h b/include/linux/mfd/abx500/ab8500.h index f4acd898dac9..a86ca1406fb8 100644 --- a/include/linux/mfd/abx500/ab8500.h +++ b/include/linux/mfd/abx500/ab8500.h | |||
| @@ -368,7 +368,6 @@ struct ab8500 { | |||
| 368 | }; | 368 | }; |
| 369 | 369 | ||
| 370 | struct ab8500_regulator_platform_data; | 370 | struct ab8500_regulator_platform_data; |
| 371 | struct ab8500_gpio_platform_data; | ||
| 372 | struct ab8500_codec_platform_data; | 371 | struct ab8500_codec_platform_data; |
| 373 | struct ab8500_sysctrl_platform_data; | 372 | struct ab8500_sysctrl_platform_data; |
| 374 | 373 | ||
| @@ -382,7 +381,6 @@ struct ab8500_platform_data { | |||
| 382 | int irq_base; | 381 | int irq_base; |
| 383 | void (*init) (struct ab8500 *); | 382 | void (*init) (struct ab8500 *); |
| 384 | struct ab8500_regulator_platform_data *regulator; | 383 | struct ab8500_regulator_platform_data *regulator; |
| 385 | struct abx500_gpio_platform_data *gpio; | ||
| 386 | struct ab8500_codec_platform_data *codec; | 384 | struct ab8500_codec_platform_data *codec; |
| 387 | struct ab8500_sysctrl_platform_data *sysctrl; | 385 | struct ab8500_sysctrl_platform_data *sysctrl; |
| 388 | }; | 386 | }; |
diff --git a/include/linux/mfd/lp3943.h b/include/linux/mfd/lp3943.h new file mode 100644 index 000000000000..3490db782988 --- /dev/null +++ b/include/linux/mfd/lp3943.h | |||
| @@ -0,0 +1,114 @@ | |||
| 1 | /* | ||
| 2 | * TI/National Semiconductor LP3943 Device | ||
| 3 | * | ||
| 4 | * Copyright 2013 Texas Instruments | ||
| 5 | * | ||
| 6 | * Author: Milo Kim <milo.kim@ti.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef __MFD_LP3943_H__ | ||
| 15 | #define __MFD_LP3943_H__ | ||
| 16 | |||
| 17 | #include <linux/gpio.h> | ||
| 18 | #include <linux/pwm.h> | ||
| 19 | #include <linux/regmap.h> | ||
| 20 | |||
| 21 | /* Registers */ | ||
| 22 | #define LP3943_REG_GPIO_A 0x00 | ||
| 23 | #define LP3943_REG_GPIO_B 0x01 | ||
| 24 | #define LP3943_REG_PRESCALE0 0x02 | ||
| 25 | #define LP3943_REG_PWM0 0x03 | ||
| 26 | #define LP3943_REG_PRESCALE1 0x04 | ||
| 27 | #define LP3943_REG_PWM1 0x05 | ||
| 28 | #define LP3943_REG_MUX0 0x06 | ||
| 29 | #define LP3943_REG_MUX1 0x07 | ||
| 30 | #define LP3943_REG_MUX2 0x08 | ||
| 31 | #define LP3943_REG_MUX3 0x09 | ||
| 32 | |||
| 33 | /* Bit description for LP3943_REG_MUX0 ~ 3 */ | ||
| 34 | #define LP3943_GPIO_IN 0x00 | ||
| 35 | #define LP3943_GPIO_OUT_HIGH 0x00 | ||
| 36 | #define LP3943_GPIO_OUT_LOW 0x01 | ||
| 37 | #define LP3943_DIM_PWM0 0x02 | ||
| 38 | #define LP3943_DIM_PWM1 0x03 | ||
| 39 | |||
| 40 | #define LP3943_NUM_PWMS 2 | ||
| 41 | |||
| 42 | enum lp3943_pwm_output { | ||
| 43 | LP3943_PWM_OUT0, | ||
| 44 | LP3943_PWM_OUT1, | ||
| 45 | LP3943_PWM_OUT2, | ||
| 46 | LP3943_PWM_OUT3, | ||
| 47 | LP3943_PWM_OUT4, | ||
| 48 | LP3943_PWM_OUT5, | ||
| 49 | LP3943_PWM_OUT6, | ||
| 50 | LP3943_PWM_OUT7, | ||
| 51 | LP3943_PWM_OUT8, | ||
| 52 | LP3943_PWM_OUT9, | ||
| 53 | LP3943_PWM_OUT10, | ||
| 54 | LP3943_PWM_OUT11, | ||
| 55 | LP3943_PWM_OUT12, | ||
| 56 | LP3943_PWM_OUT13, | ||
| 57 | LP3943_PWM_OUT14, | ||
| 58 | LP3943_PWM_OUT15, | ||
| 59 | }; | ||
| 60 | |||
| 61 | /* | ||
| 62 | * struct lp3943_pwm_map | ||
| 63 | * @output: Output pins which are mapped to each PWM channel | ||
| 64 | * @num_outputs: Number of outputs | ||
| 65 | */ | ||
| 66 | struct lp3943_pwm_map { | ||
| 67 | enum lp3943_pwm_output *output; | ||
| 68 | int num_outputs; | ||
| 69 | }; | ||
| 70 | |||
| 71 | /* | ||
| 72 | * struct lp3943_platform_data | ||
| 73 | * @pwms: Output channel definitions for PWM channel 0 and 1 | ||
| 74 | */ | ||
| 75 | struct lp3943_platform_data { | ||
| 76 | struct lp3943_pwm_map *pwms[LP3943_NUM_PWMS]; | ||
| 77 | }; | ||
| 78 | |||
| 79 | /* | ||
| 80 | * struct lp3943_reg_cfg | ||
| 81 | * @reg: Register address | ||
| 82 | * @mask: Register bit mask to be updated | ||
| 83 | * @shift: Register bit shift | ||
| 84 | */ | ||
| 85 | struct lp3943_reg_cfg { | ||
| 86 | u8 reg; | ||
| 87 | u8 mask; | ||
| 88 | u8 shift; | ||
| 89 | }; | ||
| 90 | |||
| 91 | /* | ||
| 92 | * struct lp3943 | ||
| 93 | * @dev: Parent device pointer | ||
| 94 | * @regmap: Used for I2C communication on accessing registers | ||
| 95 | * @pdata: LP3943 platform specific data | ||
| 96 | * @mux_cfg: Register configuration for pin MUX | ||
| 97 | * @pin_used: Bit mask for output pin used. | ||
| 98 | * This bitmask is used for pin assignment management. | ||
| 99 | * 1 = pin used, 0 = available. | ||
| 100 | * Only LSB 16 bits are used, but it is unsigned long type | ||
| 101 | * for atomic bitwise operations. | ||
| 102 | */ | ||
| 103 | struct lp3943 { | ||
| 104 | struct device *dev; | ||
| 105 | struct regmap *regmap; | ||
| 106 | struct lp3943_platform_data *pdata; | ||
| 107 | const struct lp3943_reg_cfg *mux_cfg; | ||
| 108 | unsigned long pin_used; | ||
| 109 | }; | ||
| 110 | |||
| 111 | int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read); | ||
| 112 | int lp3943_write_byte(struct lp3943 *lp3943, u8 reg, u8 data); | ||
| 113 | int lp3943_update_bits(struct lp3943 *lp3943, u8 reg, u8 mask, u8 data); | ||
| 114 | #endif | ||
diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h new file mode 100644 index 000000000000..a3d0185196d3 --- /dev/null +++ b/include/linux/mfd/max14577-private.h | |||
| @@ -0,0 +1,330 @@ | |||
| 1 | /* | ||
| 2 | * max14577-private.h - Common API for the Maxim 14577 internal sub chip | ||
| 3 | * | ||
| 4 | * Copyright (C) 2013 Samsung Electrnoics | ||
| 5 | * Chanwoo Choi <cw00.choi@samsung.com> | ||
| 6 | * Krzysztof Kozlowski <k.kozlowski@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License, or | ||
| 11 | * (at your option) any later version. | ||
| 12 | * | ||
| 13 | * This program is distributed in the hope that it will be useful, | ||
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 16 | * GNU General Public License for more details. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef __MAX14577_PRIVATE_H__ | ||
| 20 | #define __MAX14577_PRIVATE_H__ | ||
| 21 | |||
| 22 | #include <linux/i2c.h> | ||
| 23 | #include <linux/regmap.h> | ||
| 24 | |||
| 25 | #define MAX14577_REG_INVALID (0xff) | ||
| 26 | |||
| 27 | /* Slave addr = 0x4A: Interrupt */ | ||
| 28 | enum max14577_reg { | ||
| 29 | MAX14577_REG_DEVICEID = 0x00, | ||
| 30 | MAX14577_REG_INT1 = 0x01, | ||
| 31 | MAX14577_REG_INT2 = 0x02, | ||
| 32 | MAX14577_REG_INT3 = 0x03, | ||
| 33 | MAX14577_REG_STATUS1 = 0x04, | ||
| 34 | MAX14577_REG_STATUS2 = 0x05, | ||
| 35 | MAX14577_REG_STATUS3 = 0x06, | ||
| 36 | MAX14577_REG_INTMASK1 = 0x07, | ||
| 37 | MAX14577_REG_INTMASK2 = 0x08, | ||
| 38 | MAX14577_REG_INTMASK3 = 0x09, | ||
| 39 | MAX14577_REG_CDETCTRL1 = 0x0A, | ||
| 40 | MAX14577_REG_RFU = 0x0B, | ||
| 41 | MAX14577_REG_CONTROL1 = 0x0C, | ||
| 42 | MAX14577_REG_CONTROL2 = 0x0D, | ||
| 43 | MAX14577_REG_CONTROL3 = 0x0E, | ||
| 44 | MAX14577_REG_CHGCTRL1 = 0x0F, | ||
| 45 | MAX14577_REG_CHGCTRL2 = 0x10, | ||
| 46 | MAX14577_REG_CHGCTRL3 = 0x11, | ||
| 47 | MAX14577_REG_CHGCTRL4 = 0x12, | ||
| 48 | MAX14577_REG_CHGCTRL5 = 0x13, | ||
| 49 | MAX14577_REG_CHGCTRL6 = 0x14, | ||
| 50 | MAX14577_REG_CHGCTRL7 = 0x15, | ||
| 51 | |||
| 52 | MAX14577_REG_END, | ||
| 53 | }; | ||
| 54 | |||
| 55 | /* Slave addr = 0x4A: MUIC */ | ||
| 56 | enum max14577_muic_reg { | ||
| 57 | MAX14577_MUIC_REG_STATUS1 = 0x04, | ||
| 58 | MAX14577_MUIC_REG_STATUS2 = 0x05, | ||
| 59 | MAX14577_MUIC_REG_CONTROL1 = 0x0C, | ||
| 60 | MAX14577_MUIC_REG_CONTROL3 = 0x0E, | ||
| 61 | |||
| 62 | MAX14577_MUIC_REG_END, | ||
| 63 | }; | ||
| 64 | |||
| 65 | enum max14577_muic_charger_type { | ||
| 66 | MAX14577_CHARGER_TYPE_NONE = 0, | ||
| 67 | MAX14577_CHARGER_TYPE_USB, | ||
| 68 | MAX14577_CHARGER_TYPE_DOWNSTREAM_PORT, | ||
| 69 | MAX14577_CHARGER_TYPE_DEDICATED_CHG, | ||
| 70 | MAX14577_CHARGER_TYPE_SPECIAL_500MA, | ||
| 71 | MAX14577_CHARGER_TYPE_SPECIAL_1A, | ||
| 72 | MAX14577_CHARGER_TYPE_RESERVED, | ||
| 73 | MAX14577_CHARGER_TYPE_DEAD_BATTERY = 7, | ||
| 74 | }; | ||
| 75 | |||
| 76 | /* MAX14577 interrupts */ | ||
| 77 | #define INT1_ADC_MASK (0x1 << 0) | ||
| 78 | #define INT1_ADCLOW_MASK (0x1 << 1) | ||
| 79 | #define INT1_ADCERR_MASK (0x1 << 2) | ||
| 80 | |||
| 81 | #define INT2_CHGTYP_MASK (0x1 << 0) | ||
| 82 | #define INT2_CHGDETRUN_MASK (0x1 << 1) | ||
| 83 | #define INT2_DCDTMR_MASK (0x1 << 2) | ||
| 84 | #define INT2_DBCHG_MASK (0x1 << 3) | ||
| 85 | #define INT2_VBVOLT_MASK (0x1 << 4) | ||
| 86 | |||
| 87 | #define INT3_EOC_MASK (0x1 << 0) | ||
| 88 | #define INT3_CGMBC_MASK (0x1 << 1) | ||
| 89 | #define INT3_OVP_MASK (0x1 << 2) | ||
| 90 | #define INT3_MBCCHGERR_MASK (0x1 << 3) | ||
| 91 | |||
| 92 | /* MAX14577 DEVICE ID register */ | ||
| 93 | #define DEVID_VENDORID_SHIFT 0 | ||
| 94 | #define DEVID_DEVICEID_SHIFT 3 | ||
| 95 | #define DEVID_VENDORID_MASK (0x07 << DEVID_VENDORID_SHIFT) | ||
| 96 | #define DEVID_DEVICEID_MASK (0x1f << DEVID_DEVICEID_SHIFT) | ||
| 97 | |||
| 98 | /* MAX14577 STATUS1 register */ | ||
| 99 | #define STATUS1_ADC_SHIFT 0 | ||
| 100 | #define STATUS1_ADCLOW_SHIFT 5 | ||
| 101 | #define STATUS1_ADCERR_SHIFT 6 | ||
| 102 | #define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT) | ||
| 103 | #define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT) | ||
| 104 | #define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT) | ||
| 105 | |||
| 106 | /* MAX14577 STATUS2 register */ | ||
| 107 | #define STATUS2_CHGTYP_SHIFT 0 | ||
| 108 | #define STATUS2_CHGDETRUN_SHIFT 3 | ||
| 109 | #define STATUS2_DCDTMR_SHIFT 4 | ||
| 110 | #define STATUS2_DBCHG_SHIFT 5 | ||
| 111 | #define STATUS2_VBVOLT_SHIFT 6 | ||
| 112 | #define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT) | ||
| 113 | #define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT) | ||
| 114 | #define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT) | ||
| 115 | #define STATUS2_DBCHG_MASK (0x1 << STATUS2_DBCHG_SHIFT) | ||
| 116 | #define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT) | ||
| 117 | |||
| 118 | /* MAX14577 CONTROL1 register */ | ||
| 119 | #define COMN1SW_SHIFT 0 | ||
| 120 | #define COMP2SW_SHIFT 3 | ||
| 121 | #define MICEN_SHIFT 6 | ||
| 122 | #define IDBEN_SHIFT 7 | ||
| 123 | #define COMN1SW_MASK (0x7 << COMN1SW_SHIFT) | ||
| 124 | #define COMP2SW_MASK (0x7 << COMP2SW_SHIFT) | ||
| 125 | #define MICEN_MASK (0x1 << MICEN_SHIFT) | ||
| 126 | #define IDBEN_MASK (0x1 << IDBEN_SHIFT) | ||
| 127 | #define CLEAR_IDBEN_MICEN_MASK (COMN1SW_MASK | COMP2SW_MASK) | ||
| 128 | #define CTRL1_SW_USB ((1 << COMP2SW_SHIFT) \ | ||
| 129 | | (1 << COMN1SW_SHIFT)) | ||
| 130 | #define CTRL1_SW_AUDIO ((2 << COMP2SW_SHIFT) \ | ||
| 131 | | (2 << COMN1SW_SHIFT)) | ||
| 132 | #define CTRL1_SW_UART ((3 << COMP2SW_SHIFT) \ | ||
| 133 | | (3 << COMN1SW_SHIFT)) | ||
| 134 | #define CTRL1_SW_OPEN ((0 << COMP2SW_SHIFT) \ | ||
| 135 | | (0 << COMN1SW_SHIFT)) | ||
| 136 | |||
| 137 | /* MAX14577 CONTROL2 register */ | ||
| 138 | #define CTRL2_LOWPWR_SHIFT (0) | ||
| 139 | #define CTRL2_ADCEN_SHIFT (1) | ||
| 140 | #define CTRL2_CPEN_SHIFT (2) | ||
| 141 | #define CTRL2_SFOUTASRT_SHIFT (3) | ||
| 142 | #define CTRL2_SFOUTORD_SHIFT (4) | ||
| 143 | #define CTRL2_ACCDET_SHIFT (5) | ||
| 144 | #define CTRL2_USBCPINT_SHIFT (6) | ||
| 145 | #define CTRL2_RCPS_SHIFT (7) | ||
| 146 | #define CTRL2_LOWPWR_MASK (0x1 << CTRL2_LOWPWR_SHIFT) | ||
| 147 | #define CTRL2_ADCEN_MASK (0x1 << CTRL2_ADCEN_SHIFT) | ||
| 148 | #define CTRL2_CPEN_MASK (0x1 << CTRL2_CPEN_SHIFT) | ||
| 149 | #define CTRL2_SFOUTASRT_MASK (0x1 << CTRL2_SFOUTASRT_SHIFT) | ||
| 150 | #define CTRL2_SFOUTORD_MASK (0x1 << CTRL2_SFOUTORD_SHIFT) | ||
| 151 | #define CTRL2_ACCDET_MASK (0x1 << CTRL2_ACCDET_SHIFT) | ||
| 152 | #define CTRL2_USBCPINT_MASK (0x1 << CTRL2_USBCPINT_SHIFT) | ||
| 153 | #define CTRL2_RCPS_MASK (0x1 << CTR2_RCPS_SHIFT) | ||
| 154 | |||
| 155 | #define CTRL2_CPEN1_LOWPWR0 ((1 << CTRL2_CPEN_SHIFT) | \ | ||
| 156 | (0 << CTRL2_LOWPWR_SHIFT)) | ||
| 157 | #define CTRL2_CPEN0_LOWPWR1 ((0 << CTRL2_CPEN_SHIFT) | \ | ||
| 158 | (1 << CTRL2_LOWPWR_SHIFT)) | ||
| 159 | |||
| 160 | /* MAX14577 CONTROL3 register */ | ||
| 161 | #define CTRL3_JIGSET_SHIFT 0 | ||
| 162 | #define CTRL3_BOOTSET_SHIFT 2 | ||
| 163 | #define CTRL3_ADCDBSET_SHIFT 4 | ||
| 164 | #define CTRL3_JIGSET_MASK (0x3 << CTRL3_JIGSET_SHIFT) | ||
| 165 | #define CTRL3_BOOTSET_MASK (0x3 << CTRL3_BOOTSET_SHIFT) | ||
| 166 | #define CTRL3_ADCDBSET_MASK (0x3 << CTRL3_ADCDBSET_SHIFT) | ||
| 167 | |||
| 168 | /* Slave addr = 0x4A: Charger */ | ||
| 169 | enum max14577_charger_reg { | ||
| 170 | MAX14577_CHG_REG_STATUS3 = 0x06, | ||
| 171 | MAX14577_CHG_REG_CHG_CTRL1 = 0x0F, | ||
| 172 | MAX14577_CHG_REG_CHG_CTRL2 = 0x10, | ||
| 173 | MAX14577_CHG_REG_CHG_CTRL3 = 0x11, | ||
| 174 | MAX14577_CHG_REG_CHG_CTRL4 = 0x12, | ||
| 175 | MAX14577_CHG_REG_CHG_CTRL5 = 0x13, | ||
| 176 | MAX14577_CHG_REG_CHG_CTRL6 = 0x14, | ||
| 177 | MAX14577_CHG_REG_CHG_CTRL7 = 0x15, | ||
| 178 | |||
| 179 | MAX14577_CHG_REG_END, | ||
| 180 | }; | ||
| 181 | |||
| 182 | /* MAX14577 STATUS3 register */ | ||
| 183 | #define STATUS3_EOC_SHIFT 0 | ||
| 184 | #define STATUS3_CGMBC_SHIFT 1 | ||
| 185 | #define STATUS3_OVP_SHIFT 2 | ||
| 186 | #define STATUS3_MBCCHGERR_SHIFT 3 | ||
| 187 | #define STATUS3_EOC_MASK (0x1 << STATUS3_EOC_SHIFT) | ||
| 188 | #define STATUS3_CGMBC_MASK (0x1 << STATUS3_CGMBC_SHIFT) | ||
| 189 | #define STATUS3_OVP_MASK (0x1 << STATUS3_OVP_SHIFT) | ||
| 190 | #define STATUS3_MBCCHGERR_MASK (0x1 << STATUS3_MBCCHGERR_SHIFT) | ||
| 191 | |||
| 192 | /* MAX14577 CDETCTRL1 register */ | ||
| 193 | #define CDETCTRL1_CHGDETEN_SHIFT 0 | ||
| 194 | #define CDETCTRL1_CHGTYPMAN_SHIFT 1 | ||
| 195 | #define CDETCTRL1_DCDEN_SHIFT 2 | ||
| 196 | #define CDETCTRL1_DCD2SCT_SHIFT 3 | ||
| 197 | #define CDETCTRL1_DCHKTM_SHIFT 4 | ||
| 198 | #define CDETCTRL1_DBEXIT_SHIFT 5 | ||
| 199 | #define CDETCTRL1_DBIDLE_SHIFT 6 | ||
| 200 | #define CDETCTRL1_CDPDET_SHIFT 7 | ||
| 201 | #define CDETCTRL1_CHGDETEN_MASK (0x1 << CDETCTRL1_CHGDETEN_SHIFT) | ||
| 202 | #define CDETCTRL1_CHGTYPMAN_MASK (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT) | ||
| 203 | #define CDETCTRL1_DCDEN_MASK (0x1 << CDETCTRL1_DCDEN_SHIFT) | ||
| 204 | #define CDETCTRL1_DCD2SCT_MASK (0x1 << CDETCTRL1_DCD2SCT_SHIFT) | ||
| 205 | #define CDETCTRL1_DCHKTM_MASK (0x1 << CDETCTRL1_DCHKTM_SHIFT) | ||
| 206 | #define CDETCTRL1_DBEXIT_MASK (0x1 << CDETCTRL1_DBEXIT_SHIFT) | ||
| 207 | #define CDETCTRL1_DBIDLE_MASK (0x1 << CDETCTRL1_DBIDLE_SHIFT) | ||
| 208 | #define CDETCTRL1_CDPDET_MASK (0x1 << CDETCTRL1_CDPDET_SHIFT) | ||
| 209 | |||
| 210 | /* MAX14577 CHGCTRL1 register */ | ||
| 211 | #define CHGCTRL1_TCHW_SHIFT 4 | ||
| 212 | #define CHGCTRL1_TCHW_MASK (0x7 << CHGCTRL1_TCHW_SHIFT) | ||
| 213 | |||
| 214 | /* MAX14577 CHGCTRL2 register */ | ||
| 215 | #define CHGCTRL2_MBCHOSTEN_SHIFT 6 | ||
| 216 | #define CHGCTRL2_MBCHOSTEN_MASK (0x1 << CHGCTRL2_MBCHOSTEN_SHIFT) | ||
| 217 | #define CHGCTRL2_VCHGR_RC_SHIFT 7 | ||
| 218 | #define CHGCTRL2_VCHGR_RC_MASK (0x1 << CHGCTRL2_VCHGR_RC_SHIFT) | ||
| 219 | |||
| 220 | /* MAX14577 CHGCTRL3 register */ | ||
| 221 | #define CHGCTRL3_MBCCVWRC_SHIFT 0 | ||
| 222 | #define CHGCTRL3_MBCCVWRC_MASK (0xf << CHGCTRL3_MBCCVWRC_SHIFT) | ||
| 223 | |||
| 224 | /* MAX14577 CHGCTRL4 register */ | ||
| 225 | #define CHGCTRL4_MBCICHWRCH_SHIFT 0 | ||
| 226 | #define CHGCTRL4_MBCICHWRCH_MASK (0xf << CHGCTRL4_MBCICHWRCH_SHIFT) | ||
| 227 | #define CHGCTRL4_MBCICHWRCL_SHIFT 4 | ||
| 228 | #define CHGCTRL4_MBCICHWRCL_MASK (0x1 << CHGCTRL4_MBCICHWRCL_SHIFT) | ||
| 229 | |||
| 230 | /* MAX14577 CHGCTRL5 register */ | ||
| 231 | #define CHGCTRL5_EOCS_SHIFT 0 | ||
| 232 | #define CHGCTRL5_EOCS_MASK (0xf << CHGCTRL5_EOCS_SHIFT) | ||
| 233 | |||
| 234 | /* MAX14577 CHGCTRL6 register */ | ||
| 235 | #define CHGCTRL6_AUTOSTOP_SHIFT 5 | ||
| 236 | #define CHGCTRL6_AUTOSTOP_MASK (0x1 << CHGCTRL6_AUTOSTOP_SHIFT) | ||
| 237 | |||
| 238 | /* MAX14577 CHGCTRL7 register */ | ||
| 239 | #define CHGCTRL7_OTPCGHCVS_SHIFT 0 | ||
| 240 | #define CHGCTRL7_OTPCGHCVS_MASK (0x3 << CHGCTRL7_OTPCGHCVS_SHIFT) | ||
| 241 | |||
| 242 | /* MAX14577 regulator current limits (as in CHGCTRL4 register), uA */ | ||
| 243 | #define MAX14577_REGULATOR_CURRENT_LIMIT_MIN 90000 | ||
| 244 | #define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_START 200000 | ||
| 245 | #define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_STEP 50000 | ||
| 246 | #define MAX14577_REGULATOR_CURRENT_LIMIT_MAX 950000 | ||
| 247 | |||
| 248 | /* MAX14577 regulator SFOUT LDO voltage, fixed, uV */ | ||
| 249 | #define MAX14577_REGULATOR_SAFEOUT_VOLTAGE 4900000 | ||
| 250 | |||
| 251 | enum max14577_irq_source { | ||
| 252 | MAX14577_IRQ_INT1 = 0, | ||
| 253 | MAX14577_IRQ_INT2, | ||
| 254 | MAX14577_IRQ_INT3, | ||
| 255 | |||
| 256 | MAX14577_IRQ_REGS_NUM, | ||
| 257 | }; | ||
| 258 | |||
| 259 | enum max14577_irq { | ||
| 260 | /* INT1 */ | ||
| 261 | MAX14577_IRQ_INT1_ADC, | ||
| 262 | MAX14577_IRQ_INT1_ADCLOW, | ||
| 263 | MAX14577_IRQ_INT1_ADCERR, | ||
| 264 | |||
| 265 | /* INT2 */ | ||
| 266 | MAX14577_IRQ_INT2_CHGTYP, | ||
| 267 | MAX14577_IRQ_INT2_CHGDETRUN, | ||
| 268 | MAX14577_IRQ_INT2_DCDTMR, | ||
| 269 | MAX14577_IRQ_INT2_DBCHG, | ||
| 270 | MAX14577_IRQ_INT2_VBVOLT, | ||
| 271 | |||
| 272 | /* INT3 */ | ||
| 273 | MAX14577_IRQ_INT3_EOC, | ||
| 274 | MAX14577_IRQ_INT3_CGMBC, | ||
| 275 | MAX14577_IRQ_INT3_OVP, | ||
| 276 | MAX14577_IRQ_INT3_MBCCHGERR, | ||
| 277 | |||
| 278 | MAX14577_IRQ_NUM, | ||
| 279 | }; | ||
| 280 | |||
| 281 | struct max14577 { | ||
| 282 | struct device *dev; | ||
| 283 | struct i2c_client *i2c; /* Slave addr = 0x4A */ | ||
| 284 | |||
| 285 | struct regmap *regmap; | ||
| 286 | |||
| 287 | struct regmap_irq_chip_data *irq_data; | ||
| 288 | int irq; | ||
| 289 | |||
| 290 | /* Device ID */ | ||
| 291 | u8 vendor_id; /* Vendor Identification */ | ||
| 292 | u8 device_id; /* Chip Version */ | ||
| 293 | }; | ||
| 294 | |||
| 295 | /* MAX14577 shared regmap API function */ | ||
| 296 | static inline int max14577_read_reg(struct regmap *map, u8 reg, u8 *dest) | ||
| 297 | { | ||
| 298 | unsigned int val; | ||
| 299 | int ret; | ||
| 300 | |||
| 301 | ret = regmap_read(map, reg, &val); | ||
| 302 | *dest = val; | ||
| 303 | |||
| 304 | return ret; | ||
| 305 | } | ||
| 306 | |||
| 307 | static inline int max14577_bulk_read(struct regmap *map, u8 reg, u8 *buf, | ||
| 308 | int count) | ||
| 309 | { | ||
| 310 | return regmap_bulk_read(map, reg, buf, count); | ||
| 311 | } | ||
| 312 | |||
| 313 | static inline int max14577_write_reg(struct regmap *map, u8 reg, u8 value) | ||
| 314 | { | ||
| 315 | return regmap_write(map, reg, value); | ||
| 316 | } | ||
| 317 | |||
| 318 | static inline int max14577_bulk_write(struct regmap *map, u8 reg, u8 *buf, | ||
| 319 | int count) | ||
| 320 | { | ||
| 321 | return regmap_bulk_write(map, reg, buf, count); | ||
| 322 | } | ||
| 323 | |||
| 324 | static inline int max14577_update_reg(struct regmap *map, u8 reg, u8 mask, | ||
| 325 | u8 val) | ||
| 326 | { | ||
| 327 | return regmap_update_bits(map, reg, mask, val); | ||
| 328 | } | ||
| 329 | |||
| 330 | #endif /* __MAX14577_PRIVATE_H__ */ | ||
diff --git a/include/linux/mfd/max14577.h b/include/linux/mfd/max14577.h new file mode 100644 index 000000000000..247b021dfaaf --- /dev/null +++ b/include/linux/mfd/max14577.h | |||
| @@ -0,0 +1,69 @@ | |||
| 1 | /* | ||
| 2 | * max14577.h - Driver for the Maxim 14577 | ||
| 3 | * | ||
| 4 | * Copyright (C) 2013 Samsung Electrnoics | ||
| 5 | * Chanwoo Choi <cw00.choi@samsung.com> | ||
| 6 | * Krzysztof Kozlowski <k.kozlowski@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License, or | ||
| 11 | * (at your option) any later version. | ||
| 12 | * | ||
| 13 | * This program is distributed in the hope that it will be useful, | ||
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 16 | * GNU General Public License for more details. | ||
| 17 | * | ||
| 18 | * This driver is based on max8997.h | ||
| 19 | * | ||
| 20 | * MAX14577 has MUIC, Charger devices. | ||
| 21 | * The devices share the same I2C bus and interrupt line | ||
| 22 | * included in this mfd driver. | ||
| 23 | */ | ||
| 24 | |||
| 25 | #ifndef __MAX14577_H__ | ||
| 26 | #define __MAX14577_H__ | ||
| 27 | |||
| 28 | #include <linux/mfd/max14577-private.h> | ||
| 29 | #include <linux/regulator/consumer.h> | ||
| 30 | |||
| 31 | /* | ||
| 32 | * MAX14577 Regulator | ||
| 33 | */ | ||
| 34 | |||
| 35 | /* MAX14577 regulator IDs */ | ||
| 36 | enum max14577_regulators { | ||
| 37 | MAX14577_SAFEOUT = 0, | ||
| 38 | MAX14577_CHARGER, | ||
| 39 | |||
| 40 | MAX14577_REG_MAX, | ||
| 41 | }; | ||
| 42 | |||
| 43 | struct max14577_regulator_platform_data { | ||
| 44 | int id; | ||
| 45 | struct regulator_init_data *initdata; | ||
| 46 | struct device_node *of_node; | ||
| 47 | }; | ||
| 48 | |||
| 49 | /* | ||
| 50 | * MAX14577 MFD platform data | ||
| 51 | */ | ||
| 52 | struct max14577_platform_data { | ||
| 53 | /* IRQ */ | ||
| 54 | int irq_base; | ||
| 55 | |||
| 56 | /* current control GPIOs */ | ||
| 57 | int gpio_pogo_vbatt_en; | ||
| 58 | int gpio_pogo_vbus_en; | ||
| 59 | |||
| 60 | /* current control GPIO control function */ | ||
| 61 | int (*set_gpio_pogo_vbatt_en) (int gpio_val); | ||
| 62 | int (*set_gpio_pogo_vbus_en) (int gpio_val); | ||
| 63 | |||
| 64 | int (*set_gpio_pogo_cb) (int new_dev); | ||
| 65 | |||
| 66 | struct max14577_regulator_platform_data *regulators; | ||
| 67 | }; | ||
| 68 | |||
| 69 | #endif /* __MAX14577_H__ */ | ||
diff --git a/include/linux/mfd/max77686-private.h b/include/linux/mfd/max77686-private.h index d327d4971e4f..8c75a9c8dfab 100644 --- a/include/linux/mfd/max77686-private.h +++ b/include/linux/mfd/max77686-private.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * max77686.h - Voltage regulator driver for the Maxim 77686 | 2 | * max77686-private.h - Voltage regulator driver for the Maxim 77686 |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2012 Samsung Electrnoics | 4 | * Copyright (C) 2012 Samsung Electrnoics |
| 5 | * Chiwoong Byun <woong.byun@samsung.com> | 5 | * Chiwoong Byun <woong.byun@samsung.com> |
diff --git a/include/linux/mfd/max8997-private.h b/include/linux/mfd/max8997-private.h index fb465dfbb59e..ad1ae7f345ad 100644 --- a/include/linux/mfd/max8997-private.h +++ b/include/linux/mfd/max8997-private.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * max8997.h - Voltage regulator driver for the Maxim 8997 | 2 | * max8997-private.h - Voltage regulator driver for the Maxim 8997 |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2010 Samsung Electrnoics | 4 | * Copyright (C) 2010 Samsung Electrnoics |
| 5 | * MyungJoo Ham <myungjoo.ham@samsung.com> | 5 | * MyungJoo Ham <myungjoo.ham@samsung.com> |
diff --git a/include/linux/mfd/max8998-private.h b/include/linux/mfd/max8998-private.h index 84844e0a5704..4ecb24b4b863 100644 --- a/include/linux/mfd/max8998-private.h +++ b/include/linux/mfd/max8998-private.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * max8998.h - Voltage regulator driver for the Maxim 8998 | 2 | * max8998-private.h - Voltage regulator driver for the Maxim 8998 |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2009-2010 Samsung Electrnoics | 4 | * Copyright (C) 2009-2010 Samsung Electrnoics |
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | 5 | * Kyungmin Park <kyungmin.park@samsung.com> |
diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h index 67c17b5a6f44..6156686bf108 100644 --- a/include/linux/mfd/mc13xxx.h +++ b/include/linux/mfd/mc13xxx.h | |||
| @@ -21,8 +21,6 @@ int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val); | |||
| 21 | int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, | 21 | int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, |
| 22 | u32 mask, u32 val); | 22 | u32 mask, u32 val); |
| 23 | 23 | ||
| 24 | int mc13xxx_get_flags(struct mc13xxx *mc13xxx); | ||
| 25 | |||
| 26 | int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, | 24 | int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, |
| 27 | irq_handler_t handler, const char *name, void *dev); | 25 | irq_handler_t handler, const char *name, void *dev); |
| 28 | int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq, | 26 | int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq, |
diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index d498d98f0c2c..fb96c84dada5 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h | |||
| @@ -159,6 +159,9 @@ struct ti_tscadc_dev { | |||
| 159 | int adc_cell; /* -1 if not used */ | 159 | int adc_cell; /* -1 if not used */ |
| 160 | struct mfd_cell cells[TSCADC_CELLS]; | 160 | struct mfd_cell cells[TSCADC_CELLS]; |
| 161 | u32 reg_se_cache; | 161 | u32 reg_se_cache; |
| 162 | bool adc_waiting; | ||
| 163 | bool adc_in_use; | ||
| 164 | wait_queue_head_t reg_se_wait; | ||
| 162 | spinlock_t reg_lock; | 165 | spinlock_t reg_lock; |
| 163 | unsigned int clk_div; | 166 | unsigned int clk_div; |
| 164 | 167 | ||
| @@ -176,8 +179,9 @@ static inline struct ti_tscadc_dev *ti_tscadc_dev_get(struct platform_device *p) | |||
| 176 | return *tscadc_dev; | 179 | return *tscadc_dev; |
| 177 | } | 180 | } |
| 178 | 181 | ||
| 179 | void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc); | 182 | void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val); |
| 180 | void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val); | 183 | void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val); |
| 181 | void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val); | 184 | void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val); |
| 185 | void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc); | ||
| 182 | 186 | ||
| 183 | #endif | 187 | #endif |
diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h index 87994542573b..cbecec2e353a 100644 --- a/include/linux/mfd/tps6586x.h +++ b/include/linux/mfd/tps6586x.h | |||
| @@ -13,6 +13,12 @@ | |||
| 13 | #define TPS6586X_SLEW_RATE_SET 0x08 | 13 | #define TPS6586X_SLEW_RATE_SET 0x08 |
| 14 | #define TPS6586X_SLEW_RATE_MASK 0x07 | 14 | #define TPS6586X_SLEW_RATE_MASK 0x07 |
| 15 | 15 | ||
| 16 | /* VERSION CRC */ | ||
| 17 | #define TPS658621A 0x15 | ||
| 18 | #define TPS658621CD 0x2c | ||
| 19 | #define TPS658623 0x1b | ||
| 20 | #define TPS658643 0x03 | ||
| 21 | |||
| 16 | enum { | 22 | enum { |
| 17 | TPS6586X_ID_SYS, | 23 | TPS6586X_ID_SYS, |
| 18 | TPS6586X_ID_SM_0, | 24 | TPS6586X_ID_SM_0, |
| @@ -97,5 +103,6 @@ extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask); | |||
| 97 | extern int tps6586x_update(struct device *dev, int reg, uint8_t val, | 103 | extern int tps6586x_update(struct device *dev, int reg, uint8_t val, |
| 98 | uint8_t mask); | 104 | uint8_t mask); |
| 99 | extern int tps6586x_irq_get_virq(struct device *dev, int irq); | 105 | extern int tps6586x_irq_get_virq(struct device *dev, int irq); |
| 106 | extern int tps6586x_get_version(struct device *dev); | ||
| 100 | 107 | ||
| 101 | #endif /*__LINUX_MFD_TPS6586X_H */ | 108 | #endif /*__LINUX_MFD_TPS6586X_H */ |
