Merge tag 'pinctrl-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control changes from Linus Walleij:
 "Here is the bulk of pin control changes for the v3.12 series.  Most of
  the relevant information is in the tag.

  I merged in v3.11-rc7 last week to get rid of a largeish conflict
  within the sunxi (AllWinner) driver in linux-next and fix up the
  non-trivial merge the right way.  That driver had a rather large fix
  adding locking late in the release cycle.

  Overall the bulk changes this time is cleanups and refactorings and
  not much new features, which is nice.

   - Refactorings for generic pin config handling in the core.

   - Factor out a set of device tree utilities for use in all drivers,
     to parse and allocate maps from the device tree.

   - Some fixes to the core such as more nitpicky locking.

   - Pushed down config array iteration into the drivers.

     This patch is necessary for drivers that want to iterate over
     configs and pile up a stack of alterations to the same register(s),
     or if the driver wants to take a local spinlock when committing the
     configuration.

   - A new driver for the Texas Instruments Palmas PMIC by Laxman
     Dewangan.  This is used on the Tegra systems.

   - A major cleanup and modernization of the PFC (Super Hitachi and ARM
     SHmobile) pin controller and subdrivers.

   - Support for the A20 and A31 sunxi (AllWinner) SoCs.

   - A huge pile of fixes and cleanups: Axel Lin, Jingoo Han Dan
     Carpenter, Julia Lawall and Sachin Kamat did an excellent job here"

* tag 'pinctrl-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (124 commits)
  pinctrl: sunxi: Fix off-by-one for valid offset range checking
  pinctrl: sunxi: drop lock on error path
  pinctrl: pinconf-generic: Remove ti prefix in dev_err messages
  pinctrl: rockchip: Implement .request() and .free() callbacks
  pinctrl: at91: fix get_pullup/down function return
  pinctrl: sh-pfc: remove unnecessary platform_set_drvdata()
  pinctrl: Add s5pv210 support to pinctrl-exynos
  pinctrl: utils: include export.h to avoid warnings
  pinctrl: s3c24xx: off by one in s3c24xx_eint_init()
  pinctrl: mvebu: testing the wrong variable
  pinctrl: abx500: fix bitwise AND test
  pinctrl: mvebu: Convert to use devm_ioremap_resource
  pinctrl: Pass all configs to driver on pin_config_set()
  pinctrl: tz1090-pdc: Convert to devm_ioremap_resource
  pinctrl: tz1090: Convert to devm_ioremap_resource
  pinctrl: tegra: Convert to devm_ioremap_resource
  pinctrl: rockchip: Simplify pin_to_bank equation
  pinctrl: spear: Convert to devm_ioremap_resource
  pinctrl: rockchip: Remove of_match_ptr macro for DT only driver
  pinctrl: palmas: PINCTRL_PALMAS needs to select PINMUX
  ...

1 files changed, 24 insertions, 11 deletions

diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index e6090d88e91d..37e48c957791 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -448,7 +448,7 @@ enum usb_irq_events {
 #define PALMAS_DVFS_BASE                                        0x180
 #define PALMAS_PMU_CONTROL_BASE                                 0x1A0
 #define PALMAS_RESOURCE_BASE                                    0x1D4
-#define PALMAS_PU_PD_OD_BASE                                    0x1F4
+#define PALMAS_PU_PD_OD_BASE                                    0x1F0
 #define PALMAS_LED_BASE                                         0x200
 #define PALMAS_INTERRUPT_BASE                                   0x210
 #define PALMAS_USB_OTG_BASE                                     0x250
@@ -1733,16 +1733,20 @@ enum usb_irq_events {
 #define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT                    0
 
 /* Registers for function PAD_CONTROL */
-#define PALMAS_PU_PD_INPUT_CTRL1                                0x0
-#define PALMAS_PU_PD_INPUT_CTRL2                                0x1
-#define PALMAS_PU_PD_INPUT_CTRL3                                0x2
-#define PALMAS_OD_OUTPUT_CTRL                                   0x4
-#define PALMAS_POLARITY_CTRL                                    0x5
-#define PALMAS_PRIMARY_SECONDARY_PAD1                           0x6
-#define PALMAS_PRIMARY_SECONDARY_PAD2                           0x7
-#define PALMAS_I2C_SPI                                          0x8
-#define PALMAS_PU_PD_INPUT_CTRL4                                0x9
-#define PALMAS_PRIMARY_SECONDARY_PAD3                           0xA
+#define PALMAS_OD_OUTPUT_CTRL2                                  0x2
+#define PALMAS_POLARITY_CTRL2                                   0x3
+#define PALMAS_PU_PD_INPUT_CTRL1                                0x4
+#define PALMAS_PU_PD_INPUT_CTRL2                                0x5
+#define PALMAS_PU_PD_INPUT_CTRL3                                0x6
+#define PALMAS_PU_PD_INPUT_CTRL5                                0x7
+#define PALMAS_OD_OUTPUT_CTRL                                   0x8
+#define PALMAS_POLARITY_CTRL                                    0x9
+#define PALMAS_PRIMARY_SECONDARY_PAD1                           0xA
+#define PALMAS_PRIMARY_SECONDARY_PAD2                           0xB
+#define PALMAS_I2C_SPI                                          0xC
+#define PALMAS_PU_PD_INPUT_CTRL4                                0xD
+#define PALMAS_PRIMARY_SECONDARY_PAD3                           0xE
+#define PALMAS_PRIMARY_SECONDARY_PAD4                           0xF
 
 /* Bit definitions for PU_PD_INPUT_CTRL1 */
 #define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD                    0x40
@@ -2500,6 +2504,15 @@ enum usb_irq_events {
 #define PALMAS_PU_PD_GPIO_CTRL1                                 0x6
 #define PALMAS_PU_PD_GPIO_CTRL2                                 0x7
 #define PALMAS_OD_OUTPUT_GPIO_CTRL                              0x8
+#define PALMAS_GPIO_DATA_IN2                                    0x9
+#define PALMAS_GPIO_DATA_DIR2                                   0x0A
+#define PALMAS_GPIO_DATA_OUT2                                   0x0B
+#define PALMAS_GPIO_DEBOUNCE_EN2                                0x0C
+#define PALMAS_GPIO_CLEAR_DATA_OUT2                             0x0D
+#define PALMAS_GPIO_SET_DATA_OUT2                               0x0E
+#define PALMAS_PU_PD_GPIO_CTRL3                                 0x0F
+#define PALMAS_PU_PD_GPIO_CTRL4                                 0x10
+#define PALMAS_OD_OUTPUT_GPIO_CTRL2                             0x11
 
 /* Bit definitions for GPIO_DATA_IN */
 #define PALMAS_GPIO_DATA_IN_GPIO_7_IN                           0x80