diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-12 11:00:30 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-12 11:00:30 -0500 |
commit | a429638cac1e5c656818a45aaff78df7b743004e (patch) | |
tree | 0465e0d7a431bff97a3dd5a1f91d9b30c69ae0d8 /include/linux/mfd | |
parent | 5cf9a4e69c1ff0ccdd1d2b7404f95c0531355274 (diff) | |
parent | 9e4ce164ee3a1d07580f017069c25d180b0aa785 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (526 commits)
ASoC: twl6040 - Add method to query optimum PDM_DL1 gain
ALSA: hda - Fix the lost power-setup of seconary pins after PM resume
ALSA: usb-audio: add Yamaha MOX6/MOX8 support
ALSA: virtuoso: add S/PDIF input support for all Xonars
ALSA: ice1724 - Support for ooAoo SQ210a
ALSA: ice1724 - Allow card info based on model only
ALSA: ice1724 - Create capture pcm only for ADC-enabled configurations
ALSA: hdspm - Provide unique driver id based on card serial
ASoC: Dynamically allocate the rtd device for a non-empty release()
ASoC: Fix recursive dependency due to select ATMEL_SSC in SND_ATMEL_SOC_SSC
ALSA: hda - Fix the detection of "Loopback Mixing" control for VIA codecs
ALSA: hda - Return the error from get_wcaps_type() for invalid NIDs
ALSA: hda - Use auto-parser for HP laptops with cx20459 codec
ALSA: asihpi - Fix potential Oops in snd_asihpi_cmode_info()
ALSA: hdsp - Fix potential Oops in snd_hdsp_info_pref_sync_ref()
ALSA: hda/cirrus - support for iMac12,2 model
ASoC: cx20442: add bias control over a platform provided regulator
ALSA: usb-audio - Avoid flood of frame-active debug messages
ALSA: snd-usb-us122l: Delete calls to preempt_disable
mfd: Put WM8994 into cache only mode when suspending
...
Fix up trivial conflicts in:
- arch/arm/mach-s3c64xx/mach-crag6410.c:
renamed speyside_wm8962 to tobermory, added littlemill right
next to it
- drivers/base/regmap/{regcache.c,regmap.c}:
duplicate diff that had already come in with other changes in
the regmap tree
Diffstat (limited to 'include/linux/mfd')
-rw-r--r-- | include/linux/mfd/wm8994/core.h | 7 | ||||
-rw-r--r-- | include/linux/mfd/wm8994/pdata.h | 31 | ||||
-rw-r--r-- | include/linux/mfd/wm8994/registers.h | 112 |
3 files changed, 145 insertions, 5 deletions
diff --git a/include/linux/mfd/wm8994/core.h b/include/linux/mfd/wm8994/core.h index f44bdb7273bd..9eff2a351ec5 100644 --- a/include/linux/mfd/wm8994/core.h +++ b/include/linux/mfd/wm8994/core.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #ifndef __MFD_WM8994_CORE_H__ | 15 | #ifndef __MFD_WM8994_CORE_H__ |
16 | #define __MFD_WM8994_CORE_H__ | 16 | #define __MFD_WM8994_CORE_H__ |
17 | 17 | ||
18 | #include <linux/mutex.h> | ||
18 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
19 | 20 | ||
20 | enum wm8994_type { | 21 | enum wm8994_type { |
@@ -55,6 +56,7 @@ struct wm8994 { | |||
55 | struct mutex irq_lock; | 56 | struct mutex irq_lock; |
56 | 57 | ||
57 | enum wm8994_type type; | 58 | enum wm8994_type type; |
59 | int revision; | ||
58 | 60 | ||
59 | struct device *dev; | 61 | struct device *dev; |
60 | struct regmap *regmap; | 62 | struct regmap *regmap; |
@@ -65,13 +67,10 @@ struct wm8994 { | |||
65 | int irq_base; | 67 | int irq_base; |
66 | 68 | ||
67 | int irq; | 69 | int irq; |
68 | u16 irq_masks_cur[WM8994_NUM_IRQ_REGS]; | 70 | struct regmap_irq_chip_data *irq_data; |
69 | u16 irq_masks_cache[WM8994_NUM_IRQ_REGS]; | ||
70 | 71 | ||
71 | /* Used over suspend/resume */ | 72 | /* Used over suspend/resume */ |
72 | bool suspended; | 73 | bool suspended; |
73 | u16 ldo_regs[WM8994_NUM_LDO_REGS]; | ||
74 | u16 gpio_regs[WM8994_NUM_GPIO_REGS]; | ||
75 | 74 | ||
76 | struct regulator_dev *dbvdd; | 75 | struct regulator_dev *dbvdd; |
77 | int num_supplies; | 76 | int num_supplies; |
diff --git a/include/linux/mfd/wm8994/pdata.h b/include/linux/mfd/wm8994/pdata.h index ea32f306dca6..3fb1f407d5e6 100644 --- a/include/linux/mfd/wm8994/pdata.h +++ b/include/linux/mfd/wm8994/pdata.h | |||
@@ -23,7 +23,7 @@ struct wm8994_ldo_pdata { | |||
23 | int enable; | 23 | int enable; |
24 | 24 | ||
25 | const char *supply; | 25 | const char *supply; |
26 | struct regulator_init_data *init_data; | 26 | const struct regulator_init_data *init_data; |
27 | }; | 27 | }; |
28 | 28 | ||
29 | #define WM8994_CONFIGURE_GPIO 0x10000 | 29 | #define WM8994_CONFIGURE_GPIO 0x10000 |
@@ -113,6 +113,23 @@ struct wm8958_enh_eq_cfg { | |||
113 | u16 regs[WM8958_ENH_EQ_REGS]; | 113 | u16 regs[WM8958_ENH_EQ_REGS]; |
114 | }; | 114 | }; |
115 | 115 | ||
116 | /** | ||
117 | * Microphone detection rates, used to tune response rates and power | ||
118 | * consumption for WM8958/WM1811 microphone detection. | ||
119 | * | ||
120 | * @sysclk: System clock rate to use this configuration for. | ||
121 | * @idle: True if this configuration should use when no accessory is detected, | ||
122 | * false otherwise. | ||
123 | * @start: Value for MICD_BIAS_START_TIME register field (not shifted). | ||
124 | * @rate: Value for MICD_RATE register field (not shifted). | ||
125 | */ | ||
126 | struct wm8958_micd_rate { | ||
127 | int sysclk; | ||
128 | bool idle; | ||
129 | int start; | ||
130 | int rate; | ||
131 | }; | ||
132 | |||
116 | struct wm8994_pdata { | 133 | struct wm8994_pdata { |
117 | int gpio_base; | 134 | int gpio_base; |
118 | 135 | ||
@@ -144,6 +161,9 @@ struct wm8994_pdata { | |||
144 | int num_enh_eq_cfgs; | 161 | int num_enh_eq_cfgs; |
145 | struct wm8958_enh_eq_cfg *enh_eq_cfgs; | 162 | struct wm8958_enh_eq_cfg *enh_eq_cfgs; |
146 | 163 | ||
164 | int num_micd_rates; | ||
165 | struct wm8958_micd_rate *micd_rates; | ||
166 | |||
147 | /* LINEOUT can be differential or single ended */ | 167 | /* LINEOUT can be differential or single ended */ |
148 | unsigned int lineout1_diff:1; | 168 | unsigned int lineout1_diff:1; |
149 | unsigned int lineout2_diff:1; | 169 | unsigned int lineout2_diff:1; |
@@ -168,12 +188,21 @@ struct wm8994_pdata { | |||
168 | /* WM8958 microphone bias configuration */ | 188 | /* WM8958 microphone bias configuration */ |
169 | int micbias[2]; | 189 | int micbias[2]; |
170 | 190 | ||
191 | /* WM8958 microphone detection ranges */ | ||
192 | u16 micd_lvl_sel; | ||
193 | |||
171 | /* Disable the internal pull downs on the LDOs if they are | 194 | /* Disable the internal pull downs on the LDOs if they are |
172 | * always driven (eg, connected to an always on supply or | 195 | * always driven (eg, connected to an always on supply or |
173 | * GPIO that always drives an output. If they float power | 196 | * GPIO that always drives an output. If they float power |
174 | * consumption will rise. | 197 | * consumption will rise. |
175 | */ | 198 | */ |
176 | bool ldo_ena_always_driven; | 199 | bool ldo_ena_always_driven; |
200 | |||
201 | /* | ||
202 | * SPKMODE must be pulled internally by the device on this | ||
203 | * system. | ||
204 | */ | ||
205 | bool spkmode_pu; | ||
177 | }; | 206 | }; |
178 | 207 | ||
179 | #endif | 208 | #endif |
diff --git a/include/linux/mfd/wm8994/registers.h b/include/linux/mfd/wm8994/registers.h index 83a9caec0e43..86e6a032a078 100644 --- a/include/linux/mfd/wm8994/registers.h +++ b/include/linux/mfd/wm8994/registers.h | |||
@@ -95,11 +95,15 @@ | |||
95 | #define WM8994_FLL1_CONTROL_3 0x222 | 95 | #define WM8994_FLL1_CONTROL_3 0x222 |
96 | #define WM8994_FLL1_CONTROL_4 0x223 | 96 | #define WM8994_FLL1_CONTROL_4 0x223 |
97 | #define WM8994_FLL1_CONTROL_5 0x224 | 97 | #define WM8994_FLL1_CONTROL_5 0x224 |
98 | #define WM8958_FLL1_EFS_1 0x226 | ||
99 | #define WM8958_FLL1_EFS_2 0x227 | ||
98 | #define WM8994_FLL2_CONTROL_1 0x240 | 100 | #define WM8994_FLL2_CONTROL_1 0x240 |
99 | #define WM8994_FLL2_CONTROL_2 0x241 | 101 | #define WM8994_FLL2_CONTROL_2 0x241 |
100 | #define WM8994_FLL2_CONTROL_3 0x242 | 102 | #define WM8994_FLL2_CONTROL_3 0x242 |
101 | #define WM8994_FLL2_CONTROL_4 0x243 | 103 | #define WM8994_FLL2_CONTROL_4 0x243 |
102 | #define WM8994_FLL2_CONTROL_5 0x244 | 104 | #define WM8994_FLL2_CONTROL_5 0x244 |
105 | #define WM8958_FLL2_EFS_1 0x246 | ||
106 | #define WM8958_FLL2_EFS_2 0x247 | ||
103 | #define WM8994_AIF1_CONTROL_1 0x300 | 107 | #define WM8994_AIF1_CONTROL_1 0x300 |
104 | #define WM8994_AIF1_CONTROL_2 0x301 | 108 | #define WM8994_AIF1_CONTROL_2 0x301 |
105 | #define WM8994_AIF1_MASTER_SLAVE 0x302 | 109 | #define WM8994_AIF1_MASTER_SLAVE 0x302 |
@@ -116,6 +120,7 @@ | |||
116 | #define WM8994_AIF2DAC_LRCLK 0x315 | 120 | #define WM8994_AIF2DAC_LRCLK 0x315 |
117 | #define WM8994_AIF2DAC_DATA 0x316 | 121 | #define WM8994_AIF2DAC_DATA 0x316 |
118 | #define WM8994_AIF2ADC_DATA 0x317 | 122 | #define WM8994_AIF2ADC_DATA 0x317 |
123 | #define WM1811_AIF2TX_CONTROL 0x318 | ||
119 | #define WM8958_AIF3_CONTROL_1 0x320 | 124 | #define WM8958_AIF3_CONTROL_1 0x320 |
120 | #define WM8958_AIF3_CONTROL_2 0x321 | 125 | #define WM8958_AIF3_CONTROL_2 0x321 |
121 | #define WM8958_AIF3DAC_DATA 0x322 | 126 | #define WM8958_AIF3DAC_DATA 0x322 |
@@ -166,6 +171,7 @@ | |||
166 | #define WM8994_AIF1_DAC1_EQ_BAND_5_A 0x491 | 171 | #define WM8994_AIF1_DAC1_EQ_BAND_5_A 0x491 |
167 | #define WM8994_AIF1_DAC1_EQ_BAND_5_B 0x492 | 172 | #define WM8994_AIF1_DAC1_EQ_BAND_5_B 0x492 |
168 | #define WM8994_AIF1_DAC1_EQ_BAND_5_PG 0x493 | 173 | #define WM8994_AIF1_DAC1_EQ_BAND_5_PG 0x493 |
174 | #define WM8994_AIF1_DAC1_EQ_BAND_1_C 0x494 | ||
169 | #define WM8994_AIF1_DAC2_EQ_GAINS_1 0x4A0 | 175 | #define WM8994_AIF1_DAC2_EQ_GAINS_1 0x4A0 |
170 | #define WM8994_AIF1_DAC2_EQ_GAINS_2 0x4A1 | 176 | #define WM8994_AIF1_DAC2_EQ_GAINS_2 0x4A1 |
171 | #define WM8994_AIF1_DAC2_EQ_BAND_1_A 0x4A2 | 177 | #define WM8994_AIF1_DAC2_EQ_BAND_1_A 0x4A2 |
@@ -186,6 +192,7 @@ | |||
186 | #define WM8994_AIF1_DAC2_EQ_BAND_5_A 0x4B1 | 192 | #define WM8994_AIF1_DAC2_EQ_BAND_5_A 0x4B1 |
187 | #define WM8994_AIF1_DAC2_EQ_BAND_5_B 0x4B2 | 193 | #define WM8994_AIF1_DAC2_EQ_BAND_5_B 0x4B2 |
188 | #define WM8994_AIF1_DAC2_EQ_BAND_5_PG 0x4B3 | 194 | #define WM8994_AIF1_DAC2_EQ_BAND_5_PG 0x4B3 |
195 | #define WM8994_AIF1_DAC2_EQ_BAND_1_C 0x4B4 | ||
189 | #define WM8994_AIF2_ADC_LEFT_VOLUME 0x500 | 196 | #define WM8994_AIF2_ADC_LEFT_VOLUME 0x500 |
190 | #define WM8994_AIF2_ADC_RIGHT_VOLUME 0x501 | 197 | #define WM8994_AIF2_ADC_RIGHT_VOLUME 0x501 |
191 | #define WM8994_AIF2_DAC_LEFT_VOLUME 0x502 | 198 | #define WM8994_AIF2_DAC_LEFT_VOLUME 0x502 |
@@ -219,6 +226,7 @@ | |||
219 | #define WM8994_AIF2_EQ_BAND_5_A 0x591 | 226 | #define WM8994_AIF2_EQ_BAND_5_A 0x591 |
220 | #define WM8994_AIF2_EQ_BAND_5_B 0x592 | 227 | #define WM8994_AIF2_EQ_BAND_5_B 0x592 |
221 | #define WM8994_AIF2_EQ_BAND_5_PG 0x593 | 228 | #define WM8994_AIF2_EQ_BAND_5_PG 0x593 |
229 | #define WM8994_AIF2_EQ_BAND_1_C 0x594 | ||
222 | #define WM8994_DAC1_MIXER_VOLUMES 0x600 | 230 | #define WM8994_DAC1_MIXER_VOLUMES 0x600 |
223 | #define WM8994_DAC1_LEFT_MIXER_ROUTING 0x601 | 231 | #define WM8994_DAC1_LEFT_MIXER_ROUTING 0x601 |
224 | #define WM8994_DAC1_RIGHT_MIXER_ROUTING 0x602 | 232 | #define WM8994_DAC1_RIGHT_MIXER_ROUTING 0x602 |
@@ -242,6 +250,7 @@ | |||
242 | #define WM8994_GPIO_4 0x703 | 250 | #define WM8994_GPIO_4 0x703 |
243 | #define WM8994_GPIO_5 0x704 | 251 | #define WM8994_GPIO_5 0x704 |
244 | #define WM8994_GPIO_6 0x705 | 252 | #define WM8994_GPIO_6 0x705 |
253 | #define WM1811_JACKDET_CTRL 0x705 | ||
245 | #define WM8994_GPIO_7 0x706 | 254 | #define WM8994_GPIO_7 0x706 |
246 | #define WM8994_GPIO_8 0x707 | 255 | #define WM8994_GPIO_8 0x707 |
247 | #define WM8994_GPIO_9 0x708 | 256 | #define WM8994_GPIO_9 0x708 |
@@ -264,7 +273,43 @@ | |||
264 | #define WM8958_DSP2_RELEASETIME 0xA03 | 273 | #define WM8958_DSP2_RELEASETIME 0xA03 |
265 | #define WM8958_DSP2_VERMAJMIN 0xA04 | 274 | #define WM8958_DSP2_VERMAJMIN 0xA04 |
266 | #define WM8958_DSP2_VERBUILD 0xA05 | 275 | #define WM8958_DSP2_VERBUILD 0xA05 |
276 | #define WM8958_DSP2_TESTREG 0xA06 | ||
277 | #define WM8958_DSP2_XORREG 0xA07 | ||
278 | #define WM8958_DSP2_SHIFTMAXX 0xA08 | ||
279 | #define WM8958_DSP2_SHIFTMAXY 0xA09 | ||
280 | #define WM8958_DSP2_SHIFTMAXZ 0xA0A | ||
281 | #define WM8958_DSP2_SHIFTMAXEXTLO 0xA0B | ||
282 | #define WM8958_DSP2_AESSELECT 0xA0C | ||
267 | #define WM8958_DSP2_EXECCONTROL 0xA0D | 283 | #define WM8958_DSP2_EXECCONTROL 0xA0D |
284 | #define WM8958_DSP2_SAMPLEBREAK 0xA0E | ||
285 | #define WM8958_DSP2_COUNTBREAK 0xA0F | ||
286 | #define WM8958_DSP2_INTSTATUS 0xA10 | ||
287 | #define WM8958_DSP2_EVENTSTATUS 0xA11 | ||
288 | #define WM8958_DSP2_INTMASK 0xA12 | ||
289 | #define WM8958_DSP2_CONFIGDWIDTH 0xA13 | ||
290 | #define WM8958_DSP2_CONFIGINSTR 0xA14 | ||
291 | #define WM8958_DSP2_CONFIGDMEM 0xA15 | ||
292 | #define WM8958_DSP2_CONFIGDELAYS 0xA16 | ||
293 | #define WM8958_DSP2_CONFIGNUMIO 0xA17 | ||
294 | #define WM8958_DSP2_CONFIGEXTDEPTH 0xA18 | ||
295 | #define WM8958_DSP2_CONFIGMULTIPLIER 0xA19 | ||
296 | #define WM8958_DSP2_CONFIGCTRLDWIDTH 0xA1A | ||
297 | #define WM8958_DSP2_CONFIGPIPELINE 0xA1B | ||
298 | #define WM8958_DSP2_SHIFTMAXEXTHI 0xA1C | ||
299 | #define WM8958_DSP2_SWVERSIONREG 0xA1D | ||
300 | #define WM8958_DSP2_CONFIGXMEM 0xA1E | ||
301 | #define WM8958_DSP2_CONFIGYMEM 0xA1F | ||
302 | #define WM8958_DSP2_CONFIGZMEM 0xA20 | ||
303 | #define WM8958_FW_BUILD_1 0x2000 | ||
304 | #define WM8958_FW_BUILD_0 0x2001 | ||
305 | #define WM8958_FW_ID_1 0x2002 | ||
306 | #define WM8958_FW_ID_0 0x2003 | ||
307 | #define WM8958_FW_MAJOR_1 0x2004 | ||
308 | #define WM8958_FW_MAJOR_0 0x2005 | ||
309 | #define WM8958_FW_MINOR_1 0x2006 | ||
310 | #define WM8958_FW_MINOR_0 0x2007 | ||
311 | #define WM8958_FW_PATCH_1 0x2008 | ||
312 | #define WM8958_FW_PATCH_0 0x2009 | ||
268 | #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1 0x2200 | 313 | #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1 0x2200 |
269 | #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_2 0x2201 | 314 | #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_2 0x2201 |
270 | #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C2_1 0x2202 | 315 | #define WM8958_MBC_BAND_2_LOWER_CUTOFF_C2_1 0x2202 |
@@ -333,6 +378,14 @@ | |||
333 | #define WM8958_MBC_B2_PG2_2 0x242D | 378 | #define WM8958_MBC_B2_PG2_2 0x242D |
334 | #define WM8958_MBC_B1_PG2_1 0x242E | 379 | #define WM8958_MBC_B1_PG2_1 0x242E |
335 | #define WM8958_MBC_B1_PG2_2 0x242F | 380 | #define WM8958_MBC_B1_PG2_2 0x242F |
381 | #define WM8958_MBC_CROSSOVER_1 0x2600 | ||
382 | #define WM8958_MBC_CROSSOVER_2 0x2601 | ||
383 | #define WM8958_MBC_HPF_1 0x2602 | ||
384 | #define WM8958_MBC_HPF_2 0x2603 | ||
385 | #define WM8958_MBC_LPF_1 0x2606 | ||
386 | #define WM8958_MBC_LPF_2 0x2607 | ||
387 | #define WM8958_MBC_RMS_LIMIT_1 0x260A | ||
388 | #define WM8958_MBC_RMS_LIMIT_2 0x260B | ||
336 | #define WM8994_WRITE_SEQUENCER_0 0x3000 | 389 | #define WM8994_WRITE_SEQUENCER_0 0x3000 |
337 | #define WM8994_WRITE_SEQUENCER_1 0x3001 | 390 | #define WM8994_WRITE_SEQUENCER_1 0x3001 |
338 | #define WM8994_WRITE_SEQUENCER_2 0x3002 | 391 | #define WM8994_WRITE_SEQUENCER_2 0x3002 |
@@ -1852,6 +1905,9 @@ | |||
1852 | /* | 1905 | /* |
1853 | * R57 (0x39) - AntiPOP (2) | 1906 | * R57 (0x39) - AntiPOP (2) |
1854 | */ | 1907 | */ |
1908 | #define WM1811_JACKDET_MODE_MASK 0x0180 /* JACKDET_MODE - [8:7] */ | ||
1909 | #define WM1811_JACKDET_MODE_SHIFT 7 /* JACKDET_MODE - [8:7] */ | ||
1910 | #define WM1811_JACKDET_MODE_WIDTH 2 /* JACKDET_MODE - [8:7] */ | ||
1855 | #define WM8994_MICB2_DISCH 0x0100 /* MICB2_DISCH */ | 1911 | #define WM8994_MICB2_DISCH 0x0100 /* MICB2_DISCH */ |
1856 | #define WM8994_MICB2_DISCH_MASK 0x0100 /* MICB2_DISCH */ | 1912 | #define WM8994_MICB2_DISCH_MASK 0x0100 /* MICB2_DISCH */ |
1857 | #define WM8994_MICB2_DISCH_SHIFT 8 /* MICB2_DISCH */ | 1913 | #define WM8994_MICB2_DISCH_SHIFT 8 /* MICB2_DISCH */ |
@@ -2389,6 +2445,10 @@ | |||
2389 | /* | 2445 | /* |
2390 | * R548 (0x224) - FLL1 Control (5) | 2446 | * R548 (0x224) - FLL1 Control (5) |
2391 | */ | 2447 | */ |
2448 | #define WM8958_FLL1_BYP 0x8000 /* FLL1_BYP */ | ||
2449 | #define WM8958_FLL1_BYP_MASK 0x8000 /* FLL1_BYP */ | ||
2450 | #define WM8958_FLL1_BYP_SHIFT 15 /* FLL1_BYP */ | ||
2451 | #define WM8958_FLL1_BYP_WIDTH 1 /* FLL1_BYP */ | ||
2392 | #define WM8994_FLL1_FRC_NCO_VAL_MASK 0x1F80 /* FLL1_FRC_NCO_VAL - [12:7] */ | 2452 | #define WM8994_FLL1_FRC_NCO_VAL_MASK 0x1F80 /* FLL1_FRC_NCO_VAL - [12:7] */ |
2393 | #define WM8994_FLL1_FRC_NCO_VAL_SHIFT 7 /* FLL1_FRC_NCO_VAL - [12:7] */ | 2453 | #define WM8994_FLL1_FRC_NCO_VAL_SHIFT 7 /* FLL1_FRC_NCO_VAL - [12:7] */ |
2394 | #define WM8994_FLL1_FRC_NCO_VAL_WIDTH 6 /* FLL1_FRC_NCO_VAL - [12:7] */ | 2454 | #define WM8994_FLL1_FRC_NCO_VAL_WIDTH 6 /* FLL1_FRC_NCO_VAL - [12:7] */ |
@@ -2404,6 +2464,24 @@ | |||
2404 | #define WM8994_FLL1_REFCLK_SRC_WIDTH 2 /* FLL1_REFCLK_SRC - [1:0] */ | 2464 | #define WM8994_FLL1_REFCLK_SRC_WIDTH 2 /* FLL1_REFCLK_SRC - [1:0] */ |
2405 | 2465 | ||
2406 | /* | 2466 | /* |
2467 | * R550 (0x226) - FLL1 EFS 1 | ||
2468 | */ | ||
2469 | #define WM8958_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */ | ||
2470 | #define WM8958_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */ | ||
2471 | #define WM8958_FLL1_LAMBDA_WIDTH 16 /* FLL1_LAMBDA - [15:0] */ | ||
2472 | |||
2473 | /* | ||
2474 | * R551 (0x227) - FLL1 EFS 2 | ||
2475 | */ | ||
2476 | #define WM8958_FLL1_LFSR_SEL_MASK 0x0006 /* FLL1_LFSR_SEL - [2:1] */ | ||
2477 | #define WM8958_FLL1_LFSR_SEL_SHIFT 1 /* FLL1_LFSR_SEL - [2:1] */ | ||
2478 | #define WM8958_FLL1_LFSR_SEL_WIDTH 2 /* FLL1_LFSR_SEL - [2:1] */ | ||
2479 | #define WM8958_FLL1_EFS_ENA 0x0001 /* FLL1_EFS_ENA */ | ||
2480 | #define WM8958_FLL1_EFS_ENA_MASK 0x0001 /* FLL1_EFS_ENA */ | ||
2481 | #define WM8958_FLL1_EFS_ENA_SHIFT 0 /* FLL1_EFS_ENA */ | ||
2482 | #define WM8958_FLL1_EFS_ENA_WIDTH 1 /* FLL1_EFS_ENA */ | ||
2483 | |||
2484 | /* | ||
2407 | * R576 (0x240) - FLL2 Control (1) | 2485 | * R576 (0x240) - FLL2 Control (1) |
2408 | */ | 2486 | */ |
2409 | #define WM8994_FLL2_FRAC 0x0004 /* FLL2_FRAC */ | 2487 | #define WM8994_FLL2_FRAC 0x0004 /* FLL2_FRAC */ |
@@ -2452,6 +2530,10 @@ | |||
2452 | /* | 2530 | /* |
2453 | * R580 (0x244) - FLL2 Control (5) | 2531 | * R580 (0x244) - FLL2 Control (5) |
2454 | */ | 2532 | */ |
2533 | #define WM8958_FLL2_BYP 0x8000 /* FLL2_BYP */ | ||
2534 | #define WM8958_FLL2_BYP_MASK 0x8000 /* FLL2_BYP */ | ||
2535 | #define WM8958_FLL2_BYP_SHIFT 15 /* FLL2_BYP */ | ||
2536 | #define WM8958_FLL2_BYP_WIDTH 1 /* FLL2_BYP */ | ||
2455 | #define WM8994_FLL2_FRC_NCO_VAL_MASK 0x1F80 /* FLL2_FRC_NCO_VAL - [12:7] */ | 2537 | #define WM8994_FLL2_FRC_NCO_VAL_MASK 0x1F80 /* FLL2_FRC_NCO_VAL - [12:7] */ |
2456 | #define WM8994_FLL2_FRC_NCO_VAL_SHIFT 7 /* FLL2_FRC_NCO_VAL - [12:7] */ | 2538 | #define WM8994_FLL2_FRC_NCO_VAL_SHIFT 7 /* FLL2_FRC_NCO_VAL - [12:7] */ |
2457 | #define WM8994_FLL2_FRC_NCO_VAL_WIDTH 6 /* FLL2_FRC_NCO_VAL - [12:7] */ | 2539 | #define WM8994_FLL2_FRC_NCO_VAL_WIDTH 6 /* FLL2_FRC_NCO_VAL - [12:7] */ |
@@ -2467,6 +2549,24 @@ | |||
2467 | #define WM8994_FLL2_REFCLK_SRC_WIDTH 2 /* FLL2_REFCLK_SRC - [1:0] */ | 2549 | #define WM8994_FLL2_REFCLK_SRC_WIDTH 2 /* FLL2_REFCLK_SRC - [1:0] */ |
2468 | 2550 | ||
2469 | /* | 2551 | /* |
2552 | * R582 (0x246) - FLL2 EFS 1 | ||
2553 | */ | ||
2554 | #define WM8958_FLL2_LAMBDA_MASK 0xFFFF /* FLL2_LAMBDA - [15:0] */ | ||
2555 | #define WM8958_FLL2_LAMBDA_SHIFT 0 /* FLL2_LAMBDA - [15:0] */ | ||
2556 | #define WM8958_FLL2_LAMBDA_WIDTH 16 /* FLL2_LAMBDA - [15:0] */ | ||
2557 | |||
2558 | /* | ||
2559 | * R583 (0x247) - FLL2 EFS 2 | ||
2560 | */ | ||
2561 | #define WM8958_FLL2_LFSR_SEL_MASK 0x0006 /* FLL2_LFSR_SEL - [2:1] */ | ||
2562 | #define WM8958_FLL2_LFSR_SEL_SHIFT 1 /* FLL2_LFSR_SEL - [2:1] */ | ||
2563 | #define WM8958_FLL2_LFSR_SEL_WIDTH 2 /* FLL2_LFSR_SEL - [2:1] */ | ||
2564 | #define WM8958_FLL2_EFS_ENA 0x0001 /* FLL2_EFS_ENA */ | ||
2565 | #define WM8958_FLL2_EFS_ENA_MASK 0x0001 /* FLL2_EFS_ENA */ | ||
2566 | #define WM8958_FLL2_EFS_ENA_SHIFT 0 /* FLL2_EFS_ENA */ | ||
2567 | #define WM8958_FLL2_EFS_ENA_WIDTH 1 /* FLL2_EFS_ENA */ | ||
2568 | |||
2569 | /* | ||
2470 | * R768 (0x300) - AIF1 Control (1) | 2570 | * R768 (0x300) - AIF1 Control (1) |
2471 | */ | 2571 | */ |
2472 | #define WM8994_AIF1ADCL_SRC 0x8000 /* AIF1ADCL_SRC */ | 2572 | #define WM8994_AIF1ADCL_SRC 0x8000 /* AIF1ADCL_SRC */ |
@@ -4187,6 +4287,18 @@ | |||
4187 | #define WM8994_STL_SEL_WIDTH 1 /* STL_SEL */ | 4287 | #define WM8994_STL_SEL_WIDTH 1 /* STL_SEL */ |
4188 | 4288 | ||
4189 | /* | 4289 | /* |
4290 | * R1797 (0x705) - JACKDET Ctrl | ||
4291 | */ | ||
4292 | #define WM1811_JACKDET_DB 0x0100 /* JACKDET_DB */ | ||
4293 | #define WM1811_JACKDET_DB_MASK 0x0100 /* JACKDET_DB */ | ||
4294 | #define WM1811_JACKDET_DB_SHIFT 8 /* JACKDET_DB */ | ||
4295 | #define WM1811_JACKDET_DB_WIDTH 1 /* JACKDET_DB */ | ||
4296 | #define WM1811_JACKDET_LVL 0x0040 /* JACKDET_LVL */ | ||
4297 | #define WM1811_JACKDET_LVL_MASK 0x0040 /* JACKDET_LVL */ | ||
4298 | #define WM1811_JACKDET_LVL_SHIFT 6 /* JACKDET_LVL */ | ||
4299 | #define WM1811_JACKDET_LVL_WIDTH 1 /* JACKDET_LVL */ | ||
4300 | |||
4301 | /* | ||
4190 | * R1824 (0x720) - Pull Control (1) | 4302 | * R1824 (0x720) - Pull Control (1) |
4191 | */ | 4303 | */ |
4192 | #define WM8994_DMICDAT2_PU 0x0800 /* DMICDAT2_PU */ | 4304 | #define WM8994_DMICDAT2_PU 0x0800 /* DMICDAT2_PU */ |