diff options
| author | Javier Martinez Canillas <javier.martinez@collabora.co.uk> | 2014-07-24 08:39:24 -0400 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2014-07-25 10:31:48 -0400 |
| commit | a259f3896a39ec7cbcd5f630a6ec95bdcbc080d2 (patch) | |
| tree | 3e3a31d191f1466a27da0f0610addbc5c67f3c1e /include/linux/mfd | |
| parent | ad83533a634b82c3a291e8a00c778bb6bcd7862b (diff) | |
mfd: max77686: Add Maxim 77802 PMIC support
Maxim MAX77802 is a power management chip that contains 10 high
efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
to power up application processors and peripherals, a 2-channel
32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface
to program the individual regulators, clocks outputs and the RTC.
This patch adds support for MAX77802 to the MAX77686 driver and is
based on a driver added to the Chrome OS kernel 3.8 by Simon Glass.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/max77686-private.h | 208 | ||||
| -rw-r--r-- | include/linux/mfd/max77686.h | 57 |
2 files changed, 263 insertions, 2 deletions
diff --git a/include/linux/mfd/max77686-private.h b/include/linux/mfd/max77686-private.h index 8e177806cba1..0d60b38e5b5c 100644 --- a/include/linux/mfd/max77686-private.h +++ b/include/linux/mfd/max77686-private.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * max77686-private.h - Voltage regulator driver for the Maxim 77686 | 2 | * max77686-private.h - Voltage regulator driver for the Maxim 77686/802 |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2012 Samsung Electrnoics | 4 | * Copyright (C) 2012 Samsung Electrnoics |
| 5 | * Chiwoong Byun <woong.byun@samsung.com> | 5 | * Chiwoong Byun <woong.byun@samsung.com> |
| @@ -28,6 +28,7 @@ | |||
| 28 | 28 | ||
| 29 | #define MAX77686_REG_INVALID (0xff) | 29 | #define MAX77686_REG_INVALID (0xff) |
| 30 | 30 | ||
| 31 | /* MAX77686 PMIC registers */ | ||
| 31 | enum max77686_pmic_reg { | 32 | enum max77686_pmic_reg { |
| 32 | MAX77686_REG_DEVICE_ID = 0x00, | 33 | MAX77686_REG_DEVICE_ID = 0x00, |
| 33 | MAX77686_REG_INTSRC = 0x01, | 34 | MAX77686_REG_INTSRC = 0x01, |
| @@ -181,6 +182,210 @@ enum max77686_rtc_reg { | |||
| 181 | MAX77686_ALARM2_DATE = 0x1B, | 182 | MAX77686_ALARM2_DATE = 0x1B, |
| 182 | }; | 183 | }; |
| 183 | 184 | ||
| 185 | /* MAX77802 PMIC registers */ | ||
| 186 | enum max77802_pmic_reg { | ||
| 187 | MAX77802_REG_DEVICE_ID = 0x00, | ||
| 188 | MAX77802_REG_INTSRC = 0x01, | ||
| 189 | MAX77802_REG_INT1 = 0x02, | ||
| 190 | MAX77802_REG_INT2 = 0x03, | ||
| 191 | |||
| 192 | MAX77802_REG_INT1MSK = 0x04, | ||
| 193 | MAX77802_REG_INT2MSK = 0x05, | ||
| 194 | |||
| 195 | MAX77802_REG_STATUS1 = 0x06, | ||
| 196 | MAX77802_REG_STATUS2 = 0x07, | ||
| 197 | |||
| 198 | MAX77802_REG_PWRON = 0x08, | ||
| 199 | /* Reserved: 0x09 */ | ||
| 200 | MAX77802_REG_MRSTB = 0x0A, | ||
| 201 | MAX77802_REG_EPWRHOLD = 0x0B, | ||
| 202 | /* Reserved: 0x0C-0x0D */ | ||
| 203 | MAX77802_REG_BOOSTCTRL = 0x0E, | ||
| 204 | MAX77802_REG_BOOSTOUT = 0x0F, | ||
| 205 | |||
| 206 | MAX77802_REG_BUCK1CTRL = 0x10, | ||
| 207 | MAX77802_REG_BUCK1DVS1 = 0x11, | ||
| 208 | MAX77802_REG_BUCK1DVS2 = 0x12, | ||
| 209 | MAX77802_REG_BUCK1DVS3 = 0x13, | ||
| 210 | MAX77802_REG_BUCK1DVS4 = 0x14, | ||
| 211 | MAX77802_REG_BUCK1DVS5 = 0x15, | ||
| 212 | MAX77802_REG_BUCK1DVS6 = 0x16, | ||
| 213 | MAX77802_REG_BUCK1DVS7 = 0x17, | ||
| 214 | MAX77802_REG_BUCK1DVS8 = 0x18, | ||
| 215 | /* Reserved: 0x19 */ | ||
| 216 | MAX77802_REG_BUCK2CTRL1 = 0x1A, | ||
| 217 | MAX77802_REG_BUCK2CTRL2 = 0x1B, | ||
| 218 | MAX77802_REG_BUCK2PHTRAN = 0x1C, | ||
| 219 | MAX77802_REG_BUCK2DVS1 = 0x1D, | ||
| 220 | MAX77802_REG_BUCK2DVS2 = 0x1E, | ||
| 221 | MAX77802_REG_BUCK2DVS3 = 0x1F, | ||
| 222 | MAX77802_REG_BUCK2DVS4 = 0x20, | ||
| 223 | MAX77802_REG_BUCK2DVS5 = 0x21, | ||
| 224 | MAX77802_REG_BUCK2DVS6 = 0x22, | ||
| 225 | MAX77802_REG_BUCK2DVS7 = 0x23, | ||
| 226 | MAX77802_REG_BUCK2DVS8 = 0x24, | ||
| 227 | /* Reserved: 0x25-0x26 */ | ||
| 228 | MAX77802_REG_BUCK3CTRL1 = 0x27, | ||
| 229 | MAX77802_REG_BUCK3DVS1 = 0x28, | ||
| 230 | MAX77802_REG_BUCK3DVS2 = 0x29, | ||
| 231 | MAX77802_REG_BUCK3DVS3 = 0x2A, | ||
| 232 | MAX77802_REG_BUCK3DVS4 = 0x2B, | ||
| 233 | MAX77802_REG_BUCK3DVS5 = 0x2C, | ||
| 234 | MAX77802_REG_BUCK3DVS6 = 0x2D, | ||
| 235 | MAX77802_REG_BUCK3DVS7 = 0x2E, | ||
| 236 | MAX77802_REG_BUCK3DVS8 = 0x2F, | ||
| 237 | /* Reserved: 0x30-0x36 */ | ||
| 238 | MAX77802_REG_BUCK4CTRL1 = 0x37, | ||
| 239 | MAX77802_REG_BUCK4DVS1 = 0x38, | ||
| 240 | MAX77802_REG_BUCK4DVS2 = 0x39, | ||
| 241 | MAX77802_REG_BUCK4DVS3 = 0x3A, | ||
| 242 | MAX77802_REG_BUCK4DVS4 = 0x3B, | ||
| 243 | MAX77802_REG_BUCK4DVS5 = 0x3C, | ||
| 244 | MAX77802_REG_BUCK4DVS6 = 0x3D, | ||
| 245 | MAX77802_REG_BUCK4DVS7 = 0x3E, | ||
| 246 | MAX77802_REG_BUCK4DVS8 = 0x3F, | ||
| 247 | /* Reserved: 0x40 */ | ||
| 248 | MAX77802_REG_BUCK5CTRL = 0x41, | ||
| 249 | MAX77802_REG_BUCK5OUT = 0x42, | ||
| 250 | /* Reserved: 0x43 */ | ||
| 251 | MAX77802_REG_BUCK6CTRL = 0x44, | ||
| 252 | MAX77802_REG_BUCK6DVS1 = 0x45, | ||
| 253 | MAX77802_REG_BUCK6DVS2 = 0x46, | ||
| 254 | MAX77802_REG_BUCK6DVS3 = 0x47, | ||
| 255 | MAX77802_REG_BUCK6DVS4 = 0x48, | ||
| 256 | MAX77802_REG_BUCK6DVS5 = 0x49, | ||
| 257 | MAX77802_REG_BUCK6DVS6 = 0x4A, | ||
| 258 | MAX77802_REG_BUCK6DVS7 = 0x4B, | ||
| 259 | MAX77802_REG_BUCK6DVS8 = 0x4C, | ||
| 260 | /* Reserved: 0x4D */ | ||
| 261 | MAX77802_REG_BUCK7CTRL = 0x4E, | ||
| 262 | MAX77802_REG_BUCK7OUT = 0x4F, | ||
| 263 | /* Reserved: 0x50 */ | ||
| 264 | MAX77802_REG_BUCK8CTRL = 0x51, | ||
| 265 | MAX77802_REG_BUCK8OUT = 0x52, | ||
| 266 | /* Reserved: 0x53 */ | ||
| 267 | MAX77802_REG_BUCK9CTRL = 0x54, | ||
| 268 | MAX77802_REG_BUCK9OUT = 0x55, | ||
| 269 | /* Reserved: 0x56 */ | ||
| 270 | MAX77802_REG_BUCK10CTRL = 0x57, | ||
| 271 | MAX77802_REG_BUCK10OUT = 0x58, | ||
| 272 | |||
| 273 | /* Reserved: 0x59-0x5F */ | ||
| 274 | |||
| 275 | MAX77802_REG_LDO1CTRL1 = 0x60, | ||
| 276 | MAX77802_REG_LDO2CTRL1 = 0x61, | ||
| 277 | MAX77802_REG_LDO3CTRL1 = 0x62, | ||
| 278 | MAX77802_REG_LDO4CTRL1 = 0x63, | ||
| 279 | MAX77802_REG_LDO5CTRL1 = 0x64, | ||
| 280 | MAX77802_REG_LDO6CTRL1 = 0x65, | ||
| 281 | MAX77802_REG_LDO7CTRL1 = 0x66, | ||
| 282 | MAX77802_REG_LDO8CTRL1 = 0x67, | ||
| 283 | MAX77802_REG_LDO9CTRL1 = 0x68, | ||
| 284 | MAX77802_REG_LDO10CTRL1 = 0x69, | ||
| 285 | MAX77802_REG_LDO11CTRL1 = 0x6A, | ||
| 286 | MAX77802_REG_LDO12CTRL1 = 0x6B, | ||
| 287 | MAX77802_REG_LDO13CTRL1 = 0x6C, | ||
| 288 | MAX77802_REG_LDO14CTRL1 = 0x6D, | ||
| 289 | MAX77802_REG_LDO15CTRL1 = 0x6E, | ||
| 290 | /* Reserved: 0x6F */ | ||
| 291 | MAX77802_REG_LDO17CTRL1 = 0x70, | ||
| 292 | MAX77802_REG_LDO18CTRL1 = 0x71, | ||
| 293 | MAX77802_REG_LDO19CTRL1 = 0x72, | ||
| 294 | MAX77802_REG_LDO20CTRL1 = 0x73, | ||
| 295 | MAX77802_REG_LDO21CTRL1 = 0x74, | ||
| 296 | MAX77802_REG_LDO22CTRL1 = 0x75, | ||
| 297 | MAX77802_REG_LDO23CTRL1 = 0x76, | ||
| 298 | MAX77802_REG_LDO24CTRL1 = 0x77, | ||
| 299 | MAX77802_REG_LDO25CTRL1 = 0x78, | ||
| 300 | MAX77802_REG_LDO26CTRL1 = 0x79, | ||
| 301 | MAX77802_REG_LDO27CTRL1 = 0x7A, | ||
| 302 | MAX77802_REG_LDO28CTRL1 = 0x7B, | ||
| 303 | MAX77802_REG_LDO29CTRL1 = 0x7C, | ||
| 304 | MAX77802_REG_LDO30CTRL1 = 0x7D, | ||
| 305 | /* Reserved: 0x7E */ | ||
| 306 | MAX77802_REG_LDO32CTRL1 = 0x7F, | ||
| 307 | MAX77802_REG_LDO33CTRL1 = 0x80, | ||
| 308 | MAX77802_REG_LDO34CTRL1 = 0x81, | ||
| 309 | MAX77802_REG_LDO35CTRL1 = 0x82, | ||
| 310 | /* Reserved: 0x83-0x8F */ | ||
| 311 | MAX77802_REG_LDO1CTRL2 = 0x90, | ||
| 312 | MAX77802_REG_LDO2CTRL2 = 0x91, | ||
| 313 | MAX77802_REG_LDO3CTRL2 = 0x92, | ||
| 314 | MAX77802_REG_LDO4CTRL2 = 0x93, | ||
| 315 | MAX77802_REG_LDO5CTRL2 = 0x94, | ||
| 316 | MAX77802_REG_LDO6CTRL2 = 0x95, | ||
| 317 | MAX77802_REG_LDO7CTRL2 = 0x96, | ||
| 318 | MAX77802_REG_LDO8CTRL2 = 0x97, | ||
| 319 | MAX77802_REG_LDO9CTRL2 = 0x98, | ||
| 320 | MAX77802_REG_LDO10CTRL2 = 0x99, | ||
| 321 | MAX77802_REG_LDO11CTRL2 = 0x9A, | ||
| 322 | MAX77802_REG_LDO12CTRL2 = 0x9B, | ||
| 323 | MAX77802_REG_LDO13CTRL2 = 0x9C, | ||
| 324 | MAX77802_REG_LDO14CTRL2 = 0x9D, | ||
| 325 | MAX77802_REG_LDO15CTRL2 = 0x9E, | ||
| 326 | /* Reserved: 0x9F */ | ||
| 327 | MAX77802_REG_LDO17CTRL2 = 0xA0, | ||
| 328 | MAX77802_REG_LDO18CTRL2 = 0xA1, | ||
| 329 | MAX77802_REG_LDO19CTRL2 = 0xA2, | ||
| 330 | MAX77802_REG_LDO20CTRL2 = 0xA3, | ||
| 331 | MAX77802_REG_LDO21CTRL2 = 0xA4, | ||
| 332 | MAX77802_REG_LDO22CTRL2 = 0xA5, | ||
| 333 | MAX77802_REG_LDO23CTRL2 = 0xA6, | ||
| 334 | MAX77802_REG_LDO24CTRL2 = 0xA7, | ||
| 335 | MAX77802_REG_LDO25CTRL2 = 0xA8, | ||
| 336 | MAX77802_REG_LDO26CTRL2 = 0xA9, | ||
| 337 | MAX77802_REG_LDO27CTRL2 = 0xAA, | ||
| 338 | MAX77802_REG_LDO28CTRL2 = 0xAB, | ||
| 339 | MAX77802_REG_LDO29CTRL2 = 0xAC, | ||
| 340 | MAX77802_REG_LDO30CTRL2 = 0xAD, | ||
| 341 | /* Reserved: 0xAE */ | ||
| 342 | MAX77802_REG_LDO32CTRL2 = 0xAF, | ||
| 343 | MAX77802_REG_LDO33CTRL2 = 0xB0, | ||
| 344 | MAX77802_REG_LDO34CTRL2 = 0xB1, | ||
| 345 | MAX77802_REG_LDO35CTRL2 = 0xB2, | ||
| 346 | /* Reserved: 0xB3 */ | ||
| 347 | |||
| 348 | MAX77802_REG_BBAT_CHG = 0xB4, | ||
| 349 | MAX77802_REG_32KHZ = 0xB5, | ||
| 350 | |||
| 351 | MAX77802_REG_PMIC_END = 0xB6, | ||
| 352 | }; | ||
| 353 | |||
| 354 | enum max77802_rtc_reg { | ||
| 355 | MAX77802_RTC_INT = 0xC0, | ||
| 356 | MAX77802_RTC_INTM = 0xC1, | ||
| 357 | MAX77802_RTC_CONTROLM = 0xC2, | ||
| 358 | MAX77802_RTC_CONTROL = 0xC3, | ||
| 359 | MAX77802_RTC_UPDATE0 = 0xC4, | ||
| 360 | MAX77802_RTC_UPDATE1 = 0xC5, | ||
| 361 | MAX77802_WTSR_SMPL_CNTL = 0xC6, | ||
| 362 | MAX77802_RTC_SEC = 0xC7, | ||
| 363 | MAX77802_RTC_MIN = 0xC8, | ||
| 364 | MAX77802_RTC_HOUR = 0xC9, | ||
| 365 | MAX77802_RTC_WEEKDAY = 0xCA, | ||
| 366 | MAX77802_RTC_MONTH = 0xCB, | ||
| 367 | MAX77802_RTC_YEAR = 0xCC, | ||
| 368 | MAX77802_RTC_DATE = 0xCD, | ||
| 369 | MAX77802_RTC_AE1 = 0xCE, | ||
| 370 | MAX77802_ALARM1_SEC = 0xCF, | ||
| 371 | MAX77802_ALARM1_MIN = 0xD0, | ||
| 372 | MAX77802_ALARM1_HOUR = 0xD1, | ||
| 373 | MAX77802_ALARM1_WEEKDAY = 0xD2, | ||
| 374 | MAX77802_ALARM1_MONTH = 0xD3, | ||
| 375 | MAX77802_ALARM1_YEAR = 0xD4, | ||
| 376 | MAX77802_ALARM1_DATE = 0xD5, | ||
| 377 | MAX77802_RTC_AE2 = 0xD6, | ||
| 378 | MAX77802_ALARM2_SEC = 0xD7, | ||
| 379 | MAX77802_ALARM2_MIN = 0xD8, | ||
| 380 | MAX77802_ALARM2_HOUR = 0xD9, | ||
| 381 | MAX77802_ALARM2_WEEKDAY = 0xDA, | ||
| 382 | MAX77802_ALARM2_MONTH = 0xDB, | ||
| 383 | MAX77802_ALARM2_YEAR = 0xDC, | ||
| 384 | MAX77802_ALARM2_DATE = 0xDD, | ||
| 385 | |||
| 386 | MAX77802_RTC_END = 0xDF, | ||
| 387 | }; | ||
| 388 | |||
| 184 | enum max77686_irq_source { | 389 | enum max77686_irq_source { |
| 185 | PMIC_INT1 = 0, | 390 | PMIC_INT1 = 0, |
| 186 | PMIC_INT2, | 391 | PMIC_INT2, |
| @@ -250,6 +455,7 @@ struct max77686_dev { | |||
| 250 | 455 | ||
| 251 | enum max77686_types { | 456 | enum max77686_types { |
| 252 | TYPE_MAX77686, | 457 | TYPE_MAX77686, |
| 458 | TYPE_MAX77802, | ||
| 253 | }; | 459 | }; |
| 254 | 460 | ||
| 255 | extern int max77686_irq_init(struct max77686_dev *max77686); | 461 | extern int max77686_irq_init(struct max77686_dev *max77686); |
diff --git a/include/linux/mfd/max77686.h b/include/linux/mfd/max77686.h index 4cbcc13e8a2a..7e6dc4b2b795 100644 --- a/include/linux/mfd/max77686.h +++ b/include/linux/mfd/max77686.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * max77686.h - Driver for the Maxim 77686 | 2 | * max77686.h - Driver for the Maxim 77686/802 |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2012 Samsung Electrnoics | 4 | * Copyright (C) 2012 Samsung Electrnoics |
| 5 | * Chiwoong Byun <woong.byun@samsung.com> | 5 | * Chiwoong Byun <woong.byun@samsung.com> |
| @@ -71,6 +71,54 @@ enum max77686_regulators { | |||
| 71 | MAX77686_REG_MAX, | 71 | MAX77686_REG_MAX, |
| 72 | }; | 72 | }; |
| 73 | 73 | ||
| 74 | /* MAX77802 regulator IDs */ | ||
| 75 | enum max77802_regulators { | ||
| 76 | MAX77802_BUCK1 = 0, | ||
| 77 | MAX77802_BUCK2, | ||
| 78 | MAX77802_BUCK3, | ||
| 79 | MAX77802_BUCK4, | ||
| 80 | MAX77802_BUCK5, | ||
| 81 | MAX77802_BUCK6, | ||
| 82 | MAX77802_BUCK7, | ||
| 83 | MAX77802_BUCK8, | ||
| 84 | MAX77802_BUCK9, | ||
| 85 | MAX77802_BUCK10, | ||
| 86 | MAX77802_LDO1, | ||
| 87 | MAX77802_LDO2, | ||
| 88 | MAX77802_LDO3, | ||
| 89 | MAX77802_LDO4, | ||
| 90 | MAX77802_LDO5, | ||
| 91 | MAX77802_LDO6, | ||
| 92 | MAX77802_LDO7, | ||
| 93 | MAX77802_LDO8, | ||
| 94 | MAX77802_LDO9, | ||
| 95 | MAX77802_LDO10, | ||
| 96 | MAX77802_LDO11, | ||
| 97 | MAX77802_LDO12, | ||
| 98 | MAX77802_LDO13, | ||
| 99 | MAX77802_LDO14, | ||
| 100 | MAX77802_LDO15, | ||
| 101 | MAX77802_LDO17, | ||
| 102 | MAX77802_LDO18, | ||
| 103 | MAX77802_LDO19, | ||
| 104 | MAX77802_LDO20, | ||
| 105 | MAX77802_LDO21, | ||
| 106 | MAX77802_LDO23, | ||
| 107 | MAX77802_LDO24, | ||
| 108 | MAX77802_LDO25, | ||
| 109 | MAX77802_LDO26, | ||
| 110 | MAX77802_LDO27, | ||
| 111 | MAX77802_LDO28, | ||
| 112 | MAX77802_LDO29, | ||
| 113 | MAX77802_LDO30, | ||
| 114 | MAX77802_LDO32, | ||
| 115 | MAX77802_LDO33, | ||
| 116 | MAX77802_LDO34, | ||
| 117 | MAX77802_LDO35, | ||
| 118 | |||
| 119 | MAX77802_REG_MAX, | ||
| 120 | }; | ||
| 121 | |||
| 74 | struct max77686_regulator_data { | 122 | struct max77686_regulator_data { |
| 75 | int id; | 123 | int id; |
| 76 | struct regulator_init_data *initdata; | 124 | struct regulator_init_data *initdata; |
| @@ -83,6 +131,13 @@ enum max77686_opmode { | |||
| 83 | MAX77686_OPMODE_STANDBY, | 131 | MAX77686_OPMODE_STANDBY, |
| 84 | }; | 132 | }; |
| 85 | 133 | ||
| 134 | enum max77802_opmode { | ||
| 135 | MAX77802_OPMODE_OFF, | ||
| 136 | MAX77802_OPMODE_STANDBY, | ||
| 137 | MAX77802_OPMODE_LP, | ||
| 138 | MAX77802_OPMODE_NORMAL, | ||
| 139 | }; | ||
| 140 | |||
| 86 | struct max77686_opmode_data { | 141 | struct max77686_opmode_data { |
| 87 | int id; | 142 | int id; |
| 88 | int mode; | 143 | int mode; |
