diff options
| author | Micky Ching <micky_ching@realsil.com.cn> | 2014-10-10 01:58:44 -0400 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2014-11-25 11:18:48 -0500 |
| commit | 5cb5d9616a47d5383a85379afa4429382ef46b38 (patch) | |
| tree | cecbc166e912f9ac1f40dcb32ad2b2fec5be8684 /include/linux/mfd | |
| parent | 130dd5b039dcbab7bcb2fdce0bb3cc7347b08b29 (diff) | |
mfd: rtsx: Fix PM suspend for 5227 & 5249
Fix rts5227&5249 failed send buffer cmd after suspend,
PM_CTRL3 should reset before send any buffer cmd after suspend.
Otherwise, buffer cmd will failed, this will lead resume fail.
Signed-off-by: Micky Ching <micky_ching@realsil.com.cn>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/rtsx_pci.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h index 74346d5e7899..1604dda4edcf 100644 --- a/include/linux/mfd/rtsx_pci.h +++ b/include/linux/mfd/rtsx_pci.h | |||
| @@ -707,6 +707,14 @@ | |||
| 707 | #define PM_CTRL1 0xFF44 | 707 | #define PM_CTRL1 0xFF44 |
| 708 | #define PM_CTRL2 0xFF45 | 708 | #define PM_CTRL2 0xFF45 |
| 709 | #define PM_CTRL3 0xFF46 | 709 | #define PM_CTRL3 0xFF46 |
| 710 | #define SDIO_SEND_PME_EN 0x80 | ||
| 711 | #define FORCE_RC_MODE_ON 0x40 | ||
| 712 | #define FORCE_RX50_LINK_ON 0x20 | ||
| 713 | #define D3_DELINK_MODE_EN 0x10 | ||
| 714 | #define USE_PESRTB_CTL_DELINK 0x08 | ||
| 715 | #define DELAY_PIN_WAKE 0x04 | ||
| 716 | #define RESET_PIN_WAKE 0x02 | ||
| 717 | #define PM_WAKE_EN 0x01 | ||
| 710 | #define PM_CTRL4 0xFF47 | 718 | #define PM_CTRL4 0xFF47 |
| 711 | 719 | ||
| 712 | /* Memory mapping */ | 720 | /* Memory mapping */ |
| @@ -752,6 +760,14 @@ | |||
| 752 | #define PHY_DUM_REG 0x1F | 760 | #define PHY_DUM_REG 0x1F |
| 753 | 761 | ||
| 754 | #define LCTLR 0x80 | 762 | #define LCTLR 0x80 |
| 763 | #define LCTLR_EXT_SYNC 0x80 | ||
| 764 | #define LCTLR_COMMON_CLOCK_CFG 0x40 | ||
| 765 | #define LCTLR_RETRAIN_LINK 0x20 | ||
| 766 | #define LCTLR_LINK_DISABLE 0x10 | ||
| 767 | #define LCTLR_RCB 0x08 | ||
| 768 | #define LCTLR_RESERVED 0x04 | ||
| 769 | #define LCTLR_ASPM_CTL_MASK 0x03 | ||
| 770 | |||
| 755 | #define PCR_SETTING_REG1 0x724 | 771 | #define PCR_SETTING_REG1 0x724 |
| 756 | #define PCR_SETTING_REG2 0x814 | 772 | #define PCR_SETTING_REG2 0x814 |
| 757 | #define PCR_SETTING_REG3 0x747 | 773 | #define PCR_SETTING_REG3 0x747 |
| @@ -967,4 +983,16 @@ static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr) | |||
| 967 | return (u8 *)(pcr->host_cmds_ptr); | 983 | return (u8 *)(pcr->host_cmds_ptr); |
| 968 | } | 984 | } |
| 969 | 985 | ||
| 986 | static inline int rtsx_pci_update_cfg_byte(struct rtsx_pcr *pcr, int addr, | ||
| 987 | u8 mask, u8 append) | ||
| 988 | { | ||
| 989 | int err; | ||
| 990 | u8 val; | ||
| 991 | |||
| 992 | err = pci_read_config_byte(pcr->pci, addr, &val); | ||
| 993 | if (err < 0) | ||
| 994 | return err; | ||
| 995 | return pci_write_config_byte(pcr->pci, addr, (val & mask) | append); | ||
| 996 | } | ||
| 997 | |||
| 970 | #endif | 998 | #endif |
