diff options
| author | Charles Keepax <ckeepax@opensource.wolfsonmicro.com> | 2013-07-04 03:56:27 -0400 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2013-07-15 06:07:02 -0400 |
| commit | 326c29b6bedb7440b4232631686027af84a62cf5 (patch) | |
| tree | f78042a2ef8df5a88e579a4abdfe64f12b8983c4 /include/linux/mfd | |
| parent | ad81f0545ef01ea651886dddac4bef6cec930092 (diff) | |
mfd: arizona: Add GPIO control register bit definitions
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/arizona/gpio.h | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/include/linux/mfd/arizona/gpio.h b/include/linux/mfd/arizona/gpio.h new file mode 100644 index 000000000000..d2146bb74f89 --- /dev/null +++ b/include/linux/mfd/arizona/gpio.h | |||
| @@ -0,0 +1,96 @@ | |||
| 1 | /* | ||
| 2 | * GPIO configuration for Arizona devices | ||
| 3 | * | ||
| 4 | * Copyright 2013 Wolfson Microelectronics. PLC. | ||
| 5 | * | ||
| 6 | * Author: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef _ARIZONA_GPIO_H | ||
| 14 | #define _ARIZONA_GPIO_H | ||
| 15 | |||
| 16 | #define ARIZONA_GP_FN_TXLRCLK 0x00 | ||
| 17 | #define ARIZONA_GP_FN_GPIO 0x01 | ||
| 18 | #define ARIZONA_GP_FN_IRQ1 0x02 | ||
| 19 | #define ARIZONA_GP_FN_IRQ2 0x03 | ||
| 20 | #define ARIZONA_GP_FN_OPCLK 0x04 | ||
| 21 | #define ARIZONA_GP_FN_FLL1_OUT 0x05 | ||
| 22 | #define ARIZONA_GP_FN_FLL2_OUT 0x06 | ||
| 23 | #define ARIZONA_GP_FN_PWM1 0x08 | ||
| 24 | #define ARIZONA_GP_FN_PWM2 0x09 | ||
| 25 | #define ARIZONA_GP_FN_SYSCLK_UNDERCLOCKED 0x0A | ||
| 26 | #define ARIZONA_GP_FN_ASYNCCLK_UNDERCLOCKED 0x0B | ||
| 27 | #define ARIZONA_GP_FN_FLL1_LOCK 0x0C | ||
| 28 | #define ARIZONA_GP_FN_FLL2_LOCK 0x0D | ||
| 29 | #define ARIZONA_GP_FN_FLL1_CLOCK_OK 0x0F | ||
| 30 | #define ARIZONA_GP_FN_FLL2_CLOCK_OK 0x10 | ||
| 31 | #define ARIZONA_GP_FN_HEADPHONE_DET 0x12 | ||
| 32 | #define ARIZONA_GP_FN_MIC_DET 0x13 | ||
| 33 | #define ARIZONA_GP_FN_WSEQ_STATUS 0x15 | ||
| 34 | #define ARIZONA_GP_FN_CIF_ADDRESS_ERROR 0x16 | ||
| 35 | #define ARIZONA_GP_FN_ASRC1_LOCK 0x1A | ||
| 36 | #define ARIZONA_GP_FN_ASRC2_LOCK 0x1B | ||
| 37 | #define ARIZONA_GP_FN_ASRC_CONFIG_ERROR 0x1C | ||
| 38 | #define ARIZONA_GP_FN_DRC1_SIGNAL_DETECT 0x1D | ||
| 39 | #define ARIZONA_GP_FN_DRC1_ANTICLIP 0x1E | ||
| 40 | #define ARIZONA_GP_FN_DRC1_DECAY 0x1F | ||
| 41 | #define ARIZONA_GP_FN_DRC1_NOISE 0x20 | ||
| 42 | #define ARIZONA_GP_FN_DRC1_QUICK_RELEASE 0x21 | ||
| 43 | #define ARIZONA_GP_FN_DRC2_SIGNAL_DETECT 0x22 | ||
| 44 | #define ARIZONA_GP_FN_DRC2_ANTICLIP 0x23 | ||
| 45 | #define ARIZONA_GP_FN_DRC2_DECAY 0x24 | ||
| 46 | #define ARIZONA_GP_FN_DRC2_NOISE 0x25 | ||
| 47 | #define ARIZONA_GP_FN_DRC2_QUICK_RELEASE 0x26 | ||
| 48 | #define ARIZONA_GP_FN_MIXER_DROPPED_SAMPLE 0x27 | ||
| 49 | #define ARIZONA_GP_FN_AIF1_CONFIG_ERROR 0x28 | ||
| 50 | #define ARIZONA_GP_FN_AIF2_CONFIG_ERROR 0x29 | ||
| 51 | #define ARIZONA_GP_FN_AIF3_CONFIG_ERROR 0x2A | ||
| 52 | #define ARIZONA_GP_FN_SPK_TEMP_SHUTDOWN 0x2B | ||
| 53 | #define ARIZONA_GP_FN_SPK_TEMP_WARNING 0x2C | ||
| 54 | #define ARIZONA_GP_FN_UNDERCLOCKED 0x2D | ||
| 55 | #define ARIZONA_GP_FN_OVERCLOCKED 0x2E | ||
| 56 | #define ARIZONA_GP_FN_DSP_IRQ1 0x35 | ||
| 57 | #define ARIZONA_GP_FN_DSP_IRQ2 0x36 | ||
| 58 | #define ARIZONA_GP_FN_ASYNC_OPCLK 0x3D | ||
| 59 | #define ARIZONA_GP_FN_BOOT_DONE 0x44 | ||
| 60 | #define ARIZONA_GP_FN_DSP1_RAM_READY 0x45 | ||
| 61 | #define ARIZONA_GP_FN_SYSCLK_ENA_STATUS 0x4B | ||
| 62 | #define ARIZONA_GP_FN_ASYNCCLK_ENA_STATUS 0x4C | ||
| 63 | |||
| 64 | #define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */ | ||
| 65 | #define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */ | ||
| 66 | #define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */ | ||
| 67 | #define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */ | ||
| 68 | #define ARIZONA_GPN_PU 0x4000 /* GPN_PU */ | ||
| 69 | #define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */ | ||
| 70 | #define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */ | ||
| 71 | #define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */ | ||
| 72 | #define ARIZONA_GPN_PD 0x2000 /* GPN_PD */ | ||
| 73 | #define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */ | ||
| 74 | #define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */ | ||
| 75 | #define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */ | ||
| 76 | #define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */ | ||
| 77 | #define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */ | ||
| 78 | #define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */ | ||
| 79 | #define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */ | ||
| 80 | #define ARIZONA_GPN_POL 0x0400 /* GPN_POL */ | ||
| 81 | #define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */ | ||
| 82 | #define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */ | ||
| 83 | #define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */ | ||
| 84 | #define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */ | ||
| 85 | #define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */ | ||
| 86 | #define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */ | ||
| 87 | #define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */ | ||
| 88 | #define ARIZONA_GPN_DB 0x0100 /* GPN_DB */ | ||
| 89 | #define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */ | ||
| 90 | #define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */ | ||
| 91 | #define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */ | ||
| 92 | #define ARIZONA_GPN_FN_MASK 0x007F /* GPN_DB */ | ||
| 93 | #define ARIZONA_GPN_FN_SHIFT 0 /* GPN_DB */ | ||
| 94 | #define ARIZONA_GPN_FN_WIDTH 7 /* GPN_DB */ | ||
| 95 | |||
| 96 | #endif | ||
