diff options
| author | Sundar Iyer <sundar.iyer@stericsson.com> | 2010-12-12 23:03:14 -0500 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@stericsson.com> | 2010-12-19 13:27:46 -0500 |
| commit | 20406ebff4a298e6e3abbc1717a90bb3e55dc820 (patch) | |
| tree | 7a9c79f4e1310e3a2ef3f50fd98c41e453999414 /include/linux/mfd | |
| parent | f4e8afdc7ab1b5a0962be02a9dd15d29a81f4c53 (diff) | |
mfd/tc3589x: rename tc35892 structs/registers to tc359x
Most of the register layout, client IRQ numbers on the TC35892 is shared also
by other variants. Make this generic as tc3589x
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/tc3589x.h | 202 |
1 files changed, 101 insertions, 101 deletions
diff --git a/include/linux/mfd/tc3589x.h b/include/linux/mfd/tc3589x.h index eff3094ca84e..ea1918896f5b 100644 --- a/include/linux/mfd/tc3589x.h +++ b/include/linux/mfd/tc3589x.h | |||
| @@ -4,133 +4,133 @@ | |||
| 4 | * License Terms: GNU General Public License, version 2 | 4 | * License Terms: GNU General Public License, version 2 |
| 5 | */ | 5 | */ |
| 6 | 6 | ||
| 7 | #ifndef __LINUX_MFD_TC35892_H | 7 | #ifndef __LINUX_MFD_TC3589x_H |
| 8 | #define __LINUX_MFD_TC35892_H | 8 | #define __LINUX_MFD_TC3589x_H |
| 9 | 9 | ||
| 10 | #include <linux/device.h> | 10 | #include <linux/device.h> |
| 11 | 11 | ||
| 12 | #define TC35892_RSTCTRL_IRQRST (1 << 4) | 12 | #define TC3589x_RSTCTRL_IRQRST (1 << 4) |
| 13 | #define TC35892_RSTCTRL_TIMRST (1 << 3) | 13 | #define TC3589x_RSTCTRL_TIMRST (1 << 3) |
| 14 | #define TC35892_RSTCTRL_ROTRST (1 << 2) | 14 | #define TC3589x_RSTCTRL_ROTRST (1 << 2) |
| 15 | #define TC35892_RSTCTRL_KBDRST (1 << 1) | 15 | #define TC3589x_RSTCTRL_KBDRST (1 << 1) |
| 16 | #define TC35892_RSTCTRL_GPIRST (1 << 0) | 16 | #define TC3589x_RSTCTRL_GPIRST (1 << 0) |
| 17 | 17 | ||
| 18 | #define TC35892_IRQST 0x91 | 18 | #define TC3589x_IRQST 0x91 |
| 19 | 19 | ||
| 20 | #define TC35892_MANFCODE_MAGIC 0x03 | 20 | #define TC3589x_MANFCODE_MAGIC 0x03 |
| 21 | #define TC35892_MANFCODE 0x80 | 21 | #define TC3589x_MANFCODE 0x80 |
| 22 | #define TC35892_VERSION 0x81 | 22 | #define TC3589x_VERSION 0x81 |
| 23 | #define TC35892_IOCFG 0xA7 | 23 | #define TC3589x_IOCFG 0xA7 |
| 24 | 24 | ||
| 25 | #define TC35892_CLKMODE 0x88 | 25 | #define TC3589x_CLKMODE 0x88 |
| 26 | #define TC35892_CLKCFG 0x89 | 26 | #define TC3589x_CLKCFG 0x89 |
| 27 | #define TC35892_CLKEN 0x8A | 27 | #define TC3589x_CLKEN 0x8A |
| 28 | 28 | ||
| 29 | #define TC35892_RSTCTRL 0x82 | 29 | #define TC3589x_RSTCTRL 0x82 |
| 30 | #define TC35892_EXTRSTN 0x83 | 30 | #define TC3589x_EXTRSTN 0x83 |
| 31 | #define TC35892_RSTINTCLR 0x84 | 31 | #define TC3589x_RSTINTCLR 0x84 |
| 32 | 32 | ||
| 33 | #define TC35892_GPIOIS0 0xC9 | 33 | #define TC3589x_GPIOIS0 0xC9 |
| 34 | #define TC35892_GPIOIS1 0xCA | 34 | #define TC3589x_GPIOIS1 0xCA |
| 35 | #define TC35892_GPIOIS2 0xCB | 35 | #define TC3589x_GPIOIS2 0xCB |
| 36 | #define TC35892_GPIOIBE0 0xCC | 36 | #define TC3589x_GPIOIBE0 0xCC |
| 37 | #define TC35892_GPIOIBE1 0xCD | 37 | #define TC3589x_GPIOIBE1 0xCD |
| 38 | #define TC35892_GPIOIBE2 0xCE | 38 | #define TC3589x_GPIOIBE2 0xCE |
| 39 | #define TC35892_GPIOIEV0 0xCF | 39 | #define TC3589x_GPIOIEV0 0xCF |
| 40 | #define TC35892_GPIOIEV1 0xD0 | 40 | #define TC3589x_GPIOIEV1 0xD0 |
| 41 | #define TC35892_GPIOIEV2 0xD1 | 41 | #define TC3589x_GPIOIEV2 0xD1 |
| 42 | #define TC35892_GPIOIE0 0xD2 | 42 | #define TC3589x_GPIOIE0 0xD2 |
| 43 | #define TC35892_GPIOIE1 0xD3 | 43 | #define TC3589x_GPIOIE1 0xD3 |
| 44 | #define TC35892_GPIOIE2 0xD4 | 44 | #define TC3589x_GPIOIE2 0xD4 |
| 45 | #define TC35892_GPIORIS0 0xD6 | 45 | #define TC3589x_GPIORIS0 0xD6 |
| 46 | #define TC35892_GPIORIS1 0xD7 | 46 | #define TC3589x_GPIORIS1 0xD7 |
| 47 | #define TC35892_GPIORIS2 0xD8 | 47 | #define TC3589x_GPIORIS2 0xD8 |
| 48 | #define TC35892_GPIOMIS0 0xD9 | 48 | #define TC3589x_GPIOMIS0 0xD9 |
| 49 | #define TC35892_GPIOMIS1 0xDA | 49 | #define TC3589x_GPIOMIS1 0xDA |
| 50 | #define TC35892_GPIOMIS2 0xDB | 50 | #define TC3589x_GPIOMIS2 0xDB |
| 51 | #define TC35892_GPIOIC0 0xDC | 51 | #define TC3589x_GPIOIC0 0xDC |
| 52 | #define TC35892_GPIOIC1 0xDD | 52 | #define TC3589x_GPIOIC1 0xDD |
| 53 | #define TC35892_GPIOIC2 0xDE | 53 | #define TC3589x_GPIOIC2 0xDE |
| 54 | 54 | ||
| 55 | #define TC35892_GPIODATA0 0xC0 | 55 | #define TC3589x_GPIODATA0 0xC0 |
| 56 | #define TC35892_GPIOMASK0 0xc1 | 56 | #define TC3589x_GPIOMASK0 0xc1 |
| 57 | #define TC35892_GPIODATA1 0xC2 | 57 | #define TC3589x_GPIODATA1 0xC2 |
| 58 | #define TC35892_GPIOMASK1 0xc3 | 58 | #define TC3589x_GPIOMASK1 0xc3 |
| 59 | #define TC35892_GPIODATA2 0xC4 | 59 | #define TC3589x_GPIODATA2 0xC4 |
| 60 | #define TC35892_GPIOMASK2 0xC5 | 60 | #define TC3589x_GPIOMASK2 0xC5 |
| 61 | 61 | ||
| 62 | #define TC35892_GPIODIR0 0xC6 | 62 | #define TC3589x_GPIODIR0 0xC6 |
| 63 | #define TC35892_GPIODIR1 0xC7 | 63 | #define TC3589x_GPIODIR1 0xC7 |
| 64 | #define TC35892_GPIODIR2 0xC8 | 64 | #define TC3589x_GPIODIR2 0xC8 |
| 65 | 65 | ||
| 66 | #define TC35892_GPIOSYNC0 0xE6 | 66 | #define TC3589x_GPIOSYNC0 0xE6 |
| 67 | #define TC35892_GPIOSYNC1 0xE7 | 67 | #define TC3589x_GPIOSYNC1 0xE7 |
| 68 | #define TC35892_GPIOSYNC2 0xE8 | 68 | #define TC3589x_GPIOSYNC2 0xE8 |
| 69 | 69 | ||
| 70 | #define TC35892_GPIOWAKE0 0xE9 | 70 | #define TC3589x_GPIOWAKE0 0xE9 |
| 71 | #define TC35892_GPIOWAKE1 0xEA | 71 | #define TC3589x_GPIOWAKE1 0xEA |
| 72 | #define TC35892_GPIOWAKE2 0xEB | 72 | #define TC3589x_GPIOWAKE2 0xEB |
| 73 | 73 | ||
| 74 | #define TC35892_GPIOODM0 0xE0 | 74 | #define TC3589x_GPIOODM0 0xE0 |
| 75 | #define TC35892_GPIOODE0 0xE1 | 75 | #define TC3589x_GPIOODE0 0xE1 |
| 76 | #define TC35892_GPIOODM1 0xE2 | 76 | #define TC3589x_GPIOODM1 0xE2 |
| 77 | #define TC35892_GPIOODE1 0xE3 | 77 | #define TC3589x_GPIOODE1 0xE3 |
| 78 | #define TC35892_GPIOODM2 0xE4 | 78 | #define TC3589x_GPIOODM2 0xE4 |
| 79 | #define TC35892_GPIOODE2 0xE5 | 79 | #define TC3589x_GPIOODE2 0xE5 |
| 80 | 80 | ||
| 81 | #define TC35892_INT_GPIIRQ 0 | 81 | #define TC3589x_INT_GPIIRQ 0 |
| 82 | #define TC35892_INT_TI0IRQ 1 | 82 | #define TC3589x_INT_TI0IRQ 1 |
| 83 | #define TC35892_INT_TI1IRQ 2 | 83 | #define TC3589x_INT_TI1IRQ 2 |
| 84 | #define TC35892_INT_TI2IRQ 3 | 84 | #define TC3589x_INT_TI2IRQ 3 |
| 85 | #define TC35892_INT_ROTIRQ 5 | 85 | #define TC3589x_INT_ROTIRQ 5 |
| 86 | #define TC35892_INT_KBDIRQ 6 | 86 | #define TC3589x_INT_KBDIRQ 6 |
| 87 | #define TC35892_INT_PORIRQ 7 | 87 | #define TC3589x_INT_PORIRQ 7 |
| 88 | 88 | ||
| 89 | #define TC35892_NR_INTERNAL_IRQS 8 | 89 | #define TC3589x_NR_INTERNAL_IRQS 8 |
| 90 | #define TC35892_INT_GPIO(x) (TC35892_NR_INTERNAL_IRQS + (x)) | 90 | #define TC3589x_INT_GPIO(x) (TC3589x_NR_INTERNAL_IRQS + (x)) |
| 91 | 91 | ||
| 92 | struct tc35892 { | 92 | struct tc3589x { |
| 93 | struct mutex lock; | 93 | struct mutex lock; |
| 94 | struct device *dev; | 94 | struct device *dev; |
| 95 | struct i2c_client *i2c; | 95 | struct i2c_client *i2c; |
| 96 | 96 | ||
| 97 | int irq_base; | 97 | int irq_base; |
| 98 | int num_gpio; | 98 | int num_gpio; |
| 99 | struct tc35892_platform_data *pdata; | 99 | struct tc3589x_platform_data *pdata; |
| 100 | }; | 100 | }; |
| 101 | 101 | ||
| 102 | extern int tc35892_reg_write(struct tc35892 *tc35892, u8 reg, u8 data); | 102 | extern int tc3589x_reg_write(struct tc3589x *tc3589x, u8 reg, u8 data); |
| 103 | extern int tc35892_reg_read(struct tc35892 *tc35892, u8 reg); | 103 | extern int tc3589x_reg_read(struct tc3589x *tc3589x, u8 reg); |
| 104 | extern int tc35892_block_read(struct tc35892 *tc35892, u8 reg, u8 length, | 104 | extern int tc3589x_block_read(struct tc3589x *tc3589x, u8 reg, u8 length, |
| 105 | u8 *values); | 105 | u8 *values); |
| 106 | extern int tc35892_block_write(struct tc35892 *tc35892, u8 reg, u8 length, | 106 | extern int tc3589x_block_write(struct tc3589x *tc3589x, u8 reg, u8 length, |
| 107 | const u8 *values); | 107 | const u8 *values); |
| 108 | extern int tc35892_set_bits(struct tc35892 *tc35892, u8 reg, u8 mask, u8 val); | 108 | extern int tc3589x_set_bits(struct tc3589x *tc3589x, u8 reg, u8 mask, u8 val); |
| 109 | 109 | ||
| 110 | /** | 110 | /** |
| 111 | * struct tc35892_gpio_platform_data - TC35892 GPIO platform data | 111 | * struct tc3589x_gpio_platform_data - TC3589x GPIO platform data |
| 112 | * @gpio_base: first gpio number assigned to TC35892. A maximum of | 112 | * @gpio_base: first gpio number assigned to TC3589x. A maximum of |
| 113 | * %TC35892_NR_GPIOS GPIOs will be allocated. | 113 | * %TC3589x_NR_GPIOS GPIOs will be allocated. |
| 114 | * @setup: callback for board-specific initialization | 114 | * @setup: callback for board-specific initialization |
| 115 | * @remove: callback for board-specific teardown | 115 | * @remove: callback for board-specific teardown |
| 116 | */ | 116 | */ |
| 117 | struct tc35892_gpio_platform_data { | 117 | struct tc3589x_gpio_platform_data { |
| 118 | int gpio_base; | 118 | int gpio_base; |
| 119 | void (*setup)(struct tc35892 *tc35892, unsigned gpio_base); | 119 | void (*setup)(struct tc3589x *tc3589x, unsigned gpio_base); |
| 120 | void (*remove)(struct tc35892 *tc35892, unsigned gpio_base); | 120 | void (*remove)(struct tc3589x *tc3589x, unsigned gpio_base); |
| 121 | }; | 121 | }; |
| 122 | 122 | ||
| 123 | /** | 123 | /** |
| 124 | * struct tc35892_platform_data - TC35892 platform data | 124 | * struct tc3589x_platform_data - TC3589x platform data |
| 125 | * @irq_base: base IRQ number. %TC35892_NR_IRQS irqs will be used. | 125 | * @irq_base: base IRQ number. %TC3589x_NR_IRQS irqs will be used. |
| 126 | * @gpio: GPIO-specific platform data | 126 | * @gpio: GPIO-specific platform data |
| 127 | */ | 127 | */ |
| 128 | struct tc35892_platform_data { | 128 | struct tc3589x_platform_data { |
| 129 | int irq_base; | 129 | int irq_base; |
| 130 | struct tc35892_gpio_platform_data *gpio; | 130 | struct tc3589x_gpio_platform_data *gpio; |
| 131 | }; | 131 | }; |
| 132 | 132 | ||
| 133 | #define TC35892_NR_GPIOS 24 | 133 | #define TC3589x_NR_GPIOS 24 |
| 134 | #define TC35892_NR_IRQS TC35892_INT_GPIO(TC35892_NR_GPIOS) | 134 | #define TC3589x_NR_IRQS TC3589x_INT_GPIO(TC3589x_NR_GPIOS) |
| 135 | 135 | ||
| 136 | #endif | 136 | #endif |
