diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-08-15 21:08:48 -0400 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-08-16 11:48:47 -0400 |
| commit | 1ddc07d0f13a753f8e345e0538562e1899d2bc26 (patch) | |
| tree | 30e9a0799f19f189a8be03ae619d350c47edc685 /include/linux/mfd | |
| parent | 70ce6aee664a3e61ca5b4278d61db6da0996cade (diff) | |
ASoC: Add WM8958 noise gate support
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/wm8994/registers.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/include/linux/mfd/wm8994/registers.h b/include/linux/mfd/wm8994/registers.h index 64bf91e4dfa9..83ecdcd8aaf9 100644 --- a/include/linux/mfd/wm8994/registers.h +++ b/include/linux/mfd/wm8994/registers.h | |||
| @@ -134,6 +134,8 @@ | |||
| 134 | #define WM8994_AIF1_DAC1_FILTERS_2 0x421 | 134 | #define WM8994_AIF1_DAC1_FILTERS_2 0x421 |
| 135 | #define WM8994_AIF1_DAC2_FILTERS_1 0x422 | 135 | #define WM8994_AIF1_DAC2_FILTERS_1 0x422 |
| 136 | #define WM8994_AIF1_DAC2_FILTERS_2 0x423 | 136 | #define WM8994_AIF1_DAC2_FILTERS_2 0x423 |
| 137 | #define WM8958_AIF1_DAC1_NOISE_GATE 0x430 | ||
| 138 | #define WM8958_AIF1_DAC2_NOISE_GATE 0x431 | ||
| 137 | #define WM8994_AIF1_DRC1_1 0x440 | 139 | #define WM8994_AIF1_DRC1_1 0x440 |
| 138 | #define WM8994_AIF1_DRC1_2 0x441 | 140 | #define WM8994_AIF1_DRC1_2 0x441 |
| 139 | #define WM8994_AIF1_DRC1_3 0x442 | 141 | #define WM8994_AIF1_DRC1_3 0x442 |
| @@ -191,6 +193,7 @@ | |||
| 191 | #define WM8994_AIF2_ADC_FILTERS 0x510 | 193 | #define WM8994_AIF2_ADC_FILTERS 0x510 |
| 192 | #define WM8994_AIF2_DAC_FILTERS_1 0x520 | 194 | #define WM8994_AIF2_DAC_FILTERS_1 0x520 |
| 193 | #define WM8994_AIF2_DAC_FILTERS_2 0x521 | 195 | #define WM8994_AIF2_DAC_FILTERS_2 0x521 |
| 196 | #define WM8958_AIF2_DAC_NOISE_GATE 0x530 | ||
| 194 | #define WM8994_AIF2_DRC_1 0x540 | 197 | #define WM8994_AIF2_DRC_1 0x540 |
| 195 | #define WM8994_AIF2_DRC_2 0x541 | 198 | #define WM8994_AIF2_DRC_2 0x541 |
| 196 | #define WM8994_AIF2_DRC_3 0x542 | 199 | #define WM8994_AIF2_DRC_3 0x542 |
| @@ -2988,6 +2991,34 @@ | |||
| 2988 | #define WM8994_AIF1DAC2_3D_ENA_WIDTH 1 /* AIF1DAC2_3D_ENA */ | 2991 | #define WM8994_AIF1DAC2_3D_ENA_WIDTH 1 /* AIF1DAC2_3D_ENA */ |
| 2989 | 2992 | ||
| 2990 | /* | 2993 | /* |
| 2994 | * R1072 (0x430) - AIF1 DAC1 Noise Gate | ||
| 2995 | */ | ||
| 2996 | #define WM8958_AIF1DAC1_NG_HLD_MASK 0x0060 /* AIF1DAC1_NG_HLD - [6:5] */ | ||
| 2997 | #define WM8958_AIF1DAC1_NG_HLD_SHIFT 5 /* AIF1DAC1_NG_HLD - [6:5] */ | ||
| 2998 | #define WM8958_AIF1DAC1_NG_HLD_WIDTH 2 /* AIF1DAC1_NG_HLD - [6:5] */ | ||
| 2999 | #define WM8958_AIF1DAC1_NG_THR_MASK 0x000E /* AIF1DAC1_NG_THR - [3:1] */ | ||
| 3000 | #define WM8958_AIF1DAC1_NG_THR_SHIFT 1 /* AIF1DAC1_NG_THR - [3:1] */ | ||
| 3001 | #define WM8958_AIF1DAC1_NG_THR_WIDTH 3 /* AIF1DAC1_NG_THR - [3:1] */ | ||
| 3002 | #define WM8958_AIF1DAC1_NG_ENA 0x0001 /* AIF1DAC1_NG_ENA */ | ||
| 3003 | #define WM8958_AIF1DAC1_NG_ENA_MASK 0x0001 /* AIF1DAC1_NG_ENA */ | ||
| 3004 | #define WM8958_AIF1DAC1_NG_ENA_SHIFT 0 /* AIF1DAC1_NG_ENA */ | ||
| 3005 | #define WM8958_AIF1DAC1_NG_ENA_WIDTH 1 /* AIF1DAC1_NG_ENA */ | ||
| 3006 | |||
| 3007 | /* | ||
| 3008 | * R1073 (0x431) - AIF1 DAC2 Noise Gate | ||
| 3009 | */ | ||
| 3010 | #define WM8958_AIF1DAC2_NG_HLD_MASK 0x0060 /* AIF1DAC2_NG_HLD - [6:5] */ | ||
| 3011 | #define WM8958_AIF1DAC2_NG_HLD_SHIFT 5 /* AIF1DAC2_NG_HLD - [6:5] */ | ||
| 3012 | #define WM8958_AIF1DAC2_NG_HLD_WIDTH 2 /* AIF1DAC2_NG_HLD - [6:5] */ | ||
| 3013 | #define WM8958_AIF1DAC2_NG_THR_MASK 0x000E /* AIF1DAC2_NG_THR - [3:1] */ | ||
| 3014 | #define WM8958_AIF1DAC2_NG_THR_SHIFT 1 /* AIF1DAC2_NG_THR - [3:1] */ | ||
| 3015 | #define WM8958_AIF1DAC2_NG_THR_WIDTH 3 /* AIF1DAC2_NG_THR - [3:1] */ | ||
| 3016 | #define WM8958_AIF1DAC2_NG_ENA 0x0001 /* AIF1DAC2_NG_ENA */ | ||
| 3017 | #define WM8958_AIF1DAC2_NG_ENA_MASK 0x0001 /* AIF1DAC2_NG_ENA */ | ||
| 3018 | #define WM8958_AIF1DAC2_NG_ENA_SHIFT 0 /* AIF1DAC2_NG_ENA */ | ||
| 3019 | #define WM8958_AIF1DAC2_NG_ENA_WIDTH 1 /* AIF1DAC2_NG_ENA */ | ||
| 3020 | |||
| 3021 | /* | ||
| 2991 | * R1088 (0x440) - AIF1 DRC1 (1) | 3022 | * R1088 (0x440) - AIF1 DRC1 (1) |
| 2992 | */ | 3023 | */ |
| 2993 | #define WM8994_AIF1DRC1_SIG_DET_RMS_MASK 0xF800 /* AIF1DRC1_SIG_DET_RMS - [15:11] */ | 3024 | #define WM8994_AIF1DRC1_SIG_DET_RMS_MASK 0xF800 /* AIF1DRC1_SIG_DET_RMS - [15:11] */ |
| @@ -3599,6 +3630,20 @@ | |||
| 3599 | #define WM8994_AIF2DAC_3D_ENA_WIDTH 1 /* AIF2DAC_3D_ENA */ | 3630 | #define WM8994_AIF2DAC_3D_ENA_WIDTH 1 /* AIF2DAC_3D_ENA */ |
| 3600 | 3631 | ||
| 3601 | /* | 3632 | /* |
| 3633 | * R1328 (0x530) - AIF2 DAC Noise Gate | ||
| 3634 | */ | ||
| 3635 | #define WM8958_AIF2DAC_NG_HLD_MASK 0x0060 /* AIF2DAC_NG_HLD - [6:5] */ | ||
| 3636 | #define WM8958_AIF2DAC_NG_HLD_SHIFT 5 /* AIF2DAC_NG_HLD - [6:5] */ | ||
| 3637 | #define WM8958_AIF2DAC_NG_HLD_WIDTH 2 /* AIF2DAC_NG_HLD - [6:5] */ | ||
| 3638 | #define WM8958_AIF2DAC_NG_THR_MASK 0x000E /* AIF2DAC_NG_THR - [3:1] */ | ||
| 3639 | #define WM8958_AIF2DAC_NG_THR_SHIFT 1 /* AIF2DAC_NG_THR - [3:1] */ | ||
| 3640 | #define WM8958_AIF2DAC_NG_THR_WIDTH 3 /* AIF2DAC_NG_THR - [3:1] */ | ||
| 3641 | #define WM8958_AIF2DAC_NG_ENA 0x0001 /* AIF2DAC_NG_ENA */ | ||
| 3642 | #define WM8958_AIF2DAC_NG_ENA_MASK 0x0001 /* AIF2DAC_NG_ENA */ | ||
| 3643 | #define WM8958_AIF2DAC_NG_ENA_SHIFT 0 /* AIF2DAC_NG_ENA */ | ||
| 3644 | #define WM8958_AIF2DAC_NG_ENA_WIDTH 1 /* AIF2DAC_NG_ENA */ | ||
| 3645 | |||
| 3646 | /* | ||
| 3602 | * R1344 (0x540) - AIF2 DRC (1) | 3647 | * R1344 (0x540) - AIF2 DRC (1) |
| 3603 | */ | 3648 | */ |
| 3604 | #define WM8994_AIF2DRC_SIG_DET_RMS_MASK 0xF800 /* AIF2DRC_SIG_DET_RMS - [15:11] */ | 3649 | #define WM8994_AIF2DRC_SIG_DET_RMS_MASK 0xF800 /* AIF2DRC_SIG_DET_RMS - [15:11] */ |