pinctrl: palmas: add pincontrol driver

TI Palmas series Power Management IC have multiple pins which can be
configured for different functionality. This pins can be configured
for different function. Also their properties like pull up/down,
open drain enable/disable are configurable.

Add support for pincontrol driver Palmas series device like TPS65913,
TPS80036. The driver supports to be register from DT only.

Changes from V1:
- Add generic property for pins and functions in pinconf-generic.
- Add APIs to map the DT and subnode.
- Move common utils APIs to the pinctrl-utils from this file.
- Update the binding document accordingly.
Changes from V2:
- Add ack by Lee.
- Correct the binding docs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

1 files changed, 24 insertions, 11 deletions

diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index 1a8dd7afe084..2891f7cd902e 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -449,7 +449,7 @@ enum usb_irq_events {
 #define PALMAS_DVFS_BASE                                        0x180
 #define PALMAS_PMU_CONTROL_BASE                                 0x1A0
 #define PALMAS_RESOURCE_BASE                                    0x1D4
-#define PALMAS_PU_PD_OD_BASE                                    0x1F4
+#define PALMAS_PU_PD_OD_BASE                                    0x1F0
 #define PALMAS_LED_BASE                                         0x200
 #define PALMAS_INTERRUPT_BASE                                   0x210
 #define PALMAS_USB_OTG_BASE                                     0x250
@@ -1734,16 +1734,20 @@ enum usb_irq_events {
 #define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT                    0
 
 /* Registers for function PAD_CONTROL */
-#define PALMAS_PU_PD_INPUT_CTRL1                                0x0
-#define PALMAS_PU_PD_INPUT_CTRL2                                0x1
-#define PALMAS_PU_PD_INPUT_CTRL3                                0x2
-#define PALMAS_OD_OUTPUT_CTRL                                   0x4
-#define PALMAS_POLARITY_CTRL                                    0x5
-#define PALMAS_PRIMARY_SECONDARY_PAD1                           0x6
-#define PALMAS_PRIMARY_SECONDARY_PAD2                           0x7
-#define PALMAS_I2C_SPI                                          0x8
-#define PALMAS_PU_PD_INPUT_CTRL4                                0x9
-#define PALMAS_PRIMARY_SECONDARY_PAD3                           0xA
+#define PALMAS_OD_OUTPUT_CTRL2                                  0x2
+#define PALMAS_POLARITY_CTRL2                                   0x3
+#define PALMAS_PU_PD_INPUT_CTRL1                                0x4
+#define PALMAS_PU_PD_INPUT_CTRL2                                0x5
+#define PALMAS_PU_PD_INPUT_CTRL3                                0x6
+#define PALMAS_PU_PD_INPUT_CTRL5                                0x7
+#define PALMAS_OD_OUTPUT_CTRL                                   0x8
+#define PALMAS_POLARITY_CTRL                                    0x9
+#define PALMAS_PRIMARY_SECONDARY_PAD1                           0xA
+#define PALMAS_PRIMARY_SECONDARY_PAD2                           0xB
+#define PALMAS_I2C_SPI                                          0xC
+#define PALMAS_PU_PD_INPUT_CTRL4                                0xD
+#define PALMAS_PRIMARY_SECONDARY_PAD3                           0xE
+#define PALMAS_PRIMARY_SECONDARY_PAD4                           0xF
 
 /* Bit definitions for PU_PD_INPUT_CTRL1 */
 #define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD                    0x40
@@ -2501,6 +2505,15 @@ enum usb_irq_events {
 #define PALMAS_PU_PD_GPIO_CTRL1                                 0x6
 #define PALMAS_PU_PD_GPIO_CTRL2                                 0x7
 #define PALMAS_OD_OUTPUT_GPIO_CTRL                              0x8
+#define PALMAS_GPIO_DATA_IN2                                    0x9
+#define PALMAS_GPIO_DATA_DIR2                                   0x0A
+#define PALMAS_GPIO_DATA_OUT2                                   0x0B
+#define PALMAS_GPIO_DEBOUNCE_EN2                                0x0C
+#define PALMAS_GPIO_CLEAR_DATA_OUT2                             0x0D
+#define PALMAS_GPIO_SET_DATA_OUT2                               0x0E
+#define PALMAS_PU_PD_GPIO_CTRL3                                 0x0F
+#define PALMAS_PU_PD_GPIO_CTRL4                                 0x10
+#define PALMAS_OD_OUTPUT_GPIO_CTRL2                             0x11
 
 /* Bit definitions for GPIO_DATA_IN */
 #define PALMAS_GPIO_DATA_IN_GPIO_7_IN                           0x80