mfd: Add s2mps11 irq driver

This patch support irq handling driver for s2mps11.
As this patch use regmap_irq, s5m8767 and s5m8763 are modified with
regmap_irq.

Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

2 files changed, 44 insertions, 0 deletions

diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 323e200bc82c..b50c38f8bc48 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -48,6 +48,8 @@ struct sec_pmic_dev {
         int device_type;
         int irq_base;
         int irq;
+        struct regmap_irq_chip_data *irq_data;
+
         int ono;
         u8 irq_masks_cur[NUM_IRQ_REGS];
         u8 irq_masks_cache[NUM_IRQ_REGS];
diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index 7f7a6248f707..d43b4f9e7fb2 100644
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -13,6 +13,48 @@
 #ifndef __LINUX_MFD_SEC_IRQ_H
 #define __LINUX_MFD_SEC_IRQ_H
 
+enum s2mps11_irq {
+        S2MPS11_IRQ_PWRONF,
+        S2MPS11_IRQ_PWRONR,
+        S2MPS11_IRQ_JIGONBF,
+        S2MPS11_IRQ_JIGONBR,
+        S2MPS11_IRQ_ACOKBF,
+        S2MPS11_IRQ_ACOKBR,
+        S2MPS11_IRQ_PWRON1S,
+        S2MPS11_IRQ_MRB,
+
+        S2MPS11_IRQ_RTC60S,
+        S2MPS11_IRQ_RTCA1,
+        S2MPS11_IRQ_RTCA2,
+        S2MPS11_IRQ_SMPL,
+        S2MPS11_IRQ_RTC1S,
+        S2MPS11_IRQ_WTSR,
+
+        S2MPS11_IRQ_INT120C,
+        S2MPS11_IRQ_INT140C,
+
+        S2MPS11_IRQ_NR,
+};
+
+#define S2MPS11_IRQ_PWRONF_MASK         (1 << 0)
+#define S2MPS11_IRQ_PWRONR_MASK         (1 << 1)
+#define S2MPS11_IRQ_JIGONBF_MASK        (1 << 2)
+#define S2MPS11_IRQ_JIGONBR_MASK        (1 << 3)
+#define S2MPS11_IRQ_ACOKBF_MASK         (1 << 4)
+#define S2MPS11_IRQ_ACOKBR_MASK         (1 << 5)
+#define S2MPS11_IRQ_PWRON1S_MASK        (1 << 6)
+#define S2MPS11_IRQ_MRB_MASK            (1 << 7)
+
+#define S2MPS11_IRQ_RTC60S_MASK         (1 << 0)
+#define S2MPS11_IRQ_RTCA1_MASK          (1 << 1)
+#define S2MPS11_IRQ_RTCA2_MASK          (1 << 2)
+#define S2MPS11_IRQ_SMPL_MASK           (1 << 3)
+#define S2MPS11_IRQ_RTC1S_MASK          (1 << 4)
+#define S2MPS11_IRQ_WTSR_MASK           (1 << 5)
+
+#define S2MPS11_IRQ_INT120C_MASK        (1 << 0)
+#define S2MPS11_IRQ_INT140C_MASK        (1 << 1)
+
 enum s5m8767_irq {
         S5M8767_IRQ_PWRR,
         S5M8767_IRQ_PWRF,