diff options
author | Ben Hutchings <bhutchings@solarflare.com> | 2009-04-29 04:25:57 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-04-29 20:32:40 -0400 |
commit | 894b19a6b343ce3589237167a56e6df0fe72ef0d (patch) | |
tree | 0713a034ac095488151bcd94f3510c50d660cc11 /include/linux/mdio.h | |
parent | 0c09c1a49cc7b819b33566a49d9901f7cfdd6889 (diff) |
ethtool/mdio: Support backplane mode negotiation
Compile-tested only.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/mdio.h')
-rw-r--r-- | include/linux/mdio.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/mdio.h b/include/linux/mdio.h index 1bff2f2d0e19..26b4eb3bbee9 100644 --- a/include/linux/mdio.h +++ b/include/linux/mdio.h | |||
@@ -46,6 +46,7 @@ | |||
46 | 46 | ||
47 | /* Media-dependent registers. */ | 47 | /* Media-dependent registers. */ |
48 | #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ | 48 | #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ |
49 | #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */ | ||
49 | #define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */ | 50 | #define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */ |
50 | #define MDIO_PCS_10GBRT_STAT1 32 /* 10GBASE-R/-T PCS status 1 */ | 51 | #define MDIO_PCS_10GBRT_STAT1 32 /* 10GBASE-R/-T PCS status 1 */ |
51 | #define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */ | 52 | #define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */ |
@@ -187,6 +188,10 @@ | |||
187 | /* PMA 10GBASE-T TX power register. */ | 188 | /* PMA 10GBASE-T TX power register. */ |
188 | #define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 /* Short-reach mode */ | 189 | #define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 /* Short-reach mode */ |
189 | 190 | ||
191 | /* PMA 10GBASE-R FEC ability register. */ | ||
192 | #define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 /* FEC ability */ | ||
193 | #define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 /* FEC error indic. ability */ | ||
194 | |||
190 | /* PCS 10GBASE-R/-T status register 1. */ | 195 | /* PCS 10GBASE-R/-T status register 1. */ |
191 | #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 /* Block lock attained */ | 196 | #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 /* Block lock attained */ |
192 | 197 | ||