aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/irqchip
diff options
context:
space:
mode:
authorThomas Gleixner <tglx@linutronix.de>2014-06-19 17:34:38 -0400
committerJason Cooper <jason@lakedaemon.net>2014-06-24 08:37:18 -0400
commit078bc005651cfb134135c5f6eca48a997afb4014 (patch)
tree9d469ad042e02a5721ee6109abcf3a08420d00f3 /include/linux/irqchip
parenta26c06f96eff6cb1834320463b7945b7a4c516ad (diff)
irqchip: spear_shirq: Move private structs to source
No point in having them in a separate header file. Make the init functions static. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20140619212713.038658058@linutronix.de Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'include/linux/irqchip')
-rw-r--r--include/linux/irqchip/spear-shirq.h64
1 files changed, 0 insertions, 64 deletions
diff --git a/include/linux/irqchip/spear-shirq.h b/include/linux/irqchip/spear-shirq.h
deleted file mode 100644
index c8be16d213a3..000000000000
--- a/include/linux/irqchip/spear-shirq.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * SPEAr platform shared irq layer header file
3 *
4 * Copyright (C) 2009-2012 ST Microelectronics
5 * Viresh Kumar <viresh.linux@gmail.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#ifndef __SPEAR_SHIRQ_H
13#define __SPEAR_SHIRQ_H
14
15#include <linux/irq.h>
16#include <linux/types.h>
17
18/*
19 * struct shirq_regs: shared irq register configuration
20 *
21 * enb_reg: enable register offset
22 * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt
23 * status_reg: status register offset
24 * status_reg_mask: status register valid mask
25 * clear_reg: clear register offset
26 * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt
27 */
28struct shirq_regs {
29 u32 enb_reg;
30 u32 reset_to_enb;
31 u32 status_reg;
32 u32 clear_reg;
33 u32 reset_to_clear;
34};
35
36/*
37 * struct spear_shirq: shared irq structure
38 *
39 * irq: hardware irq number
40 * irq_base: base irq in linux domain
41 * irq_nr: no. of shared interrupts in a particular block
42 * irq_bit_off: starting bit offset in the status register
43 * invalid_irq: irq group is currently disabled
44 * base: base address of shared irq register
45 * regs: register configuration for shared irq block
46 */
47struct spear_shirq {
48 u32 irq;
49 u32 irq_base;
50 u32 irq_nr;
51 u32 irq_bit_off;
52 int invalid_irq;
53 void __iomem *base;
54 struct shirq_regs regs;
55};
56
57int __init spear300_shirq_of_init(struct device_node *np,
58 struct device_node *parent);
59int __init spear310_shirq_of_init(struct device_node *np,
60 struct device_node *parent);
61int __init spear320_shirq_of_init(struct device_node *np,
62 struct device_node *parent);
63
64#endif /* __SPEAR_SHIRQ_H */