diff options
| author | Philippe De Muyter <phdm@macqel.be> | 2012-10-12 11:52:45 -0400 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2013-01-03 09:41:20 -0500 |
| commit | 9a32299394d8cce79ca7d0098dc32c4f14032dcd (patch) | |
| tree | 24334ecc985c2234d1a988d6c85e8557f35ba21d /include/linux/fsl | |
| parent | d1c3ed669a2d452cacfb48c2d171a1f364dae2ed (diff) | |
powerpc, dma: move bestcomm driver from arch/powerpc/sysdev to drivers/dma
The bestcomm dma hardware, and some of its users like the FEC ethernet
component, is used in different FreeScale parts, including non-powerpc
parts like the ColdFire MCF547x & MCF548x families. Don't keep the
driver hidden in arch/powerpc where it is inaccessible for other arches.
.c files are moved to drivers/dma/bestcomm, while .h files are moved to
include/linux/fsl/bestcomm. Makefiles, Kconfigs and #include directives
are updated for the new file locations.
Tested by recompiling for MPC5200 with all bestcomm users enabled.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'include/linux/fsl')
| -rw-r--r-- | include/linux/fsl/bestcomm/ata.h | 30 | ||||
| -rw-r--r-- | include/linux/fsl/bestcomm/bestcomm.h | 213 | ||||
| -rw-r--r-- | include/linux/fsl/bestcomm/bestcomm_priv.h | 350 | ||||
| -rw-r--r-- | include/linux/fsl/bestcomm/fec.h | 61 | ||||
| -rw-r--r-- | include/linux/fsl/bestcomm/gen_bd.h | 53 | ||||
| -rw-r--r-- | include/linux/fsl/bestcomm/sram.h | 54 |
6 files changed, 761 insertions, 0 deletions
diff --git a/include/linux/fsl/bestcomm/ata.h b/include/linux/fsl/bestcomm/ata.h new file mode 100644 index 000000000000..0b2371811334 --- /dev/null +++ b/include/linux/fsl/bestcomm/ata.h | |||
| @@ -0,0 +1,30 @@ | |||
| 1 | /* | ||
| 2 | * Header for Bestcomm ATA task driver | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Copyright (C) 2006 Freescale - John Rigby | ||
| 6 | * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com> | ||
| 7 | * | ||
| 8 | * This file is licensed under the terms of the GNU General Public License | ||
| 9 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 10 | * kind, whether express or implied. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __BESTCOMM_ATA_H__ | ||
| 14 | #define __BESTCOMM_ATA_H__ | ||
| 15 | |||
| 16 | |||
| 17 | struct bcom_ata_bd { | ||
| 18 | u32 status; | ||
| 19 | u32 src_pa; | ||
| 20 | u32 dst_pa; | ||
| 21 | }; | ||
| 22 | |||
| 23 | extern struct bcom_task * bcom_ata_init(int queue_len, int maxbufsize); | ||
| 24 | extern void bcom_ata_rx_prepare(struct bcom_task *tsk); | ||
| 25 | extern void bcom_ata_tx_prepare(struct bcom_task *tsk); | ||
| 26 | extern void bcom_ata_reset_bd(struct bcom_task *tsk); | ||
| 27 | extern void bcom_ata_release(struct bcom_task *tsk); | ||
| 28 | |||
| 29 | #endif /* __BESTCOMM_ATA_H__ */ | ||
| 30 | |||
diff --git a/include/linux/fsl/bestcomm/bestcomm.h b/include/linux/fsl/bestcomm/bestcomm.h new file mode 100644 index 000000000000..a0e2e6b19b57 --- /dev/null +++ b/include/linux/fsl/bestcomm/bestcomm.h | |||
| @@ -0,0 +1,213 @@ | |||
| 1 | /* | ||
| 2 | * Public header for the MPC52xx processor BestComm driver | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com> | ||
| 6 | * Copyright (C) 2005 Varma Electronics Oy, | ||
| 7 | * ( by Andrey Volkov <avolkov@varma-el.com> ) | ||
| 8 | * Copyright (C) 2003-2004 MontaVista, Software, Inc. | ||
| 9 | * ( by Dale Farnsworth <dfarnsworth@mvista.com> ) | ||
| 10 | * | ||
| 11 | * This file is licensed under the terms of the GNU General Public License | ||
| 12 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 13 | * kind, whether express or implied. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef __BESTCOMM_H__ | ||
| 17 | #define __BESTCOMM_H__ | ||
| 18 | |||
| 19 | /** | ||
| 20 | * struct bcom_bd - Structure describing a generic BestComm buffer descriptor | ||
| 21 | * @status: The current status of this buffer. Exact meaning depends on the | ||
| 22 | * task type | ||
| 23 | * @data: An array of u32 extra data. Size of array is task dependent. | ||
| 24 | * | ||
| 25 | * Note: Don't dereference a bcom_bd pointer as an array. The size of the | ||
| 26 | * bcom_bd is variable. Use bcom_get_bd() instead. | ||
| 27 | */ | ||
| 28 | struct bcom_bd { | ||
| 29 | u32 status; | ||
| 30 | u32 data[0]; /* variable payload size */ | ||
| 31 | }; | ||
| 32 | |||
| 33 | /* ======================================================================== */ | ||
| 34 | /* Generic task management */ | ||
| 35 | /* ======================================================================== */ | ||
| 36 | |||
| 37 | /** | ||
| 38 | * struct bcom_task - Structure describing a loaded BestComm task | ||
| 39 | * | ||
| 40 | * This structure is never built by the driver it self. It's built and | ||
| 41 | * filled the intermediate layer of the BestComm API, the task dependent | ||
| 42 | * support code. | ||
| 43 | * | ||
| 44 | * Most likely you don't need to poke around inside this structure. The | ||
| 45 | * fields are exposed in the header just for the sake of inline functions | ||
| 46 | */ | ||
| 47 | struct bcom_task { | ||
| 48 | unsigned int tasknum; | ||
| 49 | unsigned int flags; | ||
| 50 | int irq; | ||
| 51 | |||
| 52 | struct bcom_bd *bd; | ||
| 53 | phys_addr_t bd_pa; | ||
| 54 | void **cookie; | ||
| 55 | unsigned short index; | ||
| 56 | unsigned short outdex; | ||
| 57 | unsigned int num_bd; | ||
| 58 | unsigned int bd_size; | ||
| 59 | |||
| 60 | void* priv; | ||
| 61 | }; | ||
| 62 | |||
| 63 | #define BCOM_FLAGS_NONE 0x00000000ul | ||
| 64 | #define BCOM_FLAGS_ENABLE_TASK (1ul << 0) | ||
| 65 | |||
| 66 | /** | ||
| 67 | * bcom_enable - Enable a BestComm task | ||
| 68 | * @tsk: The BestComm task structure | ||
| 69 | * | ||
| 70 | * This function makes sure the given task is enabled and can be run | ||
| 71 | * by the BestComm engine as needed | ||
| 72 | */ | ||
| 73 | extern void bcom_enable(struct bcom_task *tsk); | ||
| 74 | |||
| 75 | /** | ||
| 76 | * bcom_disable - Disable a BestComm task | ||
| 77 | * @tsk: The BestComm task structure | ||
| 78 | * | ||
| 79 | * This function disable a given task, making sure it's not executed | ||
| 80 | * by the BestComm engine. | ||
| 81 | */ | ||
| 82 | extern void bcom_disable(struct bcom_task *tsk); | ||
| 83 | |||
| 84 | |||
| 85 | /** | ||
| 86 | * bcom_get_task_irq - Returns the irq number of a BestComm task | ||
| 87 | * @tsk: The BestComm task structure | ||
| 88 | */ | ||
| 89 | static inline int | ||
| 90 | bcom_get_task_irq(struct bcom_task *tsk) { | ||
| 91 | return tsk->irq; | ||
| 92 | } | ||
| 93 | |||
| 94 | /* ======================================================================== */ | ||
| 95 | /* BD based tasks helpers */ | ||
| 96 | /* ======================================================================== */ | ||
| 97 | |||
| 98 | #define BCOM_BD_READY 0x40000000ul | ||
| 99 | |||
| 100 | /** _bcom_next_index - Get next input index. | ||
| 101 | * @tsk: pointer to task structure | ||
| 102 | * | ||
| 103 | * Support function; Device drivers should not call this | ||
| 104 | */ | ||
| 105 | static inline int | ||
| 106 | _bcom_next_index(struct bcom_task *tsk) | ||
| 107 | { | ||
| 108 | return ((tsk->index + 1) == tsk->num_bd) ? 0 : tsk->index + 1; | ||
| 109 | } | ||
| 110 | |||
| 111 | /** _bcom_next_outdex - Get next output index. | ||
| 112 | * @tsk: pointer to task structure | ||
| 113 | * | ||
| 114 | * Support function; Device drivers should not call this | ||
| 115 | */ | ||
| 116 | static inline int | ||
| 117 | _bcom_next_outdex(struct bcom_task *tsk) | ||
| 118 | { | ||
| 119 | return ((tsk->outdex + 1) == tsk->num_bd) ? 0 : tsk->outdex + 1; | ||
| 120 | } | ||
| 121 | |||
| 122 | /** | ||
| 123 | * bcom_queue_empty - Checks if a BestComm task BD queue is empty | ||
| 124 | * @tsk: The BestComm task structure | ||
| 125 | */ | ||
| 126 | static inline int | ||
| 127 | bcom_queue_empty(struct bcom_task *tsk) | ||
| 128 | { | ||
| 129 | return tsk->index == tsk->outdex; | ||
| 130 | } | ||
| 131 | |||
| 132 | /** | ||
| 133 | * bcom_queue_full - Checks if a BestComm task BD queue is full | ||
| 134 | * @tsk: The BestComm task structure | ||
| 135 | */ | ||
| 136 | static inline int | ||
| 137 | bcom_queue_full(struct bcom_task *tsk) | ||
| 138 | { | ||
| 139 | return tsk->outdex == _bcom_next_index(tsk); | ||
| 140 | } | ||
| 141 | |||
| 142 | /** | ||
| 143 | * bcom_get_bd - Get a BD from the queue | ||
| 144 | * @tsk: The BestComm task structure | ||
| 145 | * index: Index of the BD to fetch | ||
| 146 | */ | ||
| 147 | static inline struct bcom_bd | ||
| 148 | *bcom_get_bd(struct bcom_task *tsk, unsigned int index) | ||
| 149 | { | ||
| 150 | /* A cast to (void*) so the address can be incremented by the | ||
| 151 | * real size instead of by sizeof(struct bcom_bd) */ | ||
| 152 | return ((void *)tsk->bd) + (index * tsk->bd_size); | ||
| 153 | } | ||
| 154 | |||
| 155 | /** | ||
| 156 | * bcom_buffer_done - Checks if a BestComm | ||
| 157 | * @tsk: The BestComm task structure | ||
| 158 | */ | ||
| 159 | static inline int | ||
| 160 | bcom_buffer_done(struct bcom_task *tsk) | ||
| 161 | { | ||
| 162 | struct bcom_bd *bd; | ||
| 163 | if (bcom_queue_empty(tsk)) | ||
| 164 | return 0; | ||
| 165 | |||
| 166 | bd = bcom_get_bd(tsk, tsk->outdex); | ||
| 167 | return !(bd->status & BCOM_BD_READY); | ||
| 168 | } | ||
| 169 | |||
| 170 | /** | ||
| 171 | * bcom_prepare_next_buffer - clear status of next available buffer. | ||
| 172 | * @tsk: The BestComm task structure | ||
| 173 | * | ||
| 174 | * Returns pointer to next buffer descriptor | ||
| 175 | */ | ||
| 176 | static inline struct bcom_bd * | ||
| 177 | bcom_prepare_next_buffer(struct bcom_task *tsk) | ||
| 178 | { | ||
| 179 | struct bcom_bd *bd; | ||
| 180 | |||
| 181 | bd = bcom_get_bd(tsk, tsk->index); | ||
| 182 | bd->status = 0; /* cleanup last status */ | ||
| 183 | return bd; | ||
| 184 | } | ||
| 185 | |||
| 186 | static inline void | ||
| 187 | bcom_submit_next_buffer(struct bcom_task *tsk, void *cookie) | ||
| 188 | { | ||
| 189 | struct bcom_bd *bd = bcom_get_bd(tsk, tsk->index); | ||
| 190 | |||
| 191 | tsk->cookie[tsk->index] = cookie; | ||
| 192 | mb(); /* ensure the bd is really up-to-date */ | ||
| 193 | bd->status |= BCOM_BD_READY; | ||
| 194 | tsk->index = _bcom_next_index(tsk); | ||
| 195 | if (tsk->flags & BCOM_FLAGS_ENABLE_TASK) | ||
| 196 | bcom_enable(tsk); | ||
| 197 | } | ||
| 198 | |||
| 199 | static inline void * | ||
| 200 | bcom_retrieve_buffer(struct bcom_task *tsk, u32 *p_status, struct bcom_bd **p_bd) | ||
| 201 | { | ||
| 202 | void *cookie = tsk->cookie[tsk->outdex]; | ||
| 203 | struct bcom_bd *bd = bcom_get_bd(tsk, tsk->outdex); | ||
| 204 | |||
| 205 | if (p_status) | ||
| 206 | *p_status = bd->status; | ||
| 207 | if (p_bd) | ||
| 208 | *p_bd = bd; | ||
| 209 | tsk->outdex = _bcom_next_outdex(tsk); | ||
| 210 | return cookie; | ||
| 211 | } | ||
| 212 | |||
| 213 | #endif /* __BESTCOMM_H__ */ | ||
diff --git a/include/linux/fsl/bestcomm/bestcomm_priv.h b/include/linux/fsl/bestcomm/bestcomm_priv.h new file mode 100644 index 000000000000..3b52f3ffbdf8 --- /dev/null +++ b/include/linux/fsl/bestcomm/bestcomm_priv.h | |||
| @@ -0,0 +1,350 @@ | |||
| 1 | /* | ||
| 2 | * Private header for the MPC52xx processor BestComm driver | ||
| 3 | * | ||
| 4 | * By private, we mean that driver should not use it directly. It's meant | ||
| 5 | * to be used by the BestComm engine driver itself and by the intermediate | ||
| 6 | * layer between the core and the drivers. | ||
| 7 | * | ||
| 8 | * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com> | ||
| 9 | * Copyright (C) 2005 Varma Electronics Oy, | ||
| 10 | * ( by Andrey Volkov <avolkov@varma-el.com> ) | ||
| 11 | * Copyright (C) 2003-2004 MontaVista, Software, Inc. | ||
| 12 | * ( by Dale Farnsworth <dfarnsworth@mvista.com> ) | ||
| 13 | * | ||
| 14 | * This file is licensed under the terms of the GNU General Public License | ||
| 15 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 16 | * kind, whether express or implied. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef __BESTCOMM_PRIV_H__ | ||
| 20 | #define __BESTCOMM_PRIV_H__ | ||
| 21 | |||
| 22 | #include <linux/spinlock.h> | ||
| 23 | #include <linux/of.h> | ||
| 24 | #include <asm/io.h> | ||
| 25 | #include <asm/mpc52xx.h> | ||
| 26 | |||
| 27 | #include "sram.h" | ||
| 28 | |||
| 29 | |||
| 30 | /* ======================================================================== */ | ||
| 31 | /* Engine related stuff */ | ||
| 32 | /* ======================================================================== */ | ||
| 33 | |||
| 34 | /* Zones sizes and needed alignments */ | ||
| 35 | #define BCOM_MAX_TASKS 16 | ||
| 36 | #define BCOM_MAX_VAR 24 | ||
| 37 | #define BCOM_MAX_INC 8 | ||
| 38 | #define BCOM_MAX_FDT 64 | ||
| 39 | #define BCOM_MAX_CTX 20 | ||
| 40 | #define BCOM_CTX_SIZE (BCOM_MAX_CTX * sizeof(u32)) | ||
| 41 | #define BCOM_CTX_ALIGN 0x100 | ||
| 42 | #define BCOM_VAR_SIZE (BCOM_MAX_VAR * sizeof(u32)) | ||
| 43 | #define BCOM_INC_SIZE (BCOM_MAX_INC * sizeof(u32)) | ||
| 44 | #define BCOM_VAR_ALIGN 0x80 | ||
| 45 | #define BCOM_FDT_SIZE (BCOM_MAX_FDT * sizeof(u32)) | ||
| 46 | #define BCOM_FDT_ALIGN 0x100 | ||
| 47 | |||
| 48 | /** | ||
| 49 | * struct bcom_tdt - Task Descriptor Table Entry | ||
| 50 | * | ||
| 51 | */ | ||
| 52 | struct bcom_tdt { | ||
| 53 | u32 start; | ||
| 54 | u32 stop; | ||
| 55 | u32 var; | ||
| 56 | u32 fdt; | ||
| 57 | u32 exec_status; /* used internally by BestComm engine */ | ||
| 58 | u32 mvtp; /* used internally by BestComm engine */ | ||
| 59 | u32 context; | ||
| 60 | u32 litbase; | ||
| 61 | }; | ||
| 62 | |||
| 63 | /** | ||
| 64 | * struct bcom_engine | ||
| 65 | * | ||
| 66 | * This holds all info needed globaly to handle the engine | ||
| 67 | */ | ||
| 68 | struct bcom_engine { | ||
| 69 | struct device_node *ofnode; | ||
| 70 | struct mpc52xx_sdma __iomem *regs; | ||
| 71 | phys_addr_t regs_base; | ||
| 72 | |||
| 73 | struct bcom_tdt *tdt; | ||
| 74 | u32 *ctx; | ||
| 75 | u32 *var; | ||
| 76 | u32 *fdt; | ||
| 77 | |||
| 78 | spinlock_t lock; | ||
| 79 | }; | ||
| 80 | |||
| 81 | extern struct bcom_engine *bcom_eng; | ||
| 82 | |||
| 83 | |||
| 84 | /* ======================================================================== */ | ||
| 85 | /* Tasks related stuff */ | ||
| 86 | /* ======================================================================== */ | ||
| 87 | |||
| 88 | /* Tasks image header */ | ||
| 89 | #define BCOM_TASK_MAGIC 0x4243544B /* 'BCTK' */ | ||
| 90 | |||
| 91 | struct bcom_task_header { | ||
| 92 | u32 magic; | ||
| 93 | u8 desc_size; /* the size fields */ | ||
| 94 | u8 var_size; /* are given in number */ | ||
| 95 | u8 inc_size; /* of 32-bits words */ | ||
| 96 | u8 first_var; | ||
| 97 | u8 reserved[8]; | ||
| 98 | }; | ||
| 99 | |||
| 100 | /* Descriptors structure & co */ | ||
| 101 | #define BCOM_DESC_NOP 0x000001f8 | ||
| 102 | #define BCOM_LCD_MASK 0x80000000 | ||
| 103 | #define BCOM_DRD_EXTENDED 0x40000000 | ||
| 104 | #define BCOM_DRD_INITIATOR_SHIFT 21 | ||
| 105 | |||
| 106 | /* Tasks pragma */ | ||
| 107 | #define BCOM_PRAGMA_BIT_RSV 7 /* reserved pragma bit */ | ||
| 108 | #define BCOM_PRAGMA_BIT_PRECISE_INC 6 /* increment 0=when possible, */ | ||
| 109 | /* 1=iter end */ | ||
| 110 | #define BCOM_PRAGMA_BIT_RST_ERROR_NO 5 /* don't reset errors on */ | ||
| 111 | /* task enable */ | ||
| 112 | #define BCOM_PRAGMA_BIT_PACK 4 /* pack data enable */ | ||
| 113 | #define BCOM_PRAGMA_BIT_INTEGER 3 /* data alignment */ | ||
| 114 | /* 0=frac(msb), 1=int(lsb) */ | ||
| 115 | #define BCOM_PRAGMA_BIT_SPECREAD 2 /* XLB speculative read */ | ||
| 116 | #define BCOM_PRAGMA_BIT_CW 1 /* write line buffer enable */ | ||
| 117 | #define BCOM_PRAGMA_BIT_RL 0 /* read line buffer enable */ | ||
| 118 | |||
| 119 | /* Looks like XLB speculative read generates XLB errors when a buffer | ||
| 120 | * is at the end of the physical memory. i.e. when accessing the | ||
| 121 | * lasts words, the engine tries to prefetch the next but there is no | ||
| 122 | * next ... | ||
| 123 | */ | ||
| 124 | #define BCOM_STD_PRAGMA ((0 << BCOM_PRAGMA_BIT_RSV) | \ | ||
| 125 | (0 << BCOM_PRAGMA_BIT_PRECISE_INC) | \ | ||
| 126 | (0 << BCOM_PRAGMA_BIT_RST_ERROR_NO) | \ | ||
| 127 | (0 << BCOM_PRAGMA_BIT_PACK) | \ | ||
| 128 | (0 << BCOM_PRAGMA_BIT_INTEGER) | \ | ||
| 129 | (0 << BCOM_PRAGMA_BIT_SPECREAD) | \ | ||
| 130 | (1 << BCOM_PRAGMA_BIT_CW) | \ | ||
| 131 | (1 << BCOM_PRAGMA_BIT_RL)) | ||
| 132 | |||
| 133 | #define BCOM_PCI_PRAGMA ((0 << BCOM_PRAGMA_BIT_RSV) | \ | ||
| 134 | (0 << BCOM_PRAGMA_BIT_PRECISE_INC) | \ | ||
| 135 | (0 << BCOM_PRAGMA_BIT_RST_ERROR_NO) | \ | ||
| 136 | (0 << BCOM_PRAGMA_BIT_PACK) | \ | ||
| 137 | (1 << BCOM_PRAGMA_BIT_INTEGER) | \ | ||
| 138 | (0 << BCOM_PRAGMA_BIT_SPECREAD) | \ | ||
| 139 | (1 << BCOM_PRAGMA_BIT_CW) | \ | ||
| 140 | (1 << BCOM_PRAGMA_BIT_RL)) | ||
| 141 | |||
| 142 | #define BCOM_ATA_PRAGMA BCOM_STD_PRAGMA | ||
| 143 | #define BCOM_CRC16_DP_0_PRAGMA BCOM_STD_PRAGMA | ||
| 144 | #define BCOM_CRC16_DP_1_PRAGMA BCOM_STD_PRAGMA | ||
| 145 | #define BCOM_FEC_RX_BD_PRAGMA BCOM_STD_PRAGMA | ||
| 146 | #define BCOM_FEC_TX_BD_PRAGMA BCOM_STD_PRAGMA | ||
| 147 | #define BCOM_GEN_DP_0_PRAGMA BCOM_STD_PRAGMA | ||
| 148 | #define BCOM_GEN_DP_1_PRAGMA BCOM_STD_PRAGMA | ||
| 149 | #define BCOM_GEN_DP_2_PRAGMA BCOM_STD_PRAGMA | ||
| 150 | #define BCOM_GEN_DP_3_PRAGMA BCOM_STD_PRAGMA | ||
| 151 | #define BCOM_GEN_DP_BD_0_PRAGMA BCOM_STD_PRAGMA | ||
| 152 | #define BCOM_GEN_DP_BD_1_PRAGMA BCOM_STD_PRAGMA | ||
| 153 | #define BCOM_GEN_RX_BD_PRAGMA BCOM_STD_PRAGMA | ||
| 154 | #define BCOM_GEN_TX_BD_PRAGMA BCOM_STD_PRAGMA | ||
| 155 | #define BCOM_GEN_LPC_PRAGMA BCOM_STD_PRAGMA | ||
| 156 | #define BCOM_PCI_RX_PRAGMA BCOM_PCI_PRAGMA | ||
| 157 | #define BCOM_PCI_TX_PRAGMA BCOM_PCI_PRAGMA | ||
| 158 | |||
| 159 | /* Initiators number */ | ||
| 160 | #define BCOM_INITIATOR_ALWAYS 0 | ||
| 161 | #define BCOM_INITIATOR_SCTMR_0 1 | ||
| 162 | #define BCOM_INITIATOR_SCTMR_1 2 | ||
| 163 | #define BCOM_INITIATOR_FEC_RX 3 | ||
| 164 | #define BCOM_INITIATOR_FEC_TX 4 | ||
| 165 | #define BCOM_INITIATOR_ATA_RX 5 | ||
| 166 | #define BCOM_INITIATOR_ATA_TX 6 | ||
| 167 | #define BCOM_INITIATOR_SCPCI_RX 7 | ||
| 168 | #define BCOM_INITIATOR_SCPCI_TX 8 | ||
| 169 | #define BCOM_INITIATOR_PSC3_RX 9 | ||
| 170 | #define BCOM_INITIATOR_PSC3_TX 10 | ||
| 171 | #define BCOM_INITIATOR_PSC2_RX 11 | ||
| 172 | #define BCOM_INITIATOR_PSC2_TX 12 | ||
| 173 | #define BCOM_INITIATOR_PSC1_RX 13 | ||
| 174 | #define BCOM_INITIATOR_PSC1_TX 14 | ||
| 175 | #define BCOM_INITIATOR_SCTMR_2 15 | ||
| 176 | #define BCOM_INITIATOR_SCLPC 16 | ||
| 177 | #define BCOM_INITIATOR_PSC5_RX 17 | ||
| 178 | #define BCOM_INITIATOR_PSC5_TX 18 | ||
| 179 | #define BCOM_INITIATOR_PSC4_RX 19 | ||
| 180 | #define BCOM_INITIATOR_PSC4_TX 20 | ||
| 181 | #define BCOM_INITIATOR_I2C2_RX 21 | ||
| 182 | #define BCOM_INITIATOR_I2C2_TX 22 | ||
| 183 | #define BCOM_INITIATOR_I2C1_RX 23 | ||
| 184 | #define BCOM_INITIATOR_I2C1_TX 24 | ||
| 185 | #define BCOM_INITIATOR_PSC6_RX 25 | ||
| 186 | #define BCOM_INITIATOR_PSC6_TX 26 | ||
| 187 | #define BCOM_INITIATOR_IRDA_RX 25 | ||
| 188 | #define BCOM_INITIATOR_IRDA_TX 26 | ||
| 189 | #define BCOM_INITIATOR_SCTMR_3 27 | ||
| 190 | #define BCOM_INITIATOR_SCTMR_4 28 | ||
| 191 | #define BCOM_INITIATOR_SCTMR_5 29 | ||
| 192 | #define BCOM_INITIATOR_SCTMR_6 30 | ||
| 193 | #define BCOM_INITIATOR_SCTMR_7 31 | ||
| 194 | |||
| 195 | /* Initiators priorities */ | ||
| 196 | #define BCOM_IPR_ALWAYS 7 | ||
| 197 | #define BCOM_IPR_SCTMR_0 2 | ||
| 198 | #define BCOM_IPR_SCTMR_1 2 | ||
| 199 | #define BCOM_IPR_FEC_RX 6 | ||
| 200 | #define BCOM_IPR_FEC_TX 5 | ||
| 201 | #define BCOM_IPR_ATA_RX 7 | ||
| 202 | #define BCOM_IPR_ATA_TX 7 | ||
| 203 | #define BCOM_IPR_SCPCI_RX 2 | ||
| 204 | #define BCOM_IPR_SCPCI_TX 2 | ||
| 205 | #define BCOM_IPR_PSC3_RX 2 | ||
| 206 | #define BCOM_IPR_PSC3_TX 2 | ||
| 207 | #define BCOM_IPR_PSC2_RX 2 | ||
| 208 | #define BCOM_IPR_PSC2_TX 2 | ||
| 209 | #define BCOM_IPR_PSC1_RX 2 | ||
| 210 | #define BCOM_IPR_PSC1_TX 2 | ||
| 211 | #define BCOM_IPR_SCTMR_2 2 | ||
| 212 | #define BCOM_IPR_SCLPC 2 | ||
| 213 | #define BCOM_IPR_PSC5_RX 2 | ||
| 214 | #define BCOM_IPR_PSC5_TX 2 | ||
| 215 | #define BCOM_IPR_PSC4_RX 2 | ||
| 216 | #define BCOM_IPR_PSC4_TX 2 | ||
| 217 | #define BCOM_IPR_I2C2_RX 2 | ||
| 218 | #define BCOM_IPR_I2C2_TX 2 | ||
| 219 | #define BCOM_IPR_I2C1_RX 2 | ||
| 220 | #define BCOM_IPR_I2C1_TX 2 | ||
| 221 | #define BCOM_IPR_PSC6_RX 2 | ||
| 222 | #define BCOM_IPR_PSC6_TX 2 | ||
| 223 | #define BCOM_IPR_IRDA_RX 2 | ||
| 224 | #define BCOM_IPR_IRDA_TX 2 | ||
| 225 | #define BCOM_IPR_SCTMR_3 2 | ||
| 226 | #define BCOM_IPR_SCTMR_4 2 | ||
| 227 | #define BCOM_IPR_SCTMR_5 2 | ||
| 228 | #define BCOM_IPR_SCTMR_6 2 | ||
| 229 | #define BCOM_IPR_SCTMR_7 2 | ||
| 230 | |||
| 231 | |||
| 232 | /* ======================================================================== */ | ||
| 233 | /* API */ | ||
| 234 | /* ======================================================================== */ | ||
| 235 | |||
| 236 | extern struct bcom_task *bcom_task_alloc(int bd_count, int bd_size, int priv_size); | ||
| 237 | extern void bcom_task_free(struct bcom_task *tsk); | ||
| 238 | extern int bcom_load_image(int task, u32 *task_image); | ||
| 239 | extern void bcom_set_initiator(int task, int initiator); | ||
| 240 | |||
| 241 | |||
| 242 | #define TASK_ENABLE 0x8000 | ||
| 243 | |||
| 244 | /** | ||
| 245 | * bcom_disable_prefetch - Hook to disable bus prefetching | ||
| 246 | * | ||
| 247 | * ATA DMA and the original MPC5200 need this due to silicon bugs. At the | ||
| 248 | * moment disabling prefetch is a one-way street. There is no mechanism | ||
| 249 | * in place to turn prefetch back on after it has been disabled. There is | ||
| 250 | * no reason it couldn't be done, it would just be more complex to implement. | ||
| 251 | */ | ||
| 252 | static inline void bcom_disable_prefetch(void) | ||
| 253 | { | ||
| 254 | u16 regval; | ||
| 255 | |||
| 256 | regval = in_be16(&bcom_eng->regs->PtdCntrl); | ||
| 257 | out_be16(&bcom_eng->regs->PtdCntrl, regval | 1); | ||
| 258 | }; | ||
| 259 | |||
| 260 | static inline void | ||
| 261 | bcom_enable_task(int task) | ||
| 262 | { | ||
| 263 | u16 reg; | ||
| 264 | reg = in_be16(&bcom_eng->regs->tcr[task]); | ||
| 265 | out_be16(&bcom_eng->regs->tcr[task], reg | TASK_ENABLE); | ||
| 266 | } | ||
| 267 | |||
| 268 | static inline void | ||
| 269 | bcom_disable_task(int task) | ||
| 270 | { | ||
| 271 | u16 reg = in_be16(&bcom_eng->regs->tcr[task]); | ||
| 272 | out_be16(&bcom_eng->regs->tcr[task], reg & ~TASK_ENABLE); | ||
| 273 | } | ||
| 274 | |||
| 275 | |||
| 276 | static inline u32 * | ||
| 277 | bcom_task_desc(int task) | ||
| 278 | { | ||
| 279 | return bcom_sram_pa2va(bcom_eng->tdt[task].start); | ||
| 280 | } | ||
| 281 | |||
| 282 | static inline int | ||
| 283 | bcom_task_num_descs(int task) | ||
| 284 | { | ||
| 285 | return (bcom_eng->tdt[task].stop - bcom_eng->tdt[task].start)/sizeof(u32) + 1; | ||
| 286 | } | ||
| 287 | |||
| 288 | static inline u32 * | ||
| 289 | bcom_task_var(int task) | ||
| 290 | { | ||
| 291 | return bcom_sram_pa2va(bcom_eng->tdt[task].var); | ||
| 292 | } | ||
| 293 | |||
| 294 | static inline u32 * | ||
| 295 | bcom_task_inc(int task) | ||
| 296 | { | ||
| 297 | return &bcom_task_var(task)[BCOM_MAX_VAR]; | ||
| 298 | } | ||
| 299 | |||
| 300 | |||
| 301 | static inline int | ||
| 302 | bcom_drd_is_extended(u32 desc) | ||
| 303 | { | ||
| 304 | return (desc) & BCOM_DRD_EXTENDED; | ||
| 305 | } | ||
| 306 | |||
| 307 | static inline int | ||
| 308 | bcom_desc_is_drd(u32 desc) | ||
| 309 | { | ||
| 310 | return !(desc & BCOM_LCD_MASK) && desc != BCOM_DESC_NOP; | ||
| 311 | } | ||
| 312 | |||
| 313 | static inline int | ||
| 314 | bcom_desc_initiator(u32 desc) | ||
| 315 | { | ||
| 316 | return (desc >> BCOM_DRD_INITIATOR_SHIFT) & 0x1f; | ||
| 317 | } | ||
| 318 | |||
| 319 | static inline void | ||
| 320 | bcom_set_desc_initiator(u32 *desc, int initiator) | ||
| 321 | { | ||
| 322 | *desc = (*desc & ~(0x1f << BCOM_DRD_INITIATOR_SHIFT)) | | ||
| 323 | ((initiator & 0x1f) << BCOM_DRD_INITIATOR_SHIFT); | ||
| 324 | } | ||
| 325 | |||
| 326 | |||
| 327 | static inline void | ||
| 328 | bcom_set_task_pragma(int task, int pragma) | ||
| 329 | { | ||
| 330 | u32 *fdt = &bcom_eng->tdt[task].fdt; | ||
| 331 | *fdt = (*fdt & ~0xff) | pragma; | ||
| 332 | } | ||
| 333 | |||
| 334 | static inline void | ||
| 335 | bcom_set_task_auto_start(int task, int next_task) | ||
| 336 | { | ||
| 337 | u16 __iomem *tcr = &bcom_eng->regs->tcr[task]; | ||
| 338 | out_be16(tcr, (in_be16(tcr) & ~0xff) | 0x00c0 | next_task); | ||
| 339 | } | ||
| 340 | |||
| 341 | static inline void | ||
| 342 | bcom_set_tcr_initiator(int task, int initiator) | ||
| 343 | { | ||
| 344 | u16 __iomem *tcr = &bcom_eng->regs->tcr[task]; | ||
| 345 | out_be16(tcr, (in_be16(tcr) & ~0x1f00) | ((initiator & 0x1f) << 8)); | ||
| 346 | } | ||
| 347 | |||
| 348 | |||
| 349 | #endif /* __BESTCOMM_PRIV_H__ */ | ||
| 350 | |||
diff --git a/include/linux/fsl/bestcomm/fec.h b/include/linux/fsl/bestcomm/fec.h new file mode 100644 index 000000000000..ee565d94d503 --- /dev/null +++ b/include/linux/fsl/bestcomm/fec.h | |||
| @@ -0,0 +1,61 @@ | |||
| 1 | /* | ||
| 2 | * Header for Bestcomm FEC tasks driver | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Copyright (C) 2006-2007 Sylvain Munaut <tnt@246tNt.com> | ||
| 6 | * Copyright (C) 2003-2004 MontaVista, Software, Inc. | ||
| 7 | * ( by Dale Farnsworth <dfarnsworth@mvista.com> ) | ||
| 8 | * | ||
| 9 | * This file is licensed under the terms of the GNU General Public License | ||
| 10 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 11 | * kind, whether express or implied. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef __BESTCOMM_FEC_H__ | ||
| 15 | #define __BESTCOMM_FEC_H__ | ||
| 16 | |||
| 17 | |||
| 18 | struct bcom_fec_bd { | ||
| 19 | u32 status; | ||
| 20 | u32 skb_pa; | ||
| 21 | }; | ||
| 22 | |||
| 23 | #define BCOM_FEC_TX_BD_TFD 0x08000000ul /* transmit frame done */ | ||
| 24 | #define BCOM_FEC_TX_BD_TC 0x04000000ul /* transmit CRC */ | ||
| 25 | #define BCOM_FEC_TX_BD_ABC 0x02000000ul /* append bad CRC */ | ||
| 26 | |||
| 27 | #define BCOM_FEC_RX_BD_L 0x08000000ul /* buffer is last in frame */ | ||
| 28 | #define BCOM_FEC_RX_BD_BC 0x00800000ul /* DA is broadcast */ | ||
| 29 | #define BCOM_FEC_RX_BD_MC 0x00400000ul /* DA is multicast and not broadcast */ | ||
| 30 | #define BCOM_FEC_RX_BD_LG 0x00200000ul /* Rx frame length violation */ | ||
| 31 | #define BCOM_FEC_RX_BD_NO 0x00100000ul /* Rx non-octet aligned frame */ | ||
| 32 | #define BCOM_FEC_RX_BD_CR 0x00040000ul /* Rx CRC error */ | ||
| 33 | #define BCOM_FEC_RX_BD_OV 0x00020000ul /* overrun */ | ||
| 34 | #define BCOM_FEC_RX_BD_TR 0x00010000ul /* Rx frame truncated */ | ||
| 35 | #define BCOM_FEC_RX_BD_LEN_MASK 0x000007fful /* mask for length of received frame */ | ||
| 36 | #define BCOM_FEC_RX_BD_ERRORS (BCOM_FEC_RX_BD_LG | BCOM_FEC_RX_BD_NO | \ | ||
| 37 | BCOM_FEC_RX_BD_CR | BCOM_FEC_RX_BD_OV | BCOM_FEC_RX_BD_TR) | ||
| 38 | |||
| 39 | |||
| 40 | extern struct bcom_task * | ||
| 41 | bcom_fec_rx_init(int queue_len, phys_addr_t fifo, int maxbufsize); | ||
| 42 | |||
| 43 | extern int | ||
| 44 | bcom_fec_rx_reset(struct bcom_task *tsk); | ||
| 45 | |||
| 46 | extern void | ||
| 47 | bcom_fec_rx_release(struct bcom_task *tsk); | ||
| 48 | |||
| 49 | |||
| 50 | extern struct bcom_task * | ||
| 51 | bcom_fec_tx_init(int queue_len, phys_addr_t fifo); | ||
| 52 | |||
| 53 | extern int | ||
| 54 | bcom_fec_tx_reset(struct bcom_task *tsk); | ||
| 55 | |||
| 56 | extern void | ||
| 57 | bcom_fec_tx_release(struct bcom_task *tsk); | ||
| 58 | |||
| 59 | |||
| 60 | #endif /* __BESTCOMM_FEC_H__ */ | ||
| 61 | |||
diff --git a/include/linux/fsl/bestcomm/gen_bd.h b/include/linux/fsl/bestcomm/gen_bd.h new file mode 100644 index 000000000000..de47260e69da --- /dev/null +++ b/include/linux/fsl/bestcomm/gen_bd.h | |||
| @@ -0,0 +1,53 @@ | |||
| 1 | /* | ||
| 2 | * Header for Bestcomm General Buffer Descriptor tasks driver | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com> | ||
| 6 | * Copyright (C) 2006 AppSpec Computer Technologies Corp. | ||
| 7 | * Jeff Gibbons <jeff.gibbons@appspec.com> | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify it | ||
| 10 | * under the terms of the GNU General Public License version 2 as published | ||
| 11 | * by the Free Software Foundation. | ||
| 12 | * | ||
| 13 | * | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef __BESTCOMM_GEN_BD_H__ | ||
| 17 | #define __BESTCOMM_GEN_BD_H__ | ||
| 18 | |||
| 19 | struct bcom_gen_bd { | ||
| 20 | u32 status; | ||
| 21 | u32 buf_pa; | ||
| 22 | }; | ||
| 23 | |||
| 24 | |||
| 25 | extern struct bcom_task * | ||
| 26 | bcom_gen_bd_rx_init(int queue_len, phys_addr_t fifo, | ||
| 27 | int initiator, int ipr, int maxbufsize); | ||
| 28 | |||
| 29 | extern int | ||
| 30 | bcom_gen_bd_rx_reset(struct bcom_task *tsk); | ||
| 31 | |||
| 32 | extern void | ||
| 33 | bcom_gen_bd_rx_release(struct bcom_task *tsk); | ||
| 34 | |||
| 35 | |||
| 36 | extern struct bcom_task * | ||
| 37 | bcom_gen_bd_tx_init(int queue_len, phys_addr_t fifo, | ||
| 38 | int initiator, int ipr); | ||
| 39 | |||
| 40 | extern int | ||
| 41 | bcom_gen_bd_tx_reset(struct bcom_task *tsk); | ||
| 42 | |||
| 43 | extern void | ||
| 44 | bcom_gen_bd_tx_release(struct bcom_task *tsk); | ||
| 45 | |||
| 46 | |||
| 47 | /* PSC support utility wrappers */ | ||
| 48 | struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len, | ||
| 49 | phys_addr_t fifo, int maxbufsize); | ||
| 50 | struct bcom_task * bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len, | ||
| 51 | phys_addr_t fifo); | ||
| 52 | #endif /* __BESTCOMM_GEN_BD_H__ */ | ||
| 53 | |||
diff --git a/include/linux/fsl/bestcomm/sram.h b/include/linux/fsl/bestcomm/sram.h new file mode 100644 index 000000000000..b6d668963cce --- /dev/null +++ b/include/linux/fsl/bestcomm/sram.h | |||
| @@ -0,0 +1,54 @@ | |||
| 1 | /* | ||
| 2 | * Handling of a sram zone for bestcomm | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com> | ||
| 6 | * | ||
| 7 | * This file is licensed under the terms of the GNU General Public License | ||
| 8 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 9 | * kind, whether express or implied. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef __BESTCOMM_SRAM_H__ | ||
| 13 | #define __BESTCOMM_SRAM_H__ | ||
| 14 | |||
| 15 | #include <asm/rheap.h> | ||
| 16 | #include <asm/mmu.h> | ||
| 17 | #include <linux/spinlock.h> | ||
| 18 | |||
| 19 | |||
| 20 | /* Structure used internally */ | ||
| 21 | /* The internals are here for the inline functions | ||
| 22 | * sake, certainly not for the user to mess with ! | ||
| 23 | */ | ||
| 24 | struct bcom_sram { | ||
| 25 | phys_addr_t base_phys; | ||
| 26 | void *base_virt; | ||
| 27 | unsigned int size; | ||
| 28 | rh_info_t *rh; | ||
| 29 | spinlock_t lock; | ||
| 30 | }; | ||
| 31 | |||
| 32 | extern struct bcom_sram *bcom_sram; | ||
| 33 | |||
| 34 | |||
| 35 | /* Public API */ | ||
| 36 | extern int bcom_sram_init(struct device_node *sram_node, char *owner); | ||
| 37 | extern void bcom_sram_cleanup(void); | ||
| 38 | |||
| 39 | extern void* bcom_sram_alloc(int size, int align, phys_addr_t *phys); | ||
| 40 | extern void bcom_sram_free(void *ptr); | ||
| 41 | |||
| 42 | static inline phys_addr_t bcom_sram_va2pa(void *va) { | ||
| 43 | return bcom_sram->base_phys + | ||
| 44 | (unsigned long)(va - bcom_sram->base_virt); | ||
| 45 | } | ||
| 46 | |||
| 47 | static inline void *bcom_sram_pa2va(phys_addr_t pa) { | ||
| 48 | return bcom_sram->base_virt + | ||
| 49 | (unsigned long)(pa - bcom_sram->base_phys); | ||
| 50 | } | ||
| 51 | |||
| 52 | |||
| 53 | #endif /* __BESTCOMM_SRAM_H__ */ | ||
| 54 | |||
