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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2012-10-30 03:20:56 -0400
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2012-10-30 03:20:56 -0400
commit53279f36dccffc26ff536003fd6bb97cc21c3b82 (patch)
tree9d16e497c0e4158c7c054c479bd0e9ff0388d7bb /include/linux/dw_dmac.h
parenta6e8c0a25377e27958b11b20e1927885ae7c9857 (diff)
parent8f0d8163b50e01f398b14bcd4dc039ac5ab18d64 (diff)
Merge tag 'v3.7-rc3' into next to sync up with recent USB and MFD changes
Diffstat (limited to 'include/linux/dw_dmac.h')
-rw-r--r--include/linux/dw_dmac.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index 2412e02d7c0f..e1c8c9e919ac 100644
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -19,6 +19,10 @@
19 * @nr_channels: Number of channels supported by hardware (max 8) 19 * @nr_channels: Number of channels supported by hardware (max 8)
20 * @is_private: The device channels should be marked as private and not for 20 * @is_private: The device channels should be marked as private and not for
21 * by the general purpose DMA channel allocator. 21 * by the general purpose DMA channel allocator.
22 * @block_size: Maximum block size supported by the controller
23 * @nr_masters: Number of AHB masters supported by the controller
24 * @data_width: Maximum data width supported by hardware per AHB master
25 * (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
22 */ 26 */
23struct dw_dma_platform_data { 27struct dw_dma_platform_data {
24 unsigned int nr_channels; 28 unsigned int nr_channels;
@@ -29,6 +33,9 @@ struct dw_dma_platform_data {
29#define CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */ 33#define CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */
30#define CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */ 34#define CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */
31 unsigned char chan_priority; 35 unsigned char chan_priority;
36 unsigned short block_size;
37 unsigned char nr_masters;
38 unsigned char data_width[4];
32}; 39};
33 40
34/* bursts size */ 41/* bursts size */