Merge tag 'v3.4-rc2' into perf/core

Merge Linux 3.4-rc2: we were on v3.3, update the base.

Signed-off-by: Ingo Molnar <mingo@kernel.org>

1 files changed, 30 insertions, 5 deletions

diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index a5966f691ef8..676f967390ae 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -18,14 +18,15 @@
  * The full GNU General Public License is included in this distribution in the
  * file called COPYING.
  */
-#ifndef DMAENGINE_H
-#define DMAENGINE_H
+#ifndef LINUX_DMAENGINE_H
+#define LINUX_DMAENGINE_H
 
 #include <linux/device.h>
 #include <linux/uio.h>
 #include <linux/bug.h>
 #include <linux/scatterlist.h>
 #include <linux/bitmap.h>
+#include <linux/types.h>
 #include <asm/page.h>
 
 /**
@@ -258,6 +259,7 @@ struct dma_chan_percpu {
  * struct dma_chan - devices supply DMA channels, clients use them
  * @device: ptr to the dma device who supplies this channel, always !%NULL
  * @cookie: last cookie value returned to client
+ * @completed_cookie: last completed cookie for this channel
  * @chan_id: channel ID for sysfs
  * @dev: class device for sysfs
  * @device_node: used to add this to the device chan list
@@ -269,6 +271,7 @@ struct dma_chan_percpu {
 struct dma_chan {
         struct dma_device *device;
         dma_cookie_t cookie;
+        dma_cookie_t completed_cookie;
 
         /* sysfs */
         int chan_id;
@@ -332,6 +335,9 @@ enum dma_slave_buswidth {
  * may or may not be applicable on memory sources.
  * @dst_maxburst: same as src_maxburst but for destination target
  * mutatis mutandis.
+ * @device_fc: Flow Controller Settings. Only valid for slave channels. Fill
+ * with 'true' if peripheral should be flow controller. Direction will be
+ * selected at Runtime.
  *
  * This struct is passed in as configuration data to a DMA engine
  * in order to set up a certain channel for DMA transport at runtime.
@@ -358,6 +364,7 @@ struct dma_slave_config {
         enum dma_slave_buswidth dst_addr_width;
         u32 src_maxburst;
         u32 dst_maxburst;
+        bool device_fc;
 };
 
 static inline const char *dma_chan_name(struct dma_chan *chan)
@@ -576,10 +583,11 @@ struct dma_device {
         struct dma_async_tx_descriptor *(*device_prep_slave_sg)(
                 struct dma_chan *chan, struct scatterlist *sgl,
                 unsigned int sg_len, enum dma_transfer_direction direction,
-                unsigned long flags);
+                unsigned long flags, void *context);
         struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
                 struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
-                size_t period_len, enum dma_transfer_direction direction);
+                size_t period_len, enum dma_transfer_direction direction,
+                void *context);
         struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
                 struct dma_chan *chan, struct dma_interleaved_template *xt,
                 unsigned long flags);
@@ -613,7 +621,24 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(
         struct scatterlist sg;
         sg_init_one(&sg, buf, len);
 
-        return chan->device->device_prep_slave_sg(chan, &sg, 1, dir, flags);
+        return chan->device->device_prep_slave_sg(chan, &sg, 1,
+                                                  dir, flags, NULL);
+}
+
+static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
+        struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
+        enum dma_transfer_direction dir, unsigned long flags)
+{
+        return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
+                                                  dir, flags, NULL);
+}
+
+static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
+                struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
+                size_t period_len, enum dma_transfer_direction dir)
+{
+        return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
+                                                period_len, dir, NULL);
 }
 
 static inline int dmaengine_terminate_all(struct dma_chan *chan)