aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/cs5535.h
diff options
context:
space:
mode:
authorJiri Kosina <jkosina@suse.cz>2011-09-15 09:08:05 -0400
committerJiri Kosina <jkosina@suse.cz>2011-09-15 09:08:18 -0400
commite060c38434b2caa78efe7cedaff4191040b65a15 (patch)
tree407361230bf6733f63d8e788e4b5e6566ee04818 /include/linux/cs5535.h
parent10e4ac572eeffe5317019bd7330b6058a400dfc2 (diff)
parentcc39c6a9bbdebfcf1a7dee64d83bf302bc38d941 (diff)
Merge branch 'master' into for-next
Fast-forward merge with Linus to be able to merge patches based on more recent version of the tree.
Diffstat (limited to 'include/linux/cs5535.h')
-rw-r--r--include/linux/cs5535.h60
1 files changed, 60 insertions, 0 deletions
diff --git a/include/linux/cs5535.h b/include/linux/cs5535.h
index 6fe2114f8ad2..c077aec3a6ff 100644
--- a/include/linux/cs5535.h
+++ b/include/linux/cs5535.h
@@ -11,6 +11,8 @@
11#ifndef _CS5535_H 11#ifndef _CS5535_H
12#define _CS5535_H 12#define _CS5535_H
13 13
14#include <asm/msr.h>
15
14/* MSRs */ 16/* MSRs */
15#define MSR_GLIU_P2D_RO0 0x10000029 17#define MSR_GLIU_P2D_RO0 0x10000029
16 18
@@ -38,17 +40,75 @@
38#define MSR_MFGPT_NR 0x51400029 40#define MSR_MFGPT_NR 0x51400029
39#define MSR_MFGPT_SETUP 0x5140002B 41#define MSR_MFGPT_SETUP 0x5140002B
40 42
43#define MSR_RTC_DOMA_OFFSET 0x51400055
44#define MSR_RTC_MONA_OFFSET 0x51400056
45#define MSR_RTC_CEN_OFFSET 0x51400057
46
41#define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */ 47#define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */
42 48
43#define MSR_GX_GLD_MSR_CONFIG 0xC0002001 49#define MSR_GX_GLD_MSR_CONFIG 0xC0002001
44#define MSR_GX_MSR_PADSEL 0xC0002011 50#define MSR_GX_MSR_PADSEL 0xC0002011
45 51
52static inline int cs5535_pic_unreqz_select_high(unsigned int group,
53 unsigned int irq)
54{
55 uint32_t lo, hi;
56
57 rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
58 lo &= ~(0xF << (group * 4));
59 lo |= (irq & 0xF) << (group * 4);
60 wrmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
61 return 0;
62}
63
64/* PIC registers */
65#define CS5536_PIC_INT_SEL1 0x4d0
66#define CS5536_PIC_INT_SEL2 0x4d1
67
46/* resource sizes */ 68/* resource sizes */
47#define LBAR_GPIO_SIZE 0xFF 69#define LBAR_GPIO_SIZE 0xFF
48#define LBAR_MFGPT_SIZE 0x40 70#define LBAR_MFGPT_SIZE 0x40
49#define LBAR_ACPI_SIZE 0x40 71#define LBAR_ACPI_SIZE 0x40
50#define LBAR_PMS_SIZE 0x80 72#define LBAR_PMS_SIZE 0x80
51 73
74/*
75 * PMC registers (PMS block)
76 * It is only safe to access these registers as dword accesses.
77 * See CS5536 Specification Update erratas 17 & 18
78 */
79#define CS5536_PM_SCLK 0x10
80#define CS5536_PM_IN_SLPCTL 0x20
81#define CS5536_PM_WKXD 0x34
82#define CS5536_PM_WKD 0x30
83#define CS5536_PM_SSC 0x54
84
85/*
86 * PM registers (ACPI block)
87 * It is only safe to access these registers as dword accesses.
88 * See CS5536 Specification Update erratas 17 & 18
89 */
90#define CS5536_PM1_STS 0x00
91#define CS5536_PM1_EN 0x02
92#define CS5536_PM1_CNT 0x08
93#define CS5536_PM_GPE0_STS 0x18
94#define CS5536_PM_GPE0_EN 0x1c
95
96/* CS5536_PM1_STS bits */
97#define CS5536_WAK_FLAG (1 << 15)
98#define CS5536_PWRBTN_FLAG (1 << 8)
99
100/* CS5536_PM1_EN bits */
101#define CS5536_PM_PWRBTN (1 << 8)
102#define CS5536_PM_RTC (1 << 10)
103
104/* CS5536_PM_GPE0_STS bits */
105#define CS5536_GPIOM7_PME_FLAG (1 << 31)
106#define CS5536_GPIOM6_PME_FLAG (1 << 30)
107
108/* CS5536_PM_GPE0_EN bits */
109#define CS5536_GPIOM7_PME_EN (1 << 31)
110#define CS5536_GPIOM6_PME_EN (1 << 30)
111
52/* VSA2 magic values */ 112/* VSA2 magic values */
53#define VSA_VRC_INDEX 0xAC1C 113#define VSA_VRC_INDEX 0xAC1C
54#define VSA_VRC_DATA 0xAC1E 114#define VSA_VRC_DATA 0xAC1E