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authorSuresh Siddha <suresh.b.siddha@intel.com>2010-09-30 21:19:07 -0400
committerLen Brown <len.brown@intel.com>2010-09-30 21:19:22 -0400
commit6110a1f43c27b516e16d5ce8860fca50748c2a87 (patch)
tree021233718337a4a72ba4715f4d0782d5253fec7c /include/linux/cpuidle.h
parent9587a678fa56ea6d7f39b048f24f5d03a89bf9b3 (diff)
intel_idle: Voluntary leave_mm before entering deeper
Avoid TLB flush IPIs for the cores in deeper c-states by voluntary leave_mm() before entering into that state. CPUs tend to flush TLB in those c-states anyways. acpi_idle does this with C3-type states, but it was not caried over when intel_idle was introduced. intel_idle can apply it to C-states in addition to those that ACPI might export as C3... Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'include/linux/cpuidle.h')
-rw-r--r--include/linux/cpuidle.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h
index 36ca9721a0c2..1be416bbbb82 100644
--- a/include/linux/cpuidle.h
+++ b/include/linux/cpuidle.h
@@ -53,6 +53,7 @@ struct cpuidle_state {
53#define CPUIDLE_FLAG_BALANCED (0x40) /* medium latency, moderate savings */ 53#define CPUIDLE_FLAG_BALANCED (0x40) /* medium latency, moderate savings */
54#define CPUIDLE_FLAG_DEEP (0x80) /* high latency, large savings */ 54#define CPUIDLE_FLAG_DEEP (0x80) /* high latency, large savings */
55#define CPUIDLE_FLAG_IGNORE (0x100) /* ignore during this idle period */ 55#define CPUIDLE_FLAG_IGNORE (0x100) /* ignore during this idle period */
56#define CPUIDLE_FLAG_TLB_FLUSHED (0x200) /* tlb will be flushed */
56 57
57#define CPUIDLE_DRIVER_FLAGS_MASK (0xFFFF0000) 58#define CPUIDLE_DRIVER_FLAGS_MASK (0xFFFF0000)
58 59