diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2014-09-14 09:34:38 -0400 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2014-09-14 09:35:36 -0400 |
| commit | db985cbd67c45f875ef43cb5febfaa8cbd203c27 (patch) | |
| tree | 63542d05b1c0f730ec1ad5f915dc4eb3c015e616 /include/linux/clocksource.h | |
| parent | c6f1224573c3b609bd8073b39f496637a16cc06f (diff) | |
| parent | 468a903c0e5147e3f93187f0b808a3ef957fd00e (diff) | |
Merge tag 'irqchip-core-3.18' of git://git.infradead.org/users/jcooper/linux into irq/core
irqchip core changes for v3.18
- renesas: suspend to RAM, runtime PM, cleanups and DT binding docs
- keystone: add new driver
- hip04: add Hisilicon HiP04 driver (without touching irq-gic.c)
- gic: Use defines instead of magic number, preserve v2 bybass bits
- handle_domain_irq: common low level interrupt entry handler
Diffstat (limited to 'include/linux/clocksource.h')
| -rw-r--r-- | include/linux/clocksource.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index a16b497d5159..653f0e2b6ca9 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h | |||
| @@ -162,7 +162,6 @@ extern u64 timecounter_cyc2time(struct timecounter *tc, | |||
| 162 | * @archdata: arch-specific data | 162 | * @archdata: arch-specific data |
| 163 | * @suspend: suspend function for the clocksource, if necessary | 163 | * @suspend: suspend function for the clocksource, if necessary |
| 164 | * @resume: resume function for the clocksource, if necessary | 164 | * @resume: resume function for the clocksource, if necessary |
| 165 | * @cycle_last: most recent cycle counter value seen by ::read() | ||
| 166 | * @owner: module reference, must be set by clocksource in modules | 165 | * @owner: module reference, must be set by clocksource in modules |
| 167 | */ | 166 | */ |
| 168 | struct clocksource { | 167 | struct clocksource { |
| @@ -171,7 +170,6 @@ struct clocksource { | |||
| 171 | * clocksource itself is cacheline aligned. | 170 | * clocksource itself is cacheline aligned. |
| 172 | */ | 171 | */ |
| 173 | cycle_t (*read)(struct clocksource *cs); | 172 | cycle_t (*read)(struct clocksource *cs); |
| 174 | cycle_t cycle_last; | ||
| 175 | cycle_t mask; | 173 | cycle_t mask; |
| 176 | u32 mult; | 174 | u32 mult; |
| 177 | u32 shift; | 175 | u32 shift; |
