aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/bcma
diff options
context:
space:
mode:
authorHauke Mehrtens <hauke@hauke-m.de>2012-07-09 16:03:10 -0400
committerJohn W. Linville <linville@tuxdriver.com>2012-07-11 15:40:22 -0400
commit650cef38263c0f4c8970265354432be154eef425 (patch)
tree667a1f5d8837a2a8fc86110e6abe3d78f1b43ad1 /include/linux/bcma
parent9a89c3a856236ee6b68987dd0a0195010c3b801c (diff)
bcma: add PMU clock support for BCM4706
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'include/linux/bcma')
-rw-r--r--include/linux/bcma/bcma_driver_chipcommon.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index 12975eac403f..fbd0d49dc4d2 100644
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -88,6 +88,11 @@
88#define BCMA_CC_CHIPST_4313_OTP_PRESENT 2 88#define BCMA_CC_CHIPST_4313_OTP_PRESENT 2
89#define BCMA_CC_CHIPST_4331_SPROM_PRESENT 2 89#define BCMA_CC_CHIPST_4331_SPROM_PRESENT 2
90#define BCMA_CC_CHIPST_4331_OTP_PRESENT 4 90#define BCMA_CC_CHIPST_4331_OTP_PRESENT 4
91#define BCMA_CC_CHIPST_4706_PKG_OPTION BIT(0) /* 0: full-featured package 1: low-cost package */
92#define BCMA_CC_CHIPST_4706_SFLASH_PRESENT BIT(1) /* 0: parallel, 1: serial flash is present */
93#define BCMA_CC_CHIPST_4706_SFLASH_TYPE BIT(2) /* 0: 8b-p/ST-s flash, 1: 16b-p/Atmal-s flash */
94#define BCMA_CC_CHIPST_4706_MIPS_BENDIAN BIT(3) /* 0: little, 1: big endian */
95#define BCMA_CC_CHIPST_4706_PCIE1_DISABLE BIT(5) /* PCIE1 enable strap pin */
91#define BCMA_CC_JCMD 0x0030 /* Rev >= 10 only */ 96#define BCMA_CC_JCMD 0x0030 /* Rev >= 10 only */
92#define BCMA_CC_JCMD_START 0x80000000 97#define BCMA_CC_JCMD_START 0x80000000
93#define BCMA_CC_JCMD_BUSY 0x80000000 98#define BCMA_CC_JCMD_BUSY 0x80000000
@@ -280,6 +285,15 @@
280 285
281/* 4706 PMU */ 286/* 4706 PMU */
282#define BCMA_CC_PMU4706_MAINPLL_PLL0 0 287#define BCMA_CC_PMU4706_MAINPLL_PLL0 0
288#define BCMA_CC_PMU6_4706_PROCPLL_OFF 4 /* The CPU PLL */
289#define BCMA_CC_PMU6_4706_PROC_P2DIV_MASK 0x000f0000
290#define BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT 16
291#define BCMA_CC_PMU6_4706_PROC_P1DIV_MASK 0x0000f000
292#define BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT 12
293#define BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK 0x00000ff8
294#define BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT 3
295#define BCMA_CC_PMU6_4706_PROC_NDIV_MODE_MASK 0x00000007
296#define BCMA_CC_PMU6_4706_PROC_NDIV_MODE_SHIFT 0
283 297
284/* ALP clock on pre-PMU chips */ 298/* ALP clock on pre-PMU chips */
285#define BCMA_CC_PMU_ALP_CLOCK 20000000 299#define BCMA_CC_PMU_ALP_CLOCK 20000000