diff options
author | Hauke Mehrtens <hauke@hauke-m.de> | 2011-07-22 19:20:11 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-08-08 14:29:29 -0400 |
commit | 908debc8da0d5a91418f71c6a462f62bd2ac69ef (patch) | |
tree | 886072e213b3a67650a53574be916ec105d15b61 /include/linux/bcma/bcma_driver_chipcommon.h | |
parent | e3afe0e5be7576ac1282ea9fbbc9b352bb379227 (diff) |
bcma: get CPU clock
Add method to return the clock of the CPU. This is needed by the arch
code to calculate the mips_hpt_frequency.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'include/linux/bcma/bcma_driver_chipcommon.h')
-rw-r--r-- | include/linux/bcma/bcma_driver_chipcommon.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h index b9a930eb44cd..6083725dd22e 100644 --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h | |||
@@ -241,8 +241,47 @@ | |||
241 | #define BCMA_CC_SPROM 0x0800 /* SPROM beginning */ | 241 | #define BCMA_CC_SPROM 0x0800 /* SPROM beginning */ |
242 | #define BCMA_CC_SPROM_PCIE6 0x0830 /* SPROM beginning on PCIe rev >= 6 */ | 242 | #define BCMA_CC_SPROM_PCIE6 0x0830 /* SPROM beginning on PCIe rev >= 6 */ |
243 | 243 | ||
244 | /* Divider allocation in 4716/47162/5356 */ | ||
245 | #define BCMA_CC_PMU5_MAINPLL_CPU 1 | ||
246 | #define BCMA_CC_PMU5_MAINPLL_MEM 2 | ||
247 | #define BCMA_CC_PMU5_MAINPLL_SSB 3 | ||
248 | |||
249 | /* PLL usage in 4716/47162 */ | ||
250 | #define BCMA_CC_PMU4716_MAINPLL_PLL0 12 | ||
251 | |||
252 | /* PLL usage in 5356/5357 */ | ||
253 | #define BCMA_CC_PMU5356_MAINPLL_PLL0 0 | ||
254 | #define BCMA_CC_PMU5357_MAINPLL_PLL0 0 | ||
255 | |||
256 | /* 4706 PMU */ | ||
257 | #define BCMA_CC_PMU4706_MAINPLL_PLL0 0 | ||
258 | |||
244 | /* ALP clock on pre-PMU chips */ | 259 | /* ALP clock on pre-PMU chips */ |
245 | #define BCMA_CC_PMU_ALP_CLOCK 20000000 | 260 | #define BCMA_CC_PMU_ALP_CLOCK 20000000 |
261 | /* HT clock for systems with PMU-enabled chipcommon */ | ||
262 | #define BCMA_CC_PMU_HT_CLOCK 80000000 | ||
263 | |||
264 | /* PMU rev 5 (& 6) */ | ||
265 | #define BCMA_CC_PPL_P1P2_OFF 0 | ||
266 | #define BCMA_CC_PPL_P1_MASK 0x0f000000 | ||
267 | #define BCMA_CC_PPL_P1_SHIFT 24 | ||
268 | #define BCMA_CC_PPL_P2_MASK 0x00f00000 | ||
269 | #define BCMA_CC_PPL_P2_SHIFT 20 | ||
270 | #define BCMA_CC_PPL_M14_OFF 1 | ||
271 | #define BCMA_CC_PPL_MDIV_MASK 0x000000ff | ||
272 | #define BCMA_CC_PPL_MDIV_WIDTH 8 | ||
273 | #define BCMA_CC_PPL_NM5_OFF 2 | ||
274 | #define BCMA_CC_PPL_NDIV_MASK 0xfff00000 | ||
275 | #define BCMA_CC_PPL_NDIV_SHIFT 20 | ||
276 | #define BCMA_CC_PPL_FMAB_OFF 3 | ||
277 | #define BCMA_CC_PPL_MRAT_MASK 0xf0000000 | ||
278 | #define BCMA_CC_PPL_MRAT_SHIFT 28 | ||
279 | #define BCMA_CC_PPL_ABRAT_MASK 0x08000000 | ||
280 | #define BCMA_CC_PPL_ABRAT_SHIFT 27 | ||
281 | #define BCMA_CC_PPL_FDIV_MASK 0x07ffffff | ||
282 | #define BCMA_CC_PPL_PLLCTL_OFF 4 | ||
283 | #define BCMA_CC_PPL_PCHI_OFF 5 | ||
284 | #define BCMA_CC_PPL_PCHI_MASK 0x0000003f | ||
246 | 285 | ||
247 | /* Data for the PMU, if available. | 286 | /* Data for the PMU, if available. |
248 | * Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU) | 287 | * Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU) |