Merge branch 'linus' into perf/urgent

Merge reason: we need to fix a non-trivial merge conflict.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 25 insertions, 1 deletions

diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index a33086a7530b..8bbfe31fbac8 100644
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -56,6 +56,9 @@
 #define  BCMA_CC_OTPS_HW_PROTECT        0x00000001
 #define  BCMA_CC_OTPS_SW_PROTECT        0x00000002
 #define  BCMA_CC_OTPS_CID_PROTECT       0x00000004
+#define  BCMA_CC_OTPS_GU_PROG_IND       0x00000F00      /* General Use programmed indication */
+#define  BCMA_CC_OTPS_GU_PROG_IND_SHIFT 8
+#define  BCMA_CC_OTPS_GU_PROG_HW        0x00000100      /* HW region programmed */
 #define BCMA_CC_OTPC                    0x0014          /* OTP control */
 #define  BCMA_CC_OTPC_RECWAIT           0xFF000000
 #define  BCMA_CC_OTPC_PROGWAIT          0x00FFFF00
@@ -72,6 +75,8 @@
 #define  BCMA_CC_OTPP_READ              0x40000000
 #define  BCMA_CC_OTPP_START             0x80000000
 #define  BCMA_CC_OTPP_BUSY              0x80000000
+#define BCMA_CC_OTPL                    0x001C          /* OTP layout */
+#define  BCMA_CC_OTPL_GURGN_OFFSET      0x00000FFF      /* offset of general use region */
 #define BCMA_CC_IRQSTAT                 0x0020
 #define BCMA_CC_IRQMASK                 0x0024
 #define  BCMA_CC_IRQ_GPIO               0x00000001      /* gpio intr */
@@ -79,6 +84,10 @@
 #define  BCMA_CC_IRQ_WDRESET            0x80000000      /* watchdog reset occurred */
 #define BCMA_CC_CHIPCTL                 0x0028          /* Rev >= 11 only */
 #define BCMA_CC_CHIPSTAT                0x002C          /* Rev >= 11 only */
+#define  BCMA_CC_CHIPST_4313_SPROM_PRESENT      1
+#define  BCMA_CC_CHIPST_4313_OTP_PRESENT        2
+#define  BCMA_CC_CHIPST_4331_SPROM_PRESENT      2
+#define  BCMA_CC_CHIPST_4331_OTP_PRESENT        4
 #define BCMA_CC_JCMD                    0x0030          /* Rev >= 10 only */
 #define  BCMA_CC_JCMD_START             0x80000000
 #define  BCMA_CC_JCMD_BUSY              0x80000000
@@ -181,6 +190,22 @@
 #define BCMA_CC_FLASH_CFG               0x0128
 #define  BCMA_CC_FLASH_CFG_DS           0x0010  /* Data size, 0=8bit, 1=16bit */
 #define BCMA_CC_FLASH_WAITCNT           0x012C
+#define BCMA_CC_SROM_CONTROL            0x0190
+#define  BCMA_CC_SROM_CONTROL_START     0x80000000
+#define  BCMA_CC_SROM_CONTROL_BUSY      0x80000000
+#define  BCMA_CC_SROM_CONTROL_OPCODE    0x60000000
+#define  BCMA_CC_SROM_CONTROL_OP_READ   0x00000000
+#define  BCMA_CC_SROM_CONTROL_OP_WRITE  0x20000000
+#define  BCMA_CC_SROM_CONTROL_OP_WRDIS  0x40000000
+#define  BCMA_CC_SROM_CONTROL_OP_WREN   0x60000000
+#define  BCMA_CC_SROM_CONTROL_OTPSEL    0x00000010
+#define  BCMA_CC_SROM_CONTROL_LOCK      0x00000008
+#define  BCMA_CC_SROM_CONTROL_SIZE_MASK 0x00000006
+#define  BCMA_CC_SROM_CONTROL_SIZE_1K   0x00000000
+#define  BCMA_CC_SROM_CONTROL_SIZE_4K   0x00000002
+#define  BCMA_CC_SROM_CONTROL_SIZE_16K  0x00000004
+#define  BCMA_CC_SROM_CONTROL_SIZE_SHIFT        1
+#define  BCMA_CC_SROM_CONTROL_PRESENT   0x00000001
 /* 0x1E0 is defined as shared BCMA_CLKCTLST */
 #define BCMA_CC_HW_WORKAROUND           0x01E4 /* Hardware workaround (rev >= 20) */
 #define BCMA_CC_UART0_DATA              0x0300
@@ -240,7 +265,6 @@
 #define BCMA_CC_PLLCTL_ADDR             0x0660
 #define BCMA_CC_PLLCTL_DATA             0x0664
 #define BCMA_CC_SPROM                   0x0800 /* SPROM beginning */
-#define BCMA_CC_SPROM_PCIE6             0x0830 /* SPROM beginning on PCIe rev >= 6 */
 
 /* Divider allocation in 4716/47162/5356 */
 #define BCMA_CC_PMU5_MAINPLL_CPU        1