Merge remote-tracking branch 'linaro/clk-next' into clk-next

7 files changed, 140 insertions, 7 deletions

diff --git a/include/dt-bindings/clock/bcm21664.h b/include/dt-bindings/clock/bcm21664.h
new file mode 100644
index 000000000000..5a7f0e4750a8
--- /dev/null
+++ b/include/dt-bindings/clock/bcm21664.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ * Copyright 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _CLOCK_BCM21664_H
+#define _CLOCK_BCM21664_H
+
+/*
+ * This file defines the values used to specify clocks provided by
+ * the clock control units (CCUs) on Broadcom BCM21664 family SoCs.
+ */
+
+/* bcm21664 CCU device tree "compatible" strings */
+#define BCM21664_DT_ROOT_CCU_COMPAT     "brcm,bcm21664-root-ccu"
+#define BCM21664_DT_AON_CCU_COMPAT      "brcm,bcm21664-aon-ccu"
+#define BCM21664_DT_MASTER_CCU_COMPAT   "brcm,bcm21664-master-ccu"
+#define BCM21664_DT_SLAVE_CCU_COMPAT    "brcm,bcm21664-slave-ccu"
+
+/* root CCU clock ids */
+
+#define BCM21664_ROOT_CCU_FRAC_1M               0
+#define BCM21664_ROOT_CCU_CLOCK_COUNT           1
+
+/* aon CCU clock ids */
+
+#define BCM21664_AON_CCU_HUB_TIMER              0
+#define BCM21664_AON_CCU_CLOCK_COUNT            1
+
+/* master CCU clock ids */
+
+#define BCM21664_MASTER_CCU_SDIO1               0
+#define BCM21664_MASTER_CCU_SDIO2               1
+#define BCM21664_MASTER_CCU_SDIO3               2
+#define BCM21664_MASTER_CCU_SDIO4               3
+#define BCM21664_MASTER_CCU_SDIO1_SLEEP         4
+#define BCM21664_MASTER_CCU_SDIO2_SLEEP         5
+#define BCM21664_MASTER_CCU_SDIO3_SLEEP         6
+#define BCM21664_MASTER_CCU_SDIO4_SLEEP         7
+#define BCM21664_MASTER_CCU_CLOCK_COUNT         8
+
+/* slave CCU clock ids */
+
+#define BCM21664_SLAVE_CCU_UARTB                0
+#define BCM21664_SLAVE_CCU_UARTB2               1
+#define BCM21664_SLAVE_CCU_UARTB3               2
+#define BCM21664_SLAVE_CCU_BSC1                 3
+#define BCM21664_SLAVE_CCU_BSC2                 4
+#define BCM21664_SLAVE_CCU_BSC3                 5
+#define BCM21664_SLAVE_CCU_BSC4                 6
+#define BCM21664_SLAVE_CCU_CLOCK_COUNT          7
+
+#endif /* _CLOCK_BCM21664_H */
diff --git a/include/dt-bindings/clock/bcm281xx.h b/include/dt-bindings/clock/bcm281xx.h
index e0096940886d..a763460cf1af 100644
--- a/include/dt-bindings/clock/bcm281xx.h
+++ b/include/dt-bindings/clock/bcm281xx.h
@@ -20,6 +20,18 @@
  * the clock control units (CCUs) on Broadcom BCM281XX family SoCs.
  */
 
+/*
+ * These are the bcm281xx CCU device tree "compatible" strings.
+ * We're stuck with using "bcm11351" in the string because wild
+ * cards aren't allowed, and that name was the first one defined
+ * in this family of devices.
+ */
+#define BCM281XX_DT_ROOT_CCU_COMPAT     "brcm,bcm11351-root-ccu"
+#define BCM281XX_DT_AON_CCU_COMPAT      "brcm,bcm11351-aon-ccu"
+#define BCM281XX_DT_HUB_CCU_COMPAT      "brcm,bcm11351-hub-ccu"
+#define BCM281XX_DT_MASTER_CCU_COMPAT   "brcm,bcm11351-master-ccu"
+#define BCM281XX_DT_SLAVE_CCU_COMPAT    "brcm,bcm11351-slave-ccu"
+
 /* root CCU clock ids */
 
 #define BCM281XX_ROOT_CCU_FRAC_1M               0
diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h
new file mode 100644
index 000000000000..aad579a75802
--- /dev/null
+++ b/include/dt-bindings/clock/hix5hd2-clock.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2014 Linaro Ltd.
+ * Copyright (c) 2014 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#ifndef __DTS_HIX5HD2_CLOCK_H
+#define __DTS_HIX5HD2_CLOCK_H
+
+/* fixed rate */
+#define HIX5HD2_FIXED_1200M             1
+#define HIX5HD2_FIXED_400M              2
+#define HIX5HD2_FIXED_48M               3
+#define HIX5HD2_FIXED_24M               4
+#define HIX5HD2_FIXED_600M              5
+#define HIX5HD2_FIXED_300M              6
+#define HIX5HD2_FIXED_75M               7
+#define HIX5HD2_FIXED_200M              8
+#define HIX5HD2_FIXED_100M              9
+#define HIX5HD2_FIXED_40M               10
+#define HIX5HD2_FIXED_150M              11
+#define HIX5HD2_FIXED_1728M             12
+#define HIX5HD2_FIXED_28P8M             13
+#define HIX5HD2_FIXED_432M              14
+#define HIX5HD2_FIXED_345P6M            15
+#define HIX5HD2_FIXED_288M              16
+#define HIX5HD2_FIXED_60M               17
+#define HIX5HD2_FIXED_750M              18
+#define HIX5HD2_FIXED_500M              19
+#define HIX5HD2_FIXED_54M               20
+#define HIX5HD2_FIXED_27M               21
+#define HIX5HD2_FIXED_1500M             22
+#define HIX5HD2_FIXED_375M              23
+#define HIX5HD2_FIXED_187M              24
+#define HIX5HD2_FIXED_250M              25
+#define HIX5HD2_FIXED_125M              26
+#define HIX5HD2_FIXED_2P02M             27
+#define HIX5HD2_FIXED_50M               28
+#define HIX5HD2_FIXED_25M               29
+#define HIX5HD2_FIXED_83M               30
+
+/* mux clocks */
+#define HIX5HD2_SFC_MUX                 64
+#define HIX5HD2_MMC_MUX                 65
+#define HIX5HD2_FEPHY_MUX               66
+
+/* gate clocks */
+#define HIX5HD2_SFC_RST                 128
+#define HIX5HD2_SFC_CLK                 129
+#define HIX5HD2_MMC_CIU_CLK             130
+#define HIX5HD2_MMC_BIU_CLK             131
+#define HIX5HD2_MMC_CIU_RST             132
+
+#define HIX5HD2_NR_CLKS                 256
+#endif  /* __DTS_HIX5HD2_CLOCK_H */
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8960.h b/include/dt-bindings/clock/qcom,gcc-msm8960.h
index 03bbf49d43b7..f9f547146a15 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8960.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8960.h
@@ -51,7 +51,7 @@
 #define QDSS_TSCTR_CLK                          34
 #define SFAB_ADM0_M0_A_CLK                      35
 #define SFAB_ADM0_M1_A_CLK                      36
-#define SFAB_ADM0_M2_A_CLK                      37
+#define SFAB_ADM0_M2_H_CLK                      37
 #define ADM0_CLK                                38
 #define ADM0_PBUS_CLK                           39
 #define MSS_XPU_CLK                             40
@@ -99,7 +99,7 @@
 #define CFPB2_H_CLK                             82
 #define SFAB_CFPB_M_H_CLK                       83
 #define CFPB_MASTER_H_CLK                       84
-#define SFAB_CFPB_S_HCLK                        85
+#define SFAB_CFPB_S_H_CLK                       85
 #define CFPB_SPLITTER_H_CLK                     86
 #define TSIF_H_CLK                              87
 #define TSIF_INACTIVITY_TIMERS_CLK              88
@@ -110,7 +110,6 @@
 #define CE1_SLEEP_CLK                           93
 #define CE2_H_CLK                               94
 #define CE2_CORE_CLK                            95
-#define CE2_SLEEP_CLK                           96
 #define SFPB_H_CLK_SRC                          97
 #define SFPB_H_CLK                              98
 #define SFAB_SFPB_M_H_CLK                       99
@@ -252,7 +251,7 @@
 #define MSS_S_H_CLK                             235
 #define MSS_CXO_SRC_CLK                         236
 #define SATA_H_CLK                              237
-#define SATA_SRC_CLK                            238
+#define SATA_CLK_SRC                            238
 #define SATA_RXOOB_CLK                          239
 #define SATA_PMALIVE_CLK                        240
 #define SATA_PHY_REF_CLK                        241
diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h
index 6d0d8d8ef31e..fc12621fb432 100644
--- a/include/dt-bindings/clock/tegra114-car.h
+++ b/include/dt-bindings/clock/tegra114-car.h
@@ -337,6 +337,7 @@
 #define TEGRA114_CLK_CLK_OUT_3_MUX 308
 #define TEGRA114_CLK_DSIA_MUX 309
 #define TEGRA114_CLK_DSIB_MUX 310
-#define TEGRA114_CLK_CLK_MAX 311
+#define TEGRA114_CLK_XUSB_SS_DIV2 311
+#define TEGRA114_CLK_CLK_MAX 312
 
 #endif  /* _DT_BINDINGS_CLOCK_TEGRA114_CAR_H */
diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h
index 433528ab5161..8a4c5892890f 100644
--- a/include/dt-bindings/clock/tegra124-car.h
+++ b/include/dt-bindings/clock/tegra124-car.h
@@ -336,6 +336,7 @@
 #define TEGRA124_CLK_DSIA_MUX 309
 #define TEGRA124_CLK_DSIB_MUX 310
 #define TEGRA124_CLK_SOR0_LVDS 311
-#define TEGRA124_CLK_CLK_MAX 312
+#define TEGRA124_CLK_XUSB_SS_DIV2 312
+#define TEGRA124_CLK_CLK_MAX 313
 
 #endif  /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */
diff --git a/include/dt-bindings/reset/qcom,gcc-msm8960.h b/include/dt-bindings/reset/qcom,gcc-msm8960.h
index a840e680323c..07edd0e65eed 100644
--- a/include/dt-bindings/reset/qcom,gcc-msm8960.h
+++ b/include/dt-bindings/reset/qcom,gcc-msm8960.h
@@ -58,7 +58,7 @@
 #define PPSS_PROC_RESET                                 41
 #define PPSS_RESET                                      42
 #define DMA_BAM_RESET                                   43
-#define SIC_TIC_RESET                                   44
+#define SPS_TIC_H_RESET                                 44
 #define SLIMBUS_H_RESET                                 45
 #define SFAB_CFPB_M_RESET                               46
 #define SFAB_CFPB_S_RESET                               47