Merge tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

From Simon Horman:
Third Round of Renesas ARM Based SoC DT Updates for v3.14

* r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCSs
  - Add SSI, QSPI and MSIOF  clocks in device tree

r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards
  - Remove reference DTS
  - Specify external clock frequency in DT
  - Sync non-reference DTS with referene DTS
  - Add clocks to DTS

* r8a7740 (R-Mobile A1) based Armadillo board
  - Add gpio-keys device
  - Add PWM backlight enable GPIO
  - Add PWM backlight power supply

* r8a73a0 (SH-Mobile AG5), r8a7740 (R-Mobile A1) and
  r8a73a4 (SH-Mobile APE6) SoCs
  - Specify PFC interrupts in DT

* tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (72 commits)
  ARM: shmobile: r8a7791: Add SSI clocks in device tree
  ARM: shmobile: r8a7790: Add SSI clocks in device tree
  ARM: shmobile: r8a7791: Add QSPI module clock in device tree
  ARM: shmobile: r8a7790: Add QSPI module clock in device tree
  ARM: shmobile: r8a7791: Add MSIOF clocks in device tree
  ARM: shmobile: r8a7790: Add MSIOF clocks in device tree
  ARM: shmobile: Remove Koelsch reference DTS
  ARM: shmobile: Remove Lager reference DTS
  ARM: shmobile: koelsch: Specify external clock frequency in DT
  ARM: shmobile: lager: Specify external clock frequency in DT
  ARM: shmobile: Sync Koelsch DTS with Koelsch reference DTS
  ARM: shmobile: Sync Lager DTS with Lager reference DTS
  ARM: shmobile: r8a7791: Add clocks
  ARM: shmobile: r8a7790: Reference clocks
  ARM: shmobile: r8a7790: Add clocks
  ARM: shmobile: armadillo: dts: Add gpio-keys device
  ARM: shmobile: sh73a0: Specify PFC interrupts in DT
  ARM: shmobile: r8a7740: Specify PFC interrupts in DT
  ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
  ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

2 files changed, 244 insertions, 0 deletions

diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
new file mode 100644
index 000000000000..dbb262a3e7a6
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -0,0 +1,120 @@
+/*
+ * Copyright 2013 Ideas On Board SPRL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
+#define __DT_BINDINGS_CLOCK_R8A7790_H__
+
+/* CPG */
+#define R8A7790_CLK_MAIN                0
+#define R8A7790_CLK_PLL0                1
+#define R8A7790_CLK_PLL1                2
+#define R8A7790_CLK_PLL3                3
+#define R8A7790_CLK_LB                  4
+#define R8A7790_CLK_QSPI                5
+#define R8A7790_CLK_SDH                 6
+#define R8A7790_CLK_SD0                 7
+#define R8A7790_CLK_SD1                 8
+#define R8A7790_CLK_Z                   9
+
+/* MSTP0 */
+#define R8A7790_CLK_MSIOF0              0
+
+/* MSTP1 */
+#define R8A7790_CLK_TMU1                11
+#define R8A7790_CLK_TMU3                21
+#define R8A7790_CLK_TMU2                22
+#define R8A7790_CLK_CMT0                24
+#define R8A7790_CLK_TMU0                25
+#define R8A7790_CLK_VSP1_DU1            27
+#define R8A7790_CLK_VSP1_DU0            28
+#define R8A7790_CLK_VSP1_RT             30
+#define R8A7790_CLK_VSP1_SY             31
+
+/* MSTP2 */
+#define R8A7790_CLK_SCIFA2              2
+#define R8A7790_CLK_SCIFA1              3
+#define R8A7790_CLK_SCIFA0              4
+#define R8A7790_CLK_MSIOF2              5
+#define R8A7790_CLK_SCIFB0              6
+#define R8A7790_CLK_SCIFB1              7
+#define R8A7790_CLK_MSIOF1              8
+#define R8A7790_CLK_MSIOF3              15
+#define R8A7790_CLK_SCIFB2              16
+#define R8A7790_CLK_SYS_DMAC0           18
+#define R8A7790_CLK_SYS_DMAC1           19
+
+/* MSTP3 */
+#define R8A7790_CLK_TPU0                4
+#define R8A7790_CLK_MMCIF1              5
+#define R8A7790_CLK_SDHI3               11
+#define R8A7790_CLK_SDHI2               12
+#define R8A7790_CLK_SDHI1               13
+#define R8A7790_CLK_SDHI0               14
+#define R8A7790_CLK_MMCIF0              15
+#define R8A7790_CLK_SSUSB               28
+#define R8A7790_CLK_CMT1                29
+#define R8A7790_CLK_USBDMAC0            30
+#define R8A7790_CLK_USBDMAC1            31
+
+/* MSTP5 */
+#define R8A7790_CLK_THERMAL             22
+#define R8A7790_CLK_PWM                 23
+
+/* MSTP7 */
+#define R8A7790_CLK_EHCI                3
+#define R8A7790_CLK_HSUSB               4
+#define R8A7790_CLK_HSCIF1              16
+#define R8A7790_CLK_HSCIF0              17
+#define R8A7790_CLK_SCIF1               20
+#define R8A7790_CLK_SCIF0               21
+#define R8A7790_CLK_DU2                 22
+#define R8A7790_CLK_DU1                 23
+#define R8A7790_CLK_DU0                 24
+#define R8A7790_CLK_LVDS1               25
+#define R8A7790_CLK_LVDS0               26
+
+/* MSTP8 */
+#define R8A7790_CLK_VIN3                8
+#define R8A7790_CLK_VIN2                9
+#define R8A7790_CLK_VIN1                10
+#define R8A7790_CLK_VIN0                11
+#define R8A7790_CLK_ETHER               13
+#define R8A7790_CLK_SATA1               14
+#define R8A7790_CLK_SATA0               15
+
+/* MSTP9 */
+#define R8A7790_CLK_GPIO5               7
+#define R8A7790_CLK_GPIO4               8
+#define R8A7790_CLK_GPIO3               9
+#define R8A7790_CLK_GPIO2               10
+#define R8A7790_CLK_GPIO1               11
+#define R8A7790_CLK_GPIO0               12
+#define R8A7790_CLK_RCAN1               15
+#define R8A7790_CLK_RCAN0               16
+#define R8A7790_CLK_QSPI_MOD            17
+#define R8A7790_CLK_IICDVFS             26
+#define R8A7790_CLK_I2C3                28
+#define R8A7790_CLK_I2C2                29
+#define R8A7790_CLK_I2C1                30
+#define R8A7790_CLK_I2C0                31
+
+/* MSTP10 */
+#define R8A7790_CLK_SSI                 5
+#define R8A7790_CLK_SSI9                6
+#define R8A7790_CLK_SSI8                7
+#define R8A7790_CLK_SSI7                8
+#define R8A7790_CLK_SSI6                9
+#define R8A7790_CLK_SSI5                10
+#define R8A7790_CLK_SSI4                11
+#define R8A7790_CLK_SSI3                12
+#define R8A7790_CLK_SSI2                13
+#define R8A7790_CLK_SSI1                14
+#define R8A7790_CLK_SSI0                15
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
new file mode 100644
index 000000000000..1c8f00d0d88b
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -0,0 +1,124 @@
+/*
+ * Copyright 2013 Ideas On Board SPRL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
+#define __DT_BINDINGS_CLOCK_R8A7791_H__
+
+/* CPG */
+#define R8A7791_CLK_MAIN                0
+#define R8A7791_CLK_PLL0                1
+#define R8A7791_CLK_PLL1                2
+#define R8A7791_CLK_PLL3                3
+#define R8A7791_CLK_LB                  4
+#define R8A7791_CLK_QSPI                5
+#define R8A7791_CLK_SDH                 6
+#define R8A7791_CLK_SD0                 7
+#define R8A7791_CLK_Z                   8
+
+/* MSTP0 */
+#define R8A7791_CLK_MSIOF0              0
+
+/* MSTP1 */
+#define R8A7791_CLK_TMU1                11
+#define R8A7791_CLK_TMU3                21
+#define R8A7791_CLK_TMU2                22
+#define R8A7791_CLK_CMT0                24
+#define R8A7791_CLK_TMU0                25
+#define R8A7791_CLK_VSP1_DU1            27
+#define R8A7791_CLK_VSP1_DU0            28
+#define R8A7791_CLK_VSP1_SY             31
+
+/* MSTP2 */
+#define R8A7791_CLK_SCIFA2              2
+#define R8A7791_CLK_SCIFA1              3
+#define R8A7791_CLK_SCIFA0              4
+#define R8A7791_CLK_MSIOF2              5
+#define R8A7791_CLK_SCIFB0              6
+#define R8A7791_CLK_SCIFB1              7
+#define R8A7791_CLK_MSIOF1              8
+#define R8A7791_CLK_SCIFB2              16
+#define R8A7791_CLK_DMAC                18
+
+/* MSTP3 */
+#define R8A7791_CLK_TPU0                4
+#define R8A7791_CLK_SDHI2               11
+#define R8A7791_CLK_SDHI1               12
+#define R8A7791_CLK_SDHI0               14
+#define R8A7791_CLK_MMCIF0              15
+#define R8A7791_CLK_SSUSB               28
+#define R8A7791_CLK_CMT1                29
+#define R8A7791_CLK_USBDMAC0            30
+#define R8A7791_CLK_USBDMAC1            31
+
+/* MSTP5 */
+#define R8A7791_CLK_THERMAL             22
+#define R8A7791_CLK_PWM                 23
+
+/* MSTP7 */
+#define R8A7791_CLK_HSUSB               4
+#define R8A7791_CLK_HSCIF2              13
+#define R8A7791_CLK_SCIF5               14
+#define R8A7791_CLK_SCIF4               15
+#define R8A7791_CLK_HSCIF1              16
+#define R8A7791_CLK_HSCIF0              17
+#define R8A7791_CLK_SCIF3               18
+#define R8A7791_CLK_SCIF2               19
+#define R8A7791_CLK_SCIF1               20
+#define R8A7791_CLK_SCIF0               21
+#define R8A7791_CLK_DU1                 23
+#define R8A7791_CLK_DU0                 24
+#define R8A7791_CLK_LVDS0               26
+
+/* MSTP8 */
+#define R8A7791_CLK_VIN2                9
+#define R8A7791_CLK_VIN1                10
+#define R8A7791_CLK_VIN0                11
+#define R8A7791_CLK_ETHER               13
+#define R8A7791_CLK_SATA1               14
+#define R8A7791_CLK_SATA0               15
+
+/* MSTP9 */
+#define R8A7791_CLK_GPIO7               4
+#define R8A7791_CLK_GPIO6               5
+#define R8A7791_CLK_GPIO5               7
+#define R8A7791_CLK_GPIO4               8
+#define R8A7791_CLK_GPIO3               9
+#define R8A7791_CLK_GPIO2               10
+#define R8A7791_CLK_GPIO1               11
+#define R8A7791_CLK_GPIO0               12
+#define R8A7791_CLK_RCAN1               15
+#define R8A7791_CLK_RCAN0               16
+#define R8A7791_CLK_QSPI_MOD            17
+#define R8A7791_CLK_I2C5                25
+#define R8A7791_CLK_IICDVFS             26
+#define R8A7791_CLK_I2C4                27
+#define R8A7791_CLK_I2C3                28
+#define R8A7791_CLK_I2C2                29
+#define R8A7791_CLK_I2C1                30
+#define R8A7791_CLK_I2C0                31
+
+/* MSTP10 */
+#define R8A7791_CLK_SSI                 5
+#define R8A7791_CLK_SSI9                6
+#define R8A7791_CLK_SSI8                7
+#define R8A7791_CLK_SSI7                8
+#define R8A7791_CLK_SSI6                9
+#define R8A7791_CLK_SSI5                10
+#define R8A7791_CLK_SSI4                11
+#define R8A7791_CLK_SSI3                12
+#define R8A7791_CLK_SSI2                13
+#define R8A7791_CLK_SSI1                14
+#define R8A7791_CLK_SSI0                15
+
+/* MSTP11 */
+#define R8A7791_CLK_SCIFA3              6
+#define R8A7791_CLK_SCIFA4              7
+#define R8A7791_CLK_SCIFA5              8
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */