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authorMaxime COQUELIN <maxime.coquelin@st.com>2015-01-09 10:11:00 -0500
committerMaxime Coquelin <maxime.coquelin@st.com>2015-01-16 05:57:48 -0500
commit63f3171d5e5c6f826f8be4dcfa943212cb119eaf (patch)
treec402cdbdc05adac2846be43fb9c3bb60a9df671f /include/dt-bindings/clock
parent956b42d1998a77ad5168b9476fa86e831fd17ac3 (diff)
ARM: dts: Add STiH418 SoC support
The STiH418 is advanced UHD 60fps AVC processor with 3D graphic acceleration and quad-core ARM Cortex A9 CPU. Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/stih418-clks.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/stih418-clks.h b/include/dt-bindings/clock/stih418-clks.h
new file mode 100644
index 000000000000..b62aa0b20217
--- /dev/null
+++ b/include/dt-bindings/clock/stih418-clks.h
@@ -0,0 +1,34 @@
1/*
2 * This header provides constants clk index STMicroelectronics
3 * STiH418 SoC.
4 */
5#ifndef _DT_BINDINGS_CLK_STIH418
6#define _DT_BINDINGS_CLK_STIH418
7
8#include "stih410-clks.h"
9
10/* STiH418 introduces new clock outputs compared to STiH410 */
11
12/* CLOCKGEN C0 */
13#define CLK_PROC_BDISP_0 14
14#define CLK_PROC_BDISP_1 15
15#define CLK_TX_ICN_1 23
16#define CLK_ETH_PHYREF 27
17#define CLK_PP_HEVC 35
18#define CLK_CLUST_HEVC 36
19#define CLK_HWPE_HEVC 37
20#define CLK_FC_HEVC 38
21#define CLK_PROC_MIXER 39
22#define CLK_PROC_SC 40
23#define CLK_AVSP_HEVC 41
24
25/* CLOCKGEN D2 */
26#undef CLK_PIX_PIP
27#undef CLK_PIX_GDP1
28#undef CLK_PIX_GDP2
29#undef CLK_PIX_GDP3
30#undef CLK_PIX_GDP4
31
32#define CLK_TMDS_HDMI_DIV2 5
33#define CLK_VP9 47
34#endif