diff options
author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-12-19 10:51:01 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2013-12-24 09:01:11 -0500 |
commit | 9d90951a39205206a46609055717af9bfb436e4d (patch) | |
tree | 43852ba3da9228b6da09cc59da93131e346933cf /include/dt-bindings/clock/r8a7790-clock.h | |
parent | 82f7c2065a363cd3c0c84d3c9b59ee47897c5ebb (diff) |
ARM: shmobile: r8a7790: Add MSIOF clocks in device tree
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'include/dt-bindings/clock/r8a7790-clock.h')
-rw-r--r-- | include/dt-bindings/clock/r8a7790-clock.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 420f0b00ae1e..bbabb8e80113 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h | |||
@@ -22,6 +22,9 @@ | |||
22 | #define R8A7790_CLK_SD1 8 | 22 | #define R8A7790_CLK_SD1 8 |
23 | #define R8A7790_CLK_Z 9 | 23 | #define R8A7790_CLK_Z 9 |
24 | 24 | ||
25 | /* MSTP0 */ | ||
26 | #define R8A7790_CLK_MSIOF0 0 | ||
27 | |||
25 | /* MSTP1 */ | 28 | /* MSTP1 */ |
26 | #define R8A7790_CLK_TMU1 11 | 29 | #define R8A7790_CLK_TMU1 11 |
27 | #define R8A7790_CLK_TMU3 21 | 30 | #define R8A7790_CLK_TMU3 21 |
@@ -37,8 +40,11 @@ | |||
37 | #define R8A7790_CLK_SCIFA2 2 | 40 | #define R8A7790_CLK_SCIFA2 2 |
38 | #define R8A7790_CLK_SCIFA1 3 | 41 | #define R8A7790_CLK_SCIFA1 3 |
39 | #define R8A7790_CLK_SCIFA0 4 | 42 | #define R8A7790_CLK_SCIFA0 4 |
43 | #define R8A7790_CLK_MSIOF2 5 | ||
40 | #define R8A7790_CLK_SCIFB0 6 | 44 | #define R8A7790_CLK_SCIFB0 6 |
41 | #define R8A7790_CLK_SCIFB1 7 | 45 | #define R8A7790_CLK_SCIFB1 7 |
46 | #define R8A7790_CLK_MSIOF1 8 | ||
47 | #define R8A7790_CLK_MSIOF3 15 | ||
42 | #define R8A7790_CLK_SCIFB2 16 | 48 | #define R8A7790_CLK_SCIFB2 16 |
43 | #define R8A7790_CLK_SYS_DMAC0 18 | 49 | #define R8A7790_CLK_SYS_DMAC0 18 |
44 | #define R8A7790_CLK_SYS_DMAC1 19 | 50 | #define R8A7790_CLK_SYS_DMAC1 19 |