diff options
author | Damien Lespiau <damien.lespiau@intel.com> | 2015-01-29 09:13:38 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-13 17:28:02 -0500 |
commit | bf2b8a515530ee7e3b25214d7ec52c6827f12d70 (patch) | |
tree | 55e101c948dbe83cf1c00601660c603a0fc7685d /include/drm | |
parent | 94dd5138c5ed02d26982d9704e8c1e9d72e20b40 (diff) |
drm/i915/skl: Split the SKL PCI ids by GT
We need to have a separate GT3 struct intel_device_info to declare they
have a second VCS. Let's start by splitting the PCI ids per-GT.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/drm')
-rw-r--r-- | include/drm/i915_pciids.h | 28 |
1 files changed, 19 insertions, 9 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 180ad0e6de21..38a7c8049e47 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h | |||
@@ -259,21 +259,31 @@ | |||
259 | INTEL_VGA_DEVICE(0x22b2, info), \ | 259 | INTEL_VGA_DEVICE(0x22b2, info), \ |
260 | INTEL_VGA_DEVICE(0x22b3, info) | 260 | INTEL_VGA_DEVICE(0x22b3, info) |
261 | 261 | ||
262 | #define INTEL_SKL_IDS(info) \ | 262 | #define INTEL_SKL_GT1_IDS(info) \ |
263 | INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ | ||
264 | INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \ | 263 | INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \ |
265 | INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \ | ||
266 | INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \ | ||
267 | INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \ | 264 | INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \ |
265 | INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ | ||
266 | INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ | ||
267 | INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */ | ||
268 | |||
269 | #define INTEL_SKL_GT2_IDS(info) \ | ||
270 | INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ | ||
271 | INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \ | ||
268 | INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \ | 272 | INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \ |
269 | INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \ | 273 | INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \ |
270 | INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ | ||
271 | INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ | 274 | INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ |
272 | INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ | ||
273 | INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ | ||
274 | INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \ | 275 | INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \ |
275 | INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \ | ||
276 | INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \ | ||
277 | INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ | 276 | INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ |
278 | 277 | ||
278 | #define INTEL_SKL_GT3_IDS(info) \ | ||
279 | INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \ | ||
280 | INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ | ||
281 | INTEL_VGA_DEVICE(0x192A, info) /* SRV GT3 */ \ | ||
282 | |||
283 | #define INTEL_SKL_IDS(info) \ | ||
284 | INTEL_SKL_GT1_IDS(info), \ | ||
285 | INTEL_SKL_GT2_IDS(info), \ | ||
286 | INTEL_SKL_GT3_IDS(info) | ||
287 | |||
288 | |||
279 | #endif /* _I915_PCIIDS_H */ | 289 | #endif /* _I915_PCIIDS_H */ |