Merge tag 'drm-intel-next-2015-02-14' of git://anongit.freedesktop.org/drm-intel into drm-next

- use the atomic helpers for plane_upate/disable hooks (Matt Roper)
- refactor the initial plane config code (Damien)
- ppgtt prep patches for dynamic pagetable alloc (Ben Widawsky, reworked and
  rebased by a lot of other people)
- framebuffer modifier support from Tvrtko Ursulin, drm core code from Rob Clark
- piles of workaround patches for skl from Damien and Nick Hoath
- vGPU support for xengt on the client side (Yu Zhang)
- and the usual smaller things all over

* tag 'drm-intel-next-2015-02-14' of git://anongit.freedesktop.org/drm-intel: (88 commits)
  drm/i915: Update DRIVER_DATE to 20150214
  drm/i915: Remove references to previously removed UMS config option
  drm/i915/skl: Use a LRI for WaDisableDgMirrorFixInHalfSliceChicken5
  drm/i915/skl: Fix always true comparison in a revision id check
  drm/i915/skl: Implement WaEnableLbsSlaRetryTimerDecrement
  drm/i915/skl: Implement WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken
  drm/i915: Add process identifier to requests
  drm/i915/skl: Implement WaBarrierPerformanceFixDisable
  drm/i915/skl: Implement WaCcsTlbPrefetchDisable:skl
  drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS
  drm/i915/skl: Implement WaDisableHDCInvalidation
  drm/i915/skl: Implement WaDisableLSQCROPERFforOCL
  drm/i915/skl: Implement WaDisablePartialResolveInVc
  drm/i915/skl: Introduce a SKL specific init_workarounds()
  drm/i915/skl: Document that we implement WaRsClearFWBitsAtReset
  drm/i915/skl: Implement WaSetGAPSunitClckGateDisable
  drm/i915/skl: Make the init clock gating function skylake specific
  drm/i915/skl: Provide a gen9 specific init_render_ring()
  drm/i915/skl: Document the WM read latency W/A with its name
  drm/i915/skl: Also detect eDRAM on SKL
  ...

2 files changed, 23 insertions, 9 deletions

diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 920e21a8f3fd..b1465d6fbe94 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -202,6 +202,7 @@ struct drm_framebuffer {
         const struct drm_framebuffer_funcs *funcs;
         unsigned int pitches[4];
         unsigned int offsets[4];
+        uint64_t modifier[4];
         unsigned int width;
         unsigned int height;
         /* depth can be 15 or 16 */
@@ -1155,6 +1156,9 @@ struct drm_mode_config {
         /* whether async page flip is supported or not */
         bool async_page_flip;
 
+        /* whether the driver supports fb modifiers */
+        bool allow_fb_modifiers;
+
         /* cursor size */
         uint32_t cursor_width, cursor_height;
 };
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 180ad0e6de21..38a7c8049e47 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -259,21 +259,31 @@
         INTEL_VGA_DEVICE(0x22b2, info), \
         INTEL_VGA_DEVICE(0x22b3, info)
 
-#define INTEL_SKL_IDS(info) \
-        INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
+#define INTEL_SKL_GT1_IDS(info) \
         INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
-        INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
-        INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
         INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
+        INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
+        INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
+        INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
+
+#define INTEL_SKL_GT2_IDS(info) \
+        INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
+        INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
         INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \
         INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
-        INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
         INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
-        INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
-        INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
         INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
-        INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
-        INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
         INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
 
+#define INTEL_SKL_GT3_IDS(info) \
+        INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
+        INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
+        INTEL_VGA_DEVICE(0x192A, info) /* SRV GT3 */ \
+
+#define INTEL_SKL_IDS(info) \
+        INTEL_SKL_GT1_IDS(info), \
+        INTEL_SKL_GT2_IDS(info), \
+        INTEL_SKL_GT3_IDS(info)
+
+
 #endif /* _I915_PCIIDS_H */