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authorRodrigo Vivi <rodrigo.vivi@intel.com>2015-01-21 14:46:32 -0500
committerJani Nikula <jani.nikula@intel.com>2015-02-23 04:31:18 -0500
commit0dc6f20b9803f09726bbb682649d35cda8ef5b5d (patch)
treeca4b6766af416abbcb3b31b7fd5ff49115284dbf /include/drm
parentc517d838eb7d07bbe9507871fab3931deccff539 (diff)
drm/i915/bdw: PCI IDs ending in 0xb are ULT.
When reviewing patch that fixes VGA on BDW Halo Jani noticed that we also had other ULT IDs that weren't listed there. So this follow-up patch add these pci-ids as halo and fix comments on i915_pciids.h Cc: Jani Nikula <jani.nikula@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/i915_pciids.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 180ad0e6de21..d016dc57f007 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -214,9 +214,9 @@
214 INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) 214 INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
215 215
216#define _INTEL_BDW_M_IDS(gt, info) \ 216#define _INTEL_BDW_M_IDS(gt, info) \
217 _INTEL_BDW_M(gt, 0x1602, info), /* ULT */ \ 217 _INTEL_BDW_M(gt, 0x1602, info), /* Halo */ \
218 _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \ 218 _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \
219 _INTEL_BDW_M(gt, 0x160B, info), /* Iris */ \ 219 _INTEL_BDW_M(gt, 0x160B, info), /* ULT */ \
220 _INTEL_BDW_M(gt, 0x160E, info) /* ULX */ 220 _INTEL_BDW_M(gt, 0x160E, info) /* ULX */
221 221
222#define _INTEL_BDW_D_IDS(gt, info) \ 222#define _INTEL_BDW_D_IDS(gt, info) \