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authorDave Airlie <airlied@redhat.com>2011-08-04 09:22:24 -0400
committerDave Airlie <airlied@redhat.com>2011-08-04 09:22:24 -0400
commit0b576372e86c8e6bee01506651b21ec0fe8a1698 (patch)
treeed86064dad2db36348ab9c8305a910fe5cc48cec /include/drm
parentc41b9ee901bb2c7e3eacfa7e171de50c15d61c0b (diff)
parent07b7ddd9b7f17a567e3ac2b33a4dffcb2a4524e0 (diff)
Merge branch 'drm-intel-next' of ssh://master.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6 into drm-fixes
* 'drm-intel-next' of ssh://master.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6: (42 commits) drm/i915: allow cache sharing policy control drm/i915/hdmi: HDMI source product description infoframe support drm/i915/hdmi: split infoframe setting from infoframe type code drm: track CEA version number if present drm/i915: Try enabling RC6 by default (again) Revert "drm/i915/dp: Zero the DPCD data before connection probe" drm/i915/dp: wait for previous AUX channel activity to clear drm/i915: don't use uninitialized EDID bpc values when picking pipe bpp drm/i915/pch: Save/restore PCH_PORT_HOTPLUG across suspend drm/i915: apply phase pointer override on SNB+ too drm/i915: Add quirk to disable SSC on Sony Vaio Y2 drm/i915: provide more error output when mode sets fail drm/i915: add GPU max frequency control file i915: add Dell OptiPlex FX170 to intel_no_lvds drm/i915: Ignore GPU wedged errors while pinning scanout buffers drm/i915/hdmi: send AVI info frames on ILK+ as well drm/i915: fix CB tuning check for ILK+ drm/i915: Flush other plane register writes drm/i915: flush plane control changes on ILK+ as well drm/i915: apply timing generator bug workaround on CPT and PPT ...
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/drm_crtc.h2
-rw-r--r--include/drm/i915_drm.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 33d12f87f0e0..d515bc8f4ba7 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -205,6 +205,8 @@ struct drm_display_info {
205 enum subpixel_order subpixel_order; 205 enum subpixel_order subpixel_order;
206 u32 color_formats; 206 u32 color_formats;
207 207
208 u8 cea_rev;
209
208 char *raw_edid; /* if any */ 210 char *raw_edid; /* if any */
209}; 211};
210 212
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index c4d6dbfa3ff4..28c0d114cb52 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -237,7 +237,7 @@ typedef struct _drm_i915_sarea {
237#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture) 237#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture)
238#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_i915_get_pipe_from_crtc_id) 238#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_i915_get_pipe_from_crtc_id)
239#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise) 239#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise)
240#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_IOCTL_I915_OVERLAY_ATTRS, struct drm_intel_overlay_put_image) 240#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image)
241#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) 241#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
242 242
243/* Allow drivers to submit batchbuffers directly to hardware, relying 243/* Allow drivers to submit batchbuffers directly to hardware, relying