diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-20 16:22:50 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-20 16:23:01 -0400 |
commit | 9301975ec251bab1ad7cfcb84a688b26187e4e4a (patch) | |
tree | 91e48be0bdc67cbcb75bc8a299a3dcf168e0a814 /include/asm-x86 | |
parent | 7110879cf2afbfb7af79675f5ff109e63d631c25 (diff) | |
parent | dd3a1db900f2a215a7d7dd71b836e149a6cf5fed (diff) |
Merge branch 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
This merges branches irq/genirq, irq/sparseirq-v4, timers/hpet-percpu
and x86/uv.
The sparseirq branch is just preliminary groundwork: no sparse IRQs are
actually implemented by this tree anymore - just the new APIs are added
while keeping the old way intact as well (the new APIs map 1:1 to
irq_desc[]). The 'real' sparse IRQ support will then be a relatively
small patch ontop of this - with a v2.6.29 merge target.
* 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (178 commits)
genirq: improve include files
intr_remapping: fix typo
io_apic: make irq_mis_count available on 64-bit too
genirq: fix name space collisions of nr_irqs in arch/*
genirq: fix name space collision of nr_irqs in autoprobe.c
genirq: use iterators for irq_desc loops
proc: fixup irq iterator
genirq: add reverse iterator for irq_desc
x86: move ack_bad_irq() to irq.c
x86: unify show_interrupts() and proc helpers
x86: cleanup show_interrupts
genirq: cleanup the sparseirq modifications
genirq: remove artifacts from sparseirq removal
genirq: revert dynarray
genirq: remove irq_to_desc_alloc
genirq: remove sparse irq code
genirq: use inline function for irq_to_desc
genirq: consolidate nr_irqs and for_each_irq_desc()
x86: remove sparse irq from Kconfig
genirq: define nr_irqs for architectures with GENERIC_HARDIRQS=n
...
Diffstat (limited to 'include/asm-x86')
-rw-r--r-- | include/asm-x86/apic.h | 16 | ||||
-rw-r--r-- | include/asm-x86/bigsmp/apic.h | 15 | ||||
-rw-r--r-- | include/asm-x86/efi.h | 13 | ||||
-rw-r--r-- | include/asm-x86/es7000/apic.h | 3 | ||||
-rw-r--r-- | include/asm-x86/genapic_32.h | 2 | ||||
-rw-r--r-- | include/asm-x86/hpet.h | 21 | ||||
-rw-r--r-- | include/asm-x86/hw_irq.h | 13 | ||||
-rw-r--r-- | include/asm-x86/io_apic.h | 24 | ||||
-rw-r--r-- | include/asm-x86/irq_vectors.h | 24 | ||||
-rw-r--r-- | include/asm-x86/mach-default/entry_arch.h | 1 | ||||
-rw-r--r-- | include/asm-x86/mach-default/mach_apic.h | 15 | ||||
-rw-r--r-- | include/asm-x86/mach-generic/irq_vectors_limits.h | 14 | ||||
-rw-r--r-- | include/asm-x86/mach-generic/mach_apic.h | 1 | ||||
-rw-r--r-- | include/asm-x86/numaq/apic.h | 2 | ||||
-rw-r--r-- | include/asm-x86/summit/apic.h | 1 | ||||
-rw-r--r-- | include/asm-x86/summit/irq_vectors_limits.h | 14 | ||||
-rw-r--r-- | include/asm-x86/uv/bios.h | 94 | ||||
-rw-r--r-- | include/asm-x86/uv/uv_irq.h | 36 |
18 files changed, 183 insertions, 126 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h index d76a0839abe9..ef1d72dbdfe0 100644 --- a/include/asm-x86/apic.h +++ b/include/asm-x86/apic.h | |||
@@ -40,8 +40,6 @@ extern void generic_apic_probe(void); | |||
40 | extern unsigned int apic_verbosity; | 40 | extern unsigned int apic_verbosity; |
41 | extern int local_apic_timer_c2_ok; | 41 | extern int local_apic_timer_c2_ok; |
42 | 42 | ||
43 | extern int ioapic_force; | ||
44 | |||
45 | extern int disable_apic; | 43 | extern int disable_apic; |
46 | /* | 44 | /* |
47 | * Basic functions accessing APICs. | 45 | * Basic functions accessing APICs. |
@@ -100,6 +98,20 @@ extern void check_x2apic(void); | |||
100 | extern void enable_x2apic(void); | 98 | extern void enable_x2apic(void); |
101 | extern void enable_IR_x2apic(void); | 99 | extern void enable_IR_x2apic(void); |
102 | extern void x2apic_icr_write(u32 low, u32 id); | 100 | extern void x2apic_icr_write(u32 low, u32 id); |
101 | static inline int x2apic_enabled(void) | ||
102 | { | ||
103 | int msr, msr2; | ||
104 | |||
105 | if (!cpu_has_x2apic) | ||
106 | return 0; | ||
107 | |||
108 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | ||
109 | if (msr & X2APIC_ENABLE) | ||
110 | return 1; | ||
111 | return 0; | ||
112 | } | ||
113 | #else | ||
114 | #define x2apic_enabled() 0 | ||
103 | #endif | 115 | #endif |
104 | 116 | ||
105 | struct apic_ops { | 117 | struct apic_ops { |
diff --git a/include/asm-x86/bigsmp/apic.h b/include/asm-x86/bigsmp/apic.h index 0a9cd7c5ca0c..1d9543b9d358 100644 --- a/include/asm-x86/bigsmp/apic.h +++ b/include/asm-x86/bigsmp/apic.h | |||
@@ -9,22 +9,17 @@ static inline int apic_id_registered(void) | |||
9 | return (1); | 9 | return (1); |
10 | } | 10 | } |
11 | 11 | ||
12 | /* Round robin the irqs amoung the online cpus */ | ||
13 | static inline cpumask_t target_cpus(void) | 12 | static inline cpumask_t target_cpus(void) |
14 | { | 13 | { |
15 | static unsigned long cpu = NR_CPUS; | 14 | #ifdef CONFIG_SMP |
16 | do { | 15 | return cpu_online_map; |
17 | if (cpu >= NR_CPUS) | 16 | #else |
18 | cpu = first_cpu(cpu_online_map); | 17 | return cpumask_of_cpu(0); |
19 | else | 18 | #endif |
20 | cpu = next_cpu(cpu, cpu_online_map); | ||
21 | } while (cpu >= NR_CPUS); | ||
22 | return cpumask_of_cpu(cpu); | ||
23 | } | 19 | } |
24 | 20 | ||
25 | #undef APIC_DEST_LOGICAL | 21 | #undef APIC_DEST_LOGICAL |
26 | #define APIC_DEST_LOGICAL 0 | 22 | #define APIC_DEST_LOGICAL 0 |
27 | #define TARGET_CPUS (target_cpus()) | ||
28 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | 23 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) |
29 | #define INT_DELIVERY_MODE (dest_Fixed) | 24 | #define INT_DELIVERY_MODE (dest_Fixed) |
30 | #define INT_DEST_MODE (0) /* phys delivery to target proc */ | 25 | #define INT_DEST_MODE (0) /* phys delivery to target proc */ |
diff --git a/include/asm-x86/efi.h b/include/asm-x86/efi.h index ed2de22e8705..313438e63348 100644 --- a/include/asm-x86/efi.h +++ b/include/asm-x86/efi.h | |||
@@ -94,4 +94,17 @@ extern void efi_reserve_early(void); | |||
94 | extern void efi_call_phys_prelog(void); | 94 | extern void efi_call_phys_prelog(void); |
95 | extern void efi_call_phys_epilog(void); | 95 | extern void efi_call_phys_epilog(void); |
96 | 96 | ||
97 | #ifndef CONFIG_EFI | ||
98 | /* | ||
99 | * IF EFI is not configured, have the EFI calls return -ENOSYS. | ||
100 | */ | ||
101 | #define efi_call0(_f) (-ENOSYS) | ||
102 | #define efi_call1(_f, _a1) (-ENOSYS) | ||
103 | #define efi_call2(_f, _a1, _a2) (-ENOSYS) | ||
104 | #define efi_call3(_f, _a1, _a2, _a3) (-ENOSYS) | ||
105 | #define efi_call4(_f, _a1, _a2, _a3, _a4) (-ENOSYS) | ||
106 | #define efi_call5(_f, _a1, _a2, _a3, _a4, _a5) (-ENOSYS) | ||
107 | #define efi_call6(_f, _a1, _a2, _a3, _a4, _a5, _a6) (-ENOSYS) | ||
108 | #endif /* CONFIG_EFI */ | ||
109 | |||
97 | #endif /* ASM_X86__EFI_H */ | 110 | #endif /* ASM_X86__EFI_H */ |
diff --git a/include/asm-x86/es7000/apic.h b/include/asm-x86/es7000/apic.h index aae50c2fb303..380f0b4f17ed 100644 --- a/include/asm-x86/es7000/apic.h +++ b/include/asm-x86/es7000/apic.h | |||
@@ -17,7 +17,6 @@ static inline cpumask_t target_cpus(void) | |||
17 | return cpumask_of_cpu(smp_processor_id()); | 17 | return cpumask_of_cpu(smp_processor_id()); |
18 | #endif | 18 | #endif |
19 | } | 19 | } |
20 | #define TARGET_CPUS (target_cpus()) | ||
21 | 20 | ||
22 | #if defined CONFIG_ES7000_CLUSTERED_APIC | 21 | #if defined CONFIG_ES7000_CLUSTERED_APIC |
23 | #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) | 22 | #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) |
@@ -81,7 +80,7 @@ static inline void setup_apic_routing(void) | |||
81 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); | 80 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); |
82 | printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", | 81 | printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", |
83 | (apic_version[apic] == 0x14) ? | 82 | (apic_version[apic] == 0x14) ? |
84 | "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]); | 83 | "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(target_cpus())[0]); |
85 | } | 84 | } |
86 | 85 | ||
87 | static inline int multi_timer_check(int apic, int irq) | 86 | static inline int multi_timer_check(int apic, int irq) |
diff --git a/include/asm-x86/genapic_32.h b/include/asm-x86/genapic_32.h index 34280f027664..6fe4f81bfcf9 100644 --- a/include/asm-x86/genapic_32.h +++ b/include/asm-x86/genapic_32.h | |||
@@ -57,6 +57,7 @@ struct genapic { | |||
57 | unsigned (*get_apic_id)(unsigned long x); | 57 | unsigned (*get_apic_id)(unsigned long x); |
58 | unsigned long apic_id_mask; | 58 | unsigned long apic_id_mask; |
59 | unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask); | 59 | unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask); |
60 | cpumask_t (*vector_allocation_domain)(int cpu); | ||
60 | 61 | ||
61 | #ifdef CONFIG_SMP | 62 | #ifdef CONFIG_SMP |
62 | /* ipi */ | 63 | /* ipi */ |
@@ -104,6 +105,7 @@ struct genapic { | |||
104 | APICFUNC(get_apic_id) \ | 105 | APICFUNC(get_apic_id) \ |
105 | .apic_id_mask = APIC_ID_MASK, \ | 106 | .apic_id_mask = APIC_ID_MASK, \ |
106 | APICFUNC(cpu_mask_to_apicid) \ | 107 | APICFUNC(cpu_mask_to_apicid) \ |
108 | APICFUNC(vector_allocation_domain) \ | ||
107 | APICFUNC(acpi_madt_oem_check) \ | 109 | APICFUNC(acpi_madt_oem_check) \ |
108 | IPIFUNC(send_IPI_mask) \ | 110 | IPIFUNC(send_IPI_mask) \ |
109 | IPIFUNC(send_IPI_allbutself) \ | 111 | IPIFUNC(send_IPI_allbutself) \ |
diff --git a/include/asm-x86/hpet.h b/include/asm-x86/hpet.h index cbbbb6d4dd32..58b273f6ef07 100644 --- a/include/asm-x86/hpet.h +++ b/include/asm-x86/hpet.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef ASM_X86__HPET_H | 1 | #ifndef ASM_X86__HPET_H |
2 | #define ASM_X86__HPET_H | 2 | #define ASM_X86__HPET_H |
3 | 3 | ||
4 | #include <linux/msi.h> | ||
5 | |||
4 | #ifdef CONFIG_HPET_TIMER | 6 | #ifdef CONFIG_HPET_TIMER |
5 | 7 | ||
6 | #define HPET_MMAP_SIZE 1024 | 8 | #define HPET_MMAP_SIZE 1024 |
@@ -10,6 +12,11 @@ | |||
10 | #define HPET_CFG 0x010 | 12 | #define HPET_CFG 0x010 |
11 | #define HPET_STATUS 0x020 | 13 | #define HPET_STATUS 0x020 |
12 | #define HPET_COUNTER 0x0f0 | 14 | #define HPET_COUNTER 0x0f0 |
15 | |||
16 | #define HPET_Tn_CFG(n) (0x100 + 0x20 * n) | ||
17 | #define HPET_Tn_CMP(n) (0x108 + 0x20 * n) | ||
18 | #define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n) | ||
19 | |||
13 | #define HPET_T0_CFG 0x100 | 20 | #define HPET_T0_CFG 0x100 |
14 | #define HPET_T0_CMP 0x108 | 21 | #define HPET_T0_CMP 0x108 |
15 | #define HPET_T0_ROUTE 0x110 | 22 | #define HPET_T0_ROUTE 0x110 |
@@ -65,6 +72,20 @@ extern void hpet_disable(void); | |||
65 | extern unsigned long hpet_readl(unsigned long a); | 72 | extern unsigned long hpet_readl(unsigned long a); |
66 | extern void force_hpet_resume(void); | 73 | extern void force_hpet_resume(void); |
67 | 74 | ||
75 | extern void hpet_msi_unmask(unsigned int irq); | ||
76 | extern void hpet_msi_mask(unsigned int irq); | ||
77 | extern void hpet_msi_write(unsigned int irq, struct msi_msg *msg); | ||
78 | extern void hpet_msi_read(unsigned int irq, struct msi_msg *msg); | ||
79 | |||
80 | #ifdef CONFIG_PCI_MSI | ||
81 | extern int arch_setup_hpet_msi(unsigned int irq); | ||
82 | #else | ||
83 | static inline int arch_setup_hpet_msi(unsigned int irq) | ||
84 | { | ||
85 | return -EINVAL; | ||
86 | } | ||
87 | #endif | ||
88 | |||
68 | #ifdef CONFIG_HPET_EMULATE_RTC | 89 | #ifdef CONFIG_HPET_EMULATE_RTC |
69 | 90 | ||
70 | #include <linux/interrupt.h> | 91 | #include <linux/interrupt.h> |
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h index 50f6e0316b50..749d042f0556 100644 --- a/include/asm-x86/hw_irq.h +++ b/include/asm-x86/hw_irq.h | |||
@@ -96,13 +96,8 @@ extern asmlinkage void qic_call_function_interrupt(void); | |||
96 | 96 | ||
97 | /* SMP */ | 97 | /* SMP */ |
98 | extern void smp_apic_timer_interrupt(struct pt_regs *); | 98 | extern void smp_apic_timer_interrupt(struct pt_regs *); |
99 | #ifdef CONFIG_X86_32 | ||
100 | extern void smp_spurious_interrupt(struct pt_regs *); | 99 | extern void smp_spurious_interrupt(struct pt_regs *); |
101 | extern void smp_error_interrupt(struct pt_regs *); | 100 | extern void smp_error_interrupt(struct pt_regs *); |
102 | #else | ||
103 | extern asmlinkage void smp_spurious_interrupt(void); | ||
104 | extern asmlinkage void smp_error_interrupt(void); | ||
105 | #endif | ||
106 | #ifdef CONFIG_X86_SMP | 101 | #ifdef CONFIG_X86_SMP |
107 | extern void smp_reschedule_interrupt(struct pt_regs *); | 102 | extern void smp_reschedule_interrupt(struct pt_regs *); |
108 | extern void smp_call_function_interrupt(struct pt_regs *); | 103 | extern void smp_call_function_interrupt(struct pt_regs *); |
@@ -115,13 +110,13 @@ extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *); | |||
115 | #endif | 110 | #endif |
116 | 111 | ||
117 | #ifdef CONFIG_X86_32 | 112 | #ifdef CONFIG_X86_32 |
118 | extern void (*const interrupt[NR_IRQS])(void); | 113 | extern void (*const interrupt[NR_VECTORS])(void); |
119 | #else | 114 | #endif |
115 | |||
120 | typedef int vector_irq_t[NR_VECTORS]; | 116 | typedef int vector_irq_t[NR_VECTORS]; |
121 | DECLARE_PER_CPU(vector_irq_t, vector_irq); | 117 | DECLARE_PER_CPU(vector_irq_t, vector_irq); |
122 | #endif | ||
123 | 118 | ||
124 | #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_X86_64) | 119 | #ifdef CONFIG_X86_IO_APIC |
125 | extern void lock_vector_lock(void); | 120 | extern void lock_vector_lock(void); |
126 | extern void unlock_vector_lock(void); | 121 | extern void unlock_vector_lock(void); |
127 | extern void __setup_vector_irq(int cpu); | 122 | extern void __setup_vector_irq(int cpu); |
diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h index 8ec68a50cf10..d35cbd7aa587 100644 --- a/include/asm-x86/io_apic.h +++ b/include/asm-x86/io_apic.h | |||
@@ -4,6 +4,7 @@ | |||
4 | #include <linux/types.h> | 4 | #include <linux/types.h> |
5 | #include <asm/mpspec.h> | 5 | #include <asm/mpspec.h> |
6 | #include <asm/apicdef.h> | 6 | #include <asm/apicdef.h> |
7 | #include <asm/irq_vectors.h> | ||
7 | 8 | ||
8 | /* | 9 | /* |
9 | * Intel IO-APIC support for SMP and UP systems. | 10 | * Intel IO-APIC support for SMP and UP systems. |
@@ -87,24 +88,8 @@ struct IO_APIC_route_entry { | |||
87 | mask : 1, /* 0: enabled, 1: disabled */ | 88 | mask : 1, /* 0: enabled, 1: disabled */ |
88 | __reserved_2 : 15; | 89 | __reserved_2 : 15; |
89 | 90 | ||
90 | #ifdef CONFIG_X86_32 | ||
91 | union { | ||
92 | struct { | ||
93 | __u32 __reserved_1 : 24, | ||
94 | physical_dest : 4, | ||
95 | __reserved_2 : 4; | ||
96 | } physical; | ||
97 | |||
98 | struct { | ||
99 | __u32 __reserved_1 : 24, | ||
100 | logical_dest : 8; | ||
101 | } logical; | ||
102 | } dest; | ||
103 | #else | ||
104 | __u32 __reserved_3 : 24, | 91 | __u32 __reserved_3 : 24, |
105 | dest : 8; | 92 | dest : 8; |
106 | #endif | ||
107 | |||
108 | } __attribute__ ((packed)); | 93 | } __attribute__ ((packed)); |
109 | 94 | ||
110 | struct IR_IO_APIC_route_entry { | 95 | struct IR_IO_APIC_route_entry { |
@@ -203,10 +188,17 @@ extern void restore_IO_APIC_setup(void); | |||
203 | extern void reinit_intr_remapped_IO_APIC(int); | 188 | extern void reinit_intr_remapped_IO_APIC(int); |
204 | #endif | 189 | #endif |
205 | 190 | ||
191 | extern int probe_nr_irqs(void); | ||
192 | |||
206 | #else /* !CONFIG_X86_IO_APIC */ | 193 | #else /* !CONFIG_X86_IO_APIC */ |
207 | #define io_apic_assign_pci_irqs 0 | 194 | #define io_apic_assign_pci_irqs 0 |
208 | static const int timer_through_8259 = 0; | 195 | static const int timer_through_8259 = 0; |
209 | static inline void ioapic_init_mappings(void) { } | 196 | static inline void ioapic_init_mappings(void) { } |
197 | |||
198 | static inline int probe_nr_irqs(void) | ||
199 | { | ||
200 | return NR_IRQS; | ||
201 | } | ||
210 | #endif | 202 | #endif |
211 | 203 | ||
212 | #endif /* ASM_X86__IO_APIC_H */ | 204 | #endif /* ASM_X86__IO_APIC_H */ |
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h index c5d2d767a1f3..a8d065d85f57 100644 --- a/include/asm-x86/irq_vectors.h +++ b/include/asm-x86/irq_vectors.h | |||
@@ -19,19 +19,14 @@ | |||
19 | 19 | ||
20 | /* | 20 | /* |
21 | * Reserve the lowest usable priority level 0x20 - 0x2f for triggering | 21 | * Reserve the lowest usable priority level 0x20 - 0x2f for triggering |
22 | * cleanup after irq migration on 64 bit. | 22 | * cleanup after irq migration. |
23 | */ | 23 | */ |
24 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR | 24 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR |
25 | 25 | ||
26 | /* | 26 | /* |
27 | * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit. | 27 | * Vectors 0x30-0x3f are used for ISA interrupts. |
28 | * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit. | ||
29 | */ | 28 | */ |
30 | #ifdef CONFIG_X86_32 | ||
31 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR) | ||
32 | #else | ||
33 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) | 29 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) |
34 | #endif | ||
35 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) | 30 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) |
36 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) | 31 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) |
37 | #define IRQ3_VECTOR (IRQ0_VECTOR + 3) | 32 | #define IRQ3_VECTOR (IRQ0_VECTOR + 3) |
@@ -96,11 +91,7 @@ | |||
96 | * start at 0x31(0x41) to spread out vectors evenly between priority | 91 | * start at 0x31(0x41) to spread out vectors evenly between priority |
97 | * levels. (0x80 is the syscall vector) | 92 | * levels. (0x80 is the syscall vector) |
98 | */ | 93 | */ |
99 | #ifdef CONFIG_X86_32 | 94 | #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) |
100 | # define FIRST_DEVICE_VECTOR 0x31 | ||
101 | #else | ||
102 | # define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) | ||
103 | #endif | ||
104 | 95 | ||
105 | #define NR_VECTORS 256 | 96 | #define NR_VECTORS 256 |
106 | 97 | ||
@@ -116,7 +107,6 @@ | |||
116 | # else | 107 | # else |
117 | # define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS)) | 108 | # define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS)) |
118 | # endif | 109 | # endif |
119 | # define NR_IRQ_VECTORS NR_IRQS | ||
120 | 110 | ||
121 | #elif !defined(CONFIG_X86_VOYAGER) | 111 | #elif !defined(CONFIG_X86_VOYAGER) |
122 | 112 | ||
@@ -124,23 +114,15 @@ | |||
124 | 114 | ||
125 | # define NR_IRQS 224 | 115 | # define NR_IRQS 224 |
126 | 116 | ||
127 | # if (224 >= 32 * NR_CPUS) | ||
128 | # define NR_IRQ_VECTORS NR_IRQS | ||
129 | # else | ||
130 | # define NR_IRQ_VECTORS (32 * NR_CPUS) | ||
131 | # endif | ||
132 | |||
133 | # else /* IO_APIC || PARAVIRT */ | 117 | # else /* IO_APIC || PARAVIRT */ |
134 | 118 | ||
135 | # define NR_IRQS 16 | 119 | # define NR_IRQS 16 |
136 | # define NR_IRQ_VECTORS NR_IRQS | ||
137 | 120 | ||
138 | # endif | 121 | # endif |
139 | 122 | ||
140 | #else /* !VISWS && !VOYAGER */ | 123 | #else /* !VISWS && !VOYAGER */ |
141 | 124 | ||
142 | # define NR_IRQS 224 | 125 | # define NR_IRQS 224 |
143 | # define NR_IRQ_VECTORS NR_IRQS | ||
144 | 126 | ||
145 | #endif /* VISWS */ | 127 | #endif /* VISWS */ |
146 | 128 | ||
diff --git a/include/asm-x86/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h index 9283b60a1dd2..6b1add8e31dd 100644 --- a/include/asm-x86/mach-default/entry_arch.h +++ b/include/asm-x86/mach-default/entry_arch.h | |||
@@ -14,6 +14,7 @@ BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) | |||
14 | BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) | 14 | BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) |
15 | BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) | 15 | BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) |
16 | BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR) | 16 | BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR) |
17 | BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR) | ||
17 | #endif | 18 | #endif |
18 | 19 | ||
19 | /* | 20 | /* |
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h index 2a330a41b3dd..3c66f2cdaec1 100644 --- a/include/asm-x86/mach-default/mach_apic.h +++ b/include/asm-x86/mach-default/mach_apic.h | |||
@@ -85,6 +85,20 @@ static inline int apicid_to_node(int logical_apicid) | |||
85 | return 0; | 85 | return 0; |
86 | #endif | 86 | #endif |
87 | } | 87 | } |
88 | |||
89 | static inline cpumask_t vector_allocation_domain(int cpu) | ||
90 | { | ||
91 | /* Careful. Some cpus do not strictly honor the set of cpus | ||
92 | * specified in the interrupt destination when using lowest | ||
93 | * priority interrupt delivery mode. | ||
94 | * | ||
95 | * In particular there was a hyperthreading cpu observed to | ||
96 | * deliver interrupts to the wrong hyperthread when only one | ||
97 | * hyperthread was specified in the interrupt desitination. | ||
98 | */ | ||
99 | cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; | ||
100 | return domain; | ||
101 | } | ||
88 | #endif | 102 | #endif |
89 | 103 | ||
90 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | 104 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
@@ -138,6 +152,5 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | |||
138 | static inline void enable_apic_mode(void) | 152 | static inline void enable_apic_mode(void) |
139 | { | 153 | { |
140 | } | 154 | } |
141 | |||
142 | #endif /* CONFIG_X86_LOCAL_APIC */ | 155 | #endif /* CONFIG_X86_LOCAL_APIC */ |
143 | #endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */ | 156 | #endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */ |
diff --git a/include/asm-x86/mach-generic/irq_vectors_limits.h b/include/asm-x86/mach-generic/irq_vectors_limits.h deleted file mode 100644 index f7870e1a220d..000000000000 --- a/include/asm-x86/mach-generic/irq_vectors_limits.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H | ||
2 | #define ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H | ||
3 | |||
4 | /* | ||
5 | * For Summit or generic (i.e. installer) kernels, we have lots of I/O APICs, | ||
6 | * even with uni-proc kernels, so use a big array. | ||
7 | * | ||
8 | * This value should be the same in both the generic and summit subarches. | ||
9 | * Change one, change 'em both. | ||
10 | */ | ||
11 | #define NR_IRQS 224 | ||
12 | #define NR_IRQ_VECTORS 1024 | ||
13 | |||
14 | #endif /* ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H */ | ||
diff --git a/include/asm-x86/mach-generic/mach_apic.h b/include/asm-x86/mach-generic/mach_apic.h index 5d010c6881dd..5085b52da301 100644 --- a/include/asm-x86/mach-generic/mach_apic.h +++ b/include/asm-x86/mach-generic/mach_apic.h | |||
@@ -24,6 +24,7 @@ | |||
24 | #define check_phys_apicid_present (genapic->check_phys_apicid_present) | 24 | #define check_phys_apicid_present (genapic->check_phys_apicid_present) |
25 | #define check_apicid_used (genapic->check_apicid_used) | 25 | #define check_apicid_used (genapic->check_apicid_used) |
26 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) | 26 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) |
27 | #define vector_allocation_domain (genapic->vector_allocation_domain) | ||
27 | #define enable_apic_mode (genapic->enable_apic_mode) | 28 | #define enable_apic_mode (genapic->enable_apic_mode) |
28 | #define phys_pkg_id (genapic->phys_pkg_id) | 29 | #define phys_pkg_id (genapic->phys_pkg_id) |
29 | 30 | ||
diff --git a/include/asm-x86/numaq/apic.h b/include/asm-x86/numaq/apic.h index a8344ba6ea15..0bf2a06b7a4e 100644 --- a/include/asm-x86/numaq/apic.h +++ b/include/asm-x86/numaq/apic.h | |||
@@ -12,8 +12,6 @@ static inline cpumask_t target_cpus(void) | |||
12 | return CPU_MASK_ALL; | 12 | return CPU_MASK_ALL; |
13 | } | 13 | } |
14 | 14 | ||
15 | #define TARGET_CPUS (target_cpus()) | ||
16 | |||
17 | #define NO_BALANCE_IRQ (1) | 15 | #define NO_BALANCE_IRQ (1) |
18 | #define esr_disable (1) | 16 | #define esr_disable (1) |
19 | 17 | ||
diff --git a/include/asm-x86/summit/apic.h b/include/asm-x86/summit/apic.h index 394b00bb5e72..9b3070f1c2ac 100644 --- a/include/asm-x86/summit/apic.h +++ b/include/asm-x86/summit/apic.h | |||
@@ -22,7 +22,6 @@ static inline cpumask_t target_cpus(void) | |||
22 | */ | 22 | */ |
23 | return cpumask_of_cpu(0); | 23 | return cpumask_of_cpu(0); |
24 | } | 24 | } |
25 | #define TARGET_CPUS (target_cpus()) | ||
26 | 25 | ||
27 | #define INT_DELIVERY_MODE (dest_LowestPrio) | 26 | #define INT_DELIVERY_MODE (dest_LowestPrio) |
28 | #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ | 27 | #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ |
diff --git a/include/asm-x86/summit/irq_vectors_limits.h b/include/asm-x86/summit/irq_vectors_limits.h deleted file mode 100644 index 890ce3f5e09a..000000000000 --- a/include/asm-x86/summit/irq_vectors_limits.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef _ASM_IRQ_VECTORS_LIMITS_H | ||
2 | #define _ASM_IRQ_VECTORS_LIMITS_H | ||
3 | |||
4 | /* | ||
5 | * For Summit or generic (i.e. installer) kernels, we have lots of I/O APICs, | ||
6 | * even with uni-proc kernels, so use a big array. | ||
7 | * | ||
8 | * This value should be the same in both the generic and summit subarches. | ||
9 | * Change one, change 'em both. | ||
10 | */ | ||
11 | #define NR_IRQS 224 | ||
12 | #define NR_IRQ_VECTORS 1024 | ||
13 | |||
14 | #endif /* _ASM_IRQ_VECTORS_LIMITS_H */ | ||
diff --git a/include/asm-x86/uv/bios.h b/include/asm-x86/uv/bios.h index 7cd6d7ec1308..215f1969c266 100644 --- a/include/asm-x86/uv/bios.h +++ b/include/asm-x86/uv/bios.h | |||
@@ -2,9 +2,7 @@ | |||
2 | #define ASM_X86__UV__BIOS_H | 2 | #define ASM_X86__UV__BIOS_H |
3 | 3 | ||
4 | /* | 4 | /* |
5 | * BIOS layer definitions. | 5 | * UV BIOS layer definitions. |
6 | * | ||
7 | * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved. | ||
8 | * | 6 | * |
9 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | 8 | * it under the terms of the GNU General Public License as published by |
@@ -19,50 +17,78 @@ | |||
19 | * You should have received a copy of the GNU General Public License | 17 | * You should have received a copy of the GNU General Public License |
20 | * along with this program; if not, write to the Free Software | 18 | * along with this program; if not, write to the Free Software |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
20 | * | ||
21 | * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved. | ||
22 | * Copyright (c) Russ Anderson | ||
22 | */ | 23 | */ |
23 | 24 | ||
24 | #include <linux/rtc.h> | 25 | #include <linux/rtc.h> |
25 | 26 | ||
26 | #define BIOS_FREQ_BASE 0x01000001 | 27 | /* |
28 | * Values for the BIOS calls. It is passed as the first * argument in the | ||
29 | * BIOS call. Passing any other value in the first argument will result | ||
30 | * in a BIOS_STATUS_UNIMPLEMENTED return status. | ||
31 | */ | ||
32 | enum uv_bios_cmd { | ||
33 | UV_BIOS_COMMON, | ||
34 | UV_BIOS_GET_SN_INFO, | ||
35 | UV_BIOS_FREQ_BASE | ||
36 | }; | ||
27 | 37 | ||
38 | /* | ||
39 | * Status values returned from a BIOS call. | ||
40 | */ | ||
28 | enum { | 41 | enum { |
29 | BIOS_FREQ_BASE_PLATFORM = 0, | 42 | BIOS_STATUS_SUCCESS = 0, |
30 | BIOS_FREQ_BASE_INTERVAL_TIMER = 1, | 43 | BIOS_STATUS_UNIMPLEMENTED = -ENOSYS, |
31 | BIOS_FREQ_BASE_REALTIME_CLOCK = 2 | 44 | BIOS_STATUS_EINVAL = -EINVAL, |
45 | BIOS_STATUS_UNAVAIL = -EBUSY | ||
32 | }; | 46 | }; |
33 | 47 | ||
34 | # define BIOS_CALL(result, a0, a1, a2, a3, a4, a5, a6, a7) \ | 48 | /* |
35 | do { \ | 49 | * The UV system table describes specific firmware |
36 | /* XXX - the real call goes here */ \ | 50 | * capabilities available to the Linux kernel at runtime. |
37 | result.status = BIOS_STATUS_UNIMPLEMENTED; \ | 51 | */ |
38 | isrv.v0 = 0; \ | 52 | struct uv_systab { |
39 | isrv.v1 = 0; \ | 53 | char signature[4]; /* must be "UVST" */ |
40 | } while (0) | 54 | u32 revision; /* distinguish different firmware revs */ |
55 | u64 function; /* BIOS runtime callback function ptr */ | ||
56 | }; | ||
41 | 57 | ||
42 | enum { | 58 | enum { |
43 | BIOS_STATUS_SUCCESS = 0, | 59 | BIOS_FREQ_BASE_PLATFORM = 0, |
44 | BIOS_STATUS_UNIMPLEMENTED = -1, | 60 | BIOS_FREQ_BASE_INTERVAL_TIMER = 1, |
45 | BIOS_STATUS_EINVAL = -2, | 61 | BIOS_FREQ_BASE_REALTIME_CLOCK = 2 |
46 | BIOS_STATUS_ERROR = -3 | ||
47 | }; | 62 | }; |
48 | 63 | ||
49 | struct uv_bios_retval { | 64 | union partition_info_u { |
50 | /* | 65 | u64 val; |
51 | * A zero status value indicates call completed without error. | 66 | struct { |
52 | * A negative status value indicates reason of call failure. | 67 | u64 hub_version : 8, |
53 | * A positive status value indicates success but an | 68 | partition_id : 16, |
54 | * informational value should be printed (e.g., "reboot for | 69 | coherence_id : 16, |
55 | * change to take effect"). | 70 | region_size : 24; |
56 | */ | 71 | }; |
57 | s64 status; | ||
58 | u64 v0; | ||
59 | u64 v1; | ||
60 | u64 v2; | ||
61 | }; | 72 | }; |
62 | 73 | ||
63 | extern long | 74 | /* |
64 | x86_bios_freq_base(unsigned long which, unsigned long *ticks_per_second, | 75 | * bios calls have 6 parameters |
65 | unsigned long *drift_info); | 76 | */ |
66 | extern const char *x86_bios_strerror(long status); | 77 | extern s64 uv_bios_call(enum uv_bios_cmd, u64, u64, u64, u64, u64); |
78 | extern s64 uv_bios_call_irqsave(enum uv_bios_cmd, u64, u64, u64, u64, u64); | ||
79 | extern s64 uv_bios_call_reentrant(enum uv_bios_cmd, u64, u64, u64, u64, u64); | ||
80 | |||
81 | extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *); | ||
82 | extern s64 uv_bios_freq_base(u64, u64 *); | ||
83 | |||
84 | extern void uv_bios_init(void); | ||
85 | |||
86 | extern int uv_type; | ||
87 | extern long sn_partition_id; | ||
88 | extern long uv_coherency_id; | ||
89 | extern long uv_region_size; | ||
90 | #define partition_coherence_id() (uv_coherency_id) | ||
91 | |||
92 | extern struct kobject *sgi_uv_kobj; /* /sys/firmware/sgi_uv */ | ||
67 | 93 | ||
68 | #endif /* ASM_X86__UV__BIOS_H */ | 94 | #endif /* ASM_X86__UV__BIOS_H */ |
diff --git a/include/asm-x86/uv/uv_irq.h b/include/asm-x86/uv/uv_irq.h new file mode 100644 index 000000000000..8bf5f32da9c6 --- /dev/null +++ b/include/asm-x86/uv/uv_irq.h | |||
@@ -0,0 +1,36 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * SGI UV IRQ definitions | ||
7 | * | ||
8 | * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. | ||
9 | */ | ||
10 | |||
11 | #ifndef ASM_X86__UV__UV_IRQ_H | ||
12 | #define ASM_X86__UV__UV_IRQ_H | ||
13 | |||
14 | /* If a generic version of this structure gets defined, eliminate this one. */ | ||
15 | struct uv_IO_APIC_route_entry { | ||
16 | __u64 vector : 8, | ||
17 | delivery_mode : 3, | ||
18 | dest_mode : 1, | ||
19 | delivery_status : 1, | ||
20 | polarity : 1, | ||
21 | __reserved_1 : 1, | ||
22 | trigger : 1, | ||
23 | mask : 1, | ||
24 | __reserved_2 : 15, | ||
25 | dest : 32; | ||
26 | }; | ||
27 | |||
28 | extern struct irq_chip uv_irq_chip; | ||
29 | |||
30 | extern int arch_enable_uv_irq(char *, unsigned int, int, int, unsigned long); | ||
31 | extern void arch_disable_uv_irq(int, unsigned long); | ||
32 | |||
33 | extern int uv_setup_irq(char *, int, int, unsigned long); | ||
34 | extern void uv_teardown_irq(unsigned int, int, unsigned long); | ||
35 | |||
36 | #endif /* ASM_X86__UV__UV_IRQ_H */ | ||