x86: make 32bit support per_cpu vector

so we can merge io_apic_32.c and io_apic_64.c

v2: Use cpu_online_map as target cpus for bigsmp, just like 64-bit is doing.

Also remove some unused TARGET_CPUS macro.

v3: need to check if desc is null in smp_irq_move_cleanup

also migration needs to reset vector too, so copy __target_IO_APIC_irq
from 64bit.

(the duplication will go away once the two files are unified.)

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 5 insertions, 10 deletions

diff --git a/include/asm-x86/bigsmp/apic.h b/include/asm-x86/bigsmp/apic.h
index 0a9cd7c5ca0c..1d9543b9d358 100644
--- a/include/asm-x86/bigsmp/apic.h
+++ b/include/asm-x86/bigsmp/apic.h
@@ -9,22 +9,17 @@ static inline int apic_id_registered(void)
         return (1);
 }
 
-/* Round robin the irqs amoung the online cpus */
 static inline cpumask_t target_cpus(void)
 {
-        static unsigned long cpu = NR_CPUS;
-        do {
-                if (cpu >= NR_CPUS)
-                        cpu = first_cpu(cpu_online_map);
-                else
-                        cpu = next_cpu(cpu, cpu_online_map);
-        } while (cpu >= NR_CPUS);
-        return cpumask_of_cpu(cpu);
+#ifdef CONFIG_SMP
+        return cpu_online_map;
+#else
+        return cpumask_of_cpu(0);
+#endif
 }
 
 #undef APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL       0
-#define TARGET_CPUS             (target_cpus())
 #define APIC_DFR_VALUE          (APIC_DFR_FLAT)
 #define INT_DELIVERY_MODE       (dest_Fixed)
 #define INT_DEST_MODE           (0)    /* phys delivery to target proc */