diff options
author | Len Brown <len.brown@intel.com> | 2005-12-06 17:31:30 -0500 |
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committer | Len Brown <len.brown@intel.com> | 2005-12-06 17:31:30 -0500 |
commit | 3d5271f9883cba7b54762bc4fe027d4172f06db7 (patch) | |
tree | ab8a881a14478598a0c8bda0d26c62cdccfffd6d /include/asm-um/cache.h | |
parent | 378b2556f4e09fa6f87ff0cb5c4395ff28257d02 (diff) | |
parent | 9115a6c787596e687df03010d97fccc5e0762506 (diff) |
Pull release into acpica branch
Diffstat (limited to 'include/asm-um/cache.h')
-rw-r--r-- | include/asm-um/cache.h | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/include/asm-um/cache.h b/include/asm-um/cache.h index 4b134fe8504e..a10602a5b2d6 100644 --- a/include/asm-um/cache.h +++ b/include/asm-um/cache.h | |||
@@ -1,10 +1,21 @@ | |||
1 | #ifndef __UM_CACHE_H | 1 | #ifndef __UM_CACHE_H |
2 | #define __UM_CACHE_H | 2 | #define __UM_CACHE_H |
3 | 3 | ||
4 | /* These are x86 numbers */ | 4 | #include <linux/config.h> |
5 | #define L1_CACHE_SHIFT 5 | ||
6 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
7 | 5 | ||
8 | #define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ | 6 | #if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT) |
7 | # define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) | ||
8 | #elif defined(CONFIG_UML_X86) /* 64-bit */ | ||
9 | # define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */ | ||
10 | #else | ||
11 | /* XXX: this was taken from x86, now it's completely random. Luckily only | ||
12 | * affects SMP padding. */ | ||
13 | # define L1_CACHE_SHIFT 5 | ||
14 | #endif | ||
15 | |||
16 | /* XXX: this is valid for x86 and x86_64. */ | ||
17 | #define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ | ||
18 | |||
19 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
9 | 20 | ||
10 | #endif | 21 | #endif |