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authorDavid S. Miller <davem@davemloft.net>2006-11-16 16:38:57 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-12-10 05:39:09 -0500
commit10e267234cc0133bc9ed26bc34eb09de90c248c0 (patch)
tree8493e2767e1752f5873e50cc899a4c701cc55fbb /include/asm-sparc64/system.h
parentaf1713e0f111647052953ba12fd10a59c74a5dde (diff)
[SPARC64]: Add irqtrace/stacktrace/lockdep support.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/system.h')
-rw-r--r--include/asm-sparc64/system.h49
1 files changed, 3 insertions, 46 deletions
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index a8b7432c9a70..32281acb878b 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -7,6 +7,9 @@
7#include <asm/visasm.h> 7#include <asm/visasm.h>
8 8
9#ifndef __ASSEMBLY__ 9#ifndef __ASSEMBLY__
10
11#include <linux/irqflags.h>
12
10/* 13/*
11 * Sparc (general) CPU types 14 * Sparc (general) CPU types
12 */ 15 */
@@ -72,52 +75,6 @@ do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
72 75
73#endif 76#endif
74 77
75#define setipl(__new_ipl) \
76 __asm__ __volatile__("wrpr %0, %%pil" : : "r" (__new_ipl) : "memory")
77
78#define local_irq_disable() \
79 __asm__ __volatile__("wrpr 15, %%pil" : : : "memory")
80
81#define local_irq_enable() \
82 __asm__ __volatile__("wrpr 0, %%pil" : : : "memory")
83
84#define getipl() \
85({ unsigned long retval; __asm__ __volatile__("rdpr %%pil, %0" : "=r" (retval)); retval; })
86
87#define swap_pil(__new_pil) \
88({ unsigned long retval; \
89 __asm__ __volatile__("rdpr %%pil, %0\n\t" \
90 "wrpr %1, %%pil" \
91 : "=&r" (retval) \
92 : "r" (__new_pil) \
93 : "memory"); \
94 retval; \
95})
96
97#define read_pil_and_cli() \
98({ unsigned long retval; \
99 __asm__ __volatile__("rdpr %%pil, %0\n\t" \
100 "wrpr 15, %%pil" \
101 : "=r" (retval) \
102 : : "memory"); \
103 retval; \
104})
105
106#define local_save_flags(flags) ((flags) = getipl())
107#define local_irq_save(flags) ((flags) = read_pil_and_cli())
108#define local_irq_restore(flags) setipl((flags))
109
110/* On sparc64 IRQ flags are the PIL register. A value of zero
111 * means all interrupt levels are enabled, any other value means
112 * only IRQ levels greater than that value will be received.
113 * Consequently this means that the lowest IRQ level is one.
114 */
115#define irqs_disabled() \
116({ unsigned long flags; \
117 local_save_flags(flags);\
118 (flags > 0); \
119})
120
121#define nop() __asm__ __volatile__ ("nop") 78#define nop() __asm__ __volatile__ ("nop")
122 79
123#define read_barrier_depends() do { } while(0) 80#define read_barrier_depends() do { } while(0)