sh: Fixup various PAGE_SIZE == 4096 assumptions.

There were a number of places that made evil PAGE_SIZE == 4k
assumptions that ended up breaking when trying to play with
8k and 64k page sizes, this fixes those up.

The most significant change is the way we load THREAD_SIZE,
previously this was done via:

	mov	#(THREAD_SIZE >> 8), reg
	shll8	reg

to avoid a memory access and allow the immediate load. With
a 64k PAGE_SIZE, we're out of range for the immediate load
size without resorting to special instructions available in
later ISAs (movi20s and so on). The "workaround" for this is
to bump up the shift to 10 and insert a shll2, which gives a
bit more flexibility while still being much cheaper than a
memory access.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

3 files changed, 6 insertions, 11 deletions

diff --git a/include/asm-sh/entry-macros.S b/include/asm-sh/entry-macros.S
index 099fe8189bbe..500030eae7aa 100644
--- a/include/asm-sh/entry-macros.S
+++ b/include/asm-sh/entry-macros.S
@@ -23,8 +23,9 @@
 #ifdef CONFIG_HAS_SR_RB
         stc     r7_bank, \ti
 #else
-        mov     #((THREAD_SIZE - 1)>> 8) ^ 0xff, \tmp
+        mov     #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp
         shll8   \tmp
+        shll2   \tmp
         mov     r15, \ti
         and     \tmp, \ti
 #endif  
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index fa625245051d..f87504abb43f 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -47,8 +47,8 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 
 /* Entries per level */
-#define PTRS_PER_PTE    (1 << PTE_BITS)
-#define PTRS_PER_PGD    (1 << PGDIR_BITS)
+#define PTRS_PER_PTE    (PAGE_SIZE / 4)
+#define PTRS_PER_PGD    (PAGE_SIZE / 4)
 
 #define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
 #define FIRST_USER_ADDRESS      0
@@ -57,7 +57,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
 
 /*
  * First 1MB map is used by fixed purpose.
- * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
+ * Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c)
  */
 #define VMALLOC_START   (P3SEG+0x00100000)
 #define VMALLOC_END     (FIXADDR_START-2*PAGE_SIZE)
diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h
index 3ebc3f9039eb..0c01dc550819 100644
--- a/include/asm-sh/thread_info.h
+++ b/include/asm-sh/thread_info.h
@@ -90,13 +90,7 @@ static inline struct thread_info *current_thread_info(void)
 #endif
 #define free_thread_info(ti)    kfree(ti)
 
-#else /* !__ASSEMBLY__ */
-
-/* how to get the thread information struct from ASM */
-#define GET_THREAD_INFO(reg) \
-        stc     r7_bank, reg
-
-#endif
+#endif /* __ASSEMBLY__ */
 
 /*
  * thread information flags