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authorLinus Torvalds <torvalds@g5.osdl.org>2006-03-21 11:52:18 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-21 11:52:18 -0500
commitb05005772f34497eb2b7415a651fe785cbe70e16 (patch)
treeb176aeb7fa9baf69e77ddd83e844727490bfcf28 /include/asm-sh/processor.h
parent044f324f6ea5d55391db62fca6a295b2651cb946 (diff)
parent7705a8792b0fc82fd7d4dd923724606bbfd9fb20 (diff)
Merge branch 'origin'
Conflicts: Documentation/video4linux/CARDLIST.cx88 drivers/media/video/cx88/Kconfig drivers/media/video/em28xx/em28xx-video.c drivers/media/video/saa7134/saa7134-dvb.c Resolved as in the original merge by Mauro Carvalho Chehab
Diffstat (limited to 'include/asm-sh/processor.h')
-rw-r--r--include/asm-sh/processor.h36
1 files changed, 15 insertions, 21 deletions
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index c4904797d6df..fa5bd2d8803e 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -12,7 +12,6 @@
12#include <asm/page.h> 12#include <asm/page.h>
13#include <asm/types.h> 13#include <asm/types.h>
14#include <asm/cache.h> 14#include <asm/cache.h>
15#include <linux/threads.h>
16#include <asm/ptrace.h> 15#include <asm/ptrace.h>
17 16
18/* 17/*
@@ -30,7 +29,7 @@
30 * CPU type and hardware bug flags. Kept separately for each CPU. 29 * CPU type and hardware bug flags. Kept separately for each CPU.
31 * 30 *
32 * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry 31 * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
33 * in arch/sh/Kconfig, as well as an entry in arch/sh/kernel/setup.c 32 * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
34 * for parsing the subtype in get_cpu_subtype(). 33 * for parsing the subtype in get_cpu_subtype().
35 */ 34 */
36enum cpu_type { 35enum cpu_type {
@@ -44,7 +43,7 @@ enum cpu_type {
44 /* SH-4 types */ 43 /* SH-4 types */
45 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, 44 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
46 CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, 45 CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
47 CPU_SH73180, 46 CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781,
48 47
49 /* Unknown subtype */ 48 /* Unknown subtype */
50 CPU_SH_NONE 49 CPU_SH_NONE
@@ -52,14 +51,8 @@ enum cpu_type {
52 51
53struct sh_cpuinfo { 52struct sh_cpuinfo {
54 enum cpu_type type; 53 enum cpu_type type;
55 char hard_math;
56 unsigned long loops_per_jiffy; 54 unsigned long loops_per_jiffy;
57 55
58 unsigned int cpu_clock, master_clock, bus_clock, module_clock;
59#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
60 unsigned int memory_clock;
61#endif
62
63 struct cache_info icache; 56 struct cache_info icache;
64 struct cache_info dcache; 57 struct cache_info dcache;
65 58
@@ -131,7 +124,7 @@ union sh_fpu_union {
131 struct sh_fpu_soft_struct soft; 124 struct sh_fpu_soft_struct soft;
132}; 125};
133 126
134/* 127/*
135 * Processor flags 128 * Processor flags
136 */ 129 */
137 130
@@ -140,6 +133,7 @@ union sh_fpu_union {
140#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ 133#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
141#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ 134#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
142#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ 135#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
136#define CPU_HAS_PTEA 0x0020 /* PTEA register */
143 137
144struct thread_struct { 138struct thread_struct {
145 unsigned long sp; 139 unsigned long sp;
@@ -160,10 +154,10 @@ extern int ubc_usercnt;
160#define INIT_THREAD { \ 154#define INIT_THREAD { \
161 sizeof(init_stack) + (long) &init_stack, /* sp */ \ 155 sizeof(init_stack) + (long) &init_stack, /* sp */ \
162 0, /* pc */ \ 156 0, /* pc */ \
163 0, 0, \ 157 0, 0, \
164 0, \ 158 0, \
165 0, \ 159 0, \
166 {{{0,}},} /* fpu state */ \ 160 {{{0,}},} /* fpu state */ \
167} 161}
168 162
169/* 163/*
@@ -171,7 +165,7 @@ extern int ubc_usercnt;
171 */ 165 */
172#define start_thread(regs, new_pc, new_sp) \ 166#define start_thread(regs, new_pc, new_sp) \
173 set_fs(USER_DS); \ 167 set_fs(USER_DS); \
174 regs->pr = 0; \ 168 regs->pr = 0; \
175 regs->sr = SR_FD; /* User mode. */ \ 169 regs->sr = SR_FD; /* User mode. */ \
176 regs->pc = new_pc; \ 170 regs->pc = new_pc; \
177 regs->regs[15] = new_sp 171 regs->regs[15] = new_sp
@@ -239,16 +233,16 @@ extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
239#define save_fpu(tsk) do { } while (0) 233#define save_fpu(tsk) do { } while (0)
240#endif 234#endif
241 235
242#define unlazy_fpu(tsk, regs) do { \ 236#define unlazy_fpu(tsk, regs) do { \
243 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ 237 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
244 save_fpu(tsk, regs); \ 238 save_fpu(tsk, regs); \
245 } \ 239 } \
246} while (0) 240} while (0)
247 241
248#define clear_fpu(tsk, regs) do { \ 242#define clear_fpu(tsk, regs) do { \
249 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ 243 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
250 clear_tsk_thread_flag(tsk, TIF_USEDFPU); \ 244 clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
251 release_fpu(regs); \ 245 release_fpu(regs); \
252 } \ 246 } \
253} while (0) 247} while (0)
254 248