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| author | Stephen Rothwell <sfr@canb.auug.org.au> | 2005-10-16 21:50:32 -0400 |
|---|---|---|
| committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2005-10-16 21:50:32 -0400 |
| commit | 7dffb72028bfd909ac51a1546d182de2df4d2426 (patch) | |
| tree | c465c35642872973543f710f8aa06b955b84f7e5 /include/asm-ppc | |
| parent | cf764855620aa1aa5b134687ca18b841ac9be4c7 (diff) | |
ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTES
instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/cache.h | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h index 38f2f1be4a87..7a157d0f4b5f 100644 --- a/include/asm-ppc/cache.h +++ b/include/asm-ppc/cache.h | |||
| @@ -9,21 +9,18 @@ | |||
| 9 | 9 | ||
| 10 | /* bytes per L1 cache line */ | 10 | /* bytes per L1 cache line */ |
| 11 | #if defined(CONFIG_8xx) || defined(CONFIG_403GCX) | 11 | #if defined(CONFIG_8xx) || defined(CONFIG_403GCX) |
| 12 | #define L1_CACHE_LINE_SIZE 16 | 12 | #define L1_CACHE_SHIFT 4 |
| 13 | #define LG_L1_CACHE_LINE_SIZE 4 | ||
| 14 | #define MAX_COPY_PREFETCH 1 | 13 | #define MAX_COPY_PREFETCH 1 |
| 15 | #elif defined(CONFIG_PPC64BRIDGE) | 14 | #elif defined(CONFIG_PPC64BRIDGE) |
| 16 | #define L1_CACHE_LINE_SIZE 128 | 15 | #define L1_CACHE_SHIFT 7 |
| 17 | #define LG_L1_CACHE_LINE_SIZE 7 | ||
| 18 | #define MAX_COPY_PREFETCH 1 | 16 | #define MAX_COPY_PREFETCH 1 |
| 19 | #else | 17 | #else |
| 20 | #define L1_CACHE_LINE_SIZE 32 | 18 | #define L1_CACHE_SHIFT 5 |
| 21 | #define LG_L1_CACHE_LINE_SIZE 5 | ||
| 22 | #define MAX_COPY_PREFETCH 4 | 19 | #define MAX_COPY_PREFETCH 4 |
| 23 | #endif | 20 | #endif |
| 24 | 21 | ||
| 25 | #define L1_CACHE_BYTES L1_CACHE_LINE_SIZE | 22 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| 26 | #define L1_CACHE_SHIFT LG_L1_CACHE_LINE_SIZE | 23 | |
| 27 | #define SMP_CACHE_BYTES L1_CACHE_BYTES | 24 | #define SMP_CACHE_BYTES L1_CACHE_BYTES |
| 28 | #define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ | 25 | #define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ |
| 29 | 26 | ||