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authorJeff Garzik <jgarzik@pretzel.yyz.us>2005-06-22 13:07:28 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-06-22 13:07:28 -0400
commitff40c6d3d1437ecdf295b8e39adcb06c3d6021ef (patch)
tree3666d029b4bd4df2909dbefd9c7a09e6042b7d32 /include/asm-ppc64
parent8bf62ecee58360749c5f0e68bc97d5e02a6816b1 (diff)
parent2a5a68b840cbab31baab2d9b2e1e6de3b289ae1e (diff)
Merge upstream kernel changes into 'C/H/S support' branch of libata.
Diffstat (limited to 'include/asm-ppc64')
-rw-r--r--include/asm-ppc64/agp.h10
-rw-r--r--include/asm-ppc64/dma.h3
-rw-r--r--include/asm-ppc64/elf.h4
-rw-r--r--include/asm-ppc64/iSeries/HvCall.h156
-rw-r--r--include/asm-ppc64/iSeries/HvCallCfg.h213
-rw-r--r--include/asm-ppc64/iSeries/HvCallEvent.h94
-rw-r--r--include/asm-ppc64/iSeries/HvCallHpt.h112
-rw-r--r--include/asm-ppc64/iSeries/HvCallPci.h486
-rw-r--r--include/asm-ppc64/iSeries/HvCallSc.h40
-rw-r--r--include/asm-ppc64/iSeries/HvCallSm.h36
-rw-r--r--include/asm-ppc64/iSeries/HvCallXm.h113
-rw-r--r--include/asm-ppc64/iSeries/HvLpConfig.h300
-rw-r--r--include/asm-ppc64/iSeries/HvLpEvent.h116
-rw-r--r--include/asm-ppc64/iSeries/HvReleaseData.h78
-rw-r--r--include/asm-ppc64/iSeries/HvTypes.h108
-rw-r--r--include/asm-ppc64/iSeries/IoHriMainStore.h33
-rw-r--r--include/asm-ppc64/iSeries/IoHriProcessorVpd.h32
-rw-r--r--include/asm-ppc64/iSeries/ItExtVpdPanel.h54
-rw-r--r--include/asm-ppc64/iSeries/ItIplParmsReal.h99
-rw-r--r--include/asm-ppc64/iSeries/ItLpNaca.h44
-rw-r--r--include/asm-ppc64/iSeries/ItLpQueue.h84
-rw-r--r--include/asm-ppc64/iSeries/ItLpRegSave.h41
-rw-r--r--include/asm-ppc64/iSeries/ItSpCommArea.h10
-rw-r--r--include/asm-ppc64/iSeries/ItVpdAreas.h125
-rw-r--r--include/asm-ppc64/iSeries/LparData.h49
-rw-r--r--include/asm-ppc64/iSeries/LparMap.h44
-rw-r--r--include/asm-ppc64/iSeries/XmPciLpEvent.h18
-rw-r--r--include/asm-ppc64/iSeries/iSeries_io.h59
-rw-r--r--include/asm-ppc64/iSeries/iSeries_irq.h17
-rw-r--r--include/asm-ppc64/iSeries/iSeries_pci.h142
-rw-r--r--include/asm-ppc64/iSeries/iSeries_proc.h24
-rw-r--r--include/asm-ppc64/iSeries/mf.h6
-rw-r--r--include/asm-ppc64/iSeries/vio.h57
-rw-r--r--include/asm-ppc64/imalloc.h12
-rw-r--r--include/asm-ppc64/iommu.h25
-rw-r--r--include/asm-ppc64/paca.h2
-rw-r--r--include/asm-ppc64/page.h2
-rw-r--r--include/asm-ppc64/pgtable.h9
-rw-r--r--include/asm-ppc64/processor.h196
-rw-r--r--include/asm-ppc64/prom.h13
-rw-r--r--include/asm-ppc64/smp.h2
-rw-r--r--include/asm-ppc64/thread_info.h4
42 files changed, 1016 insertions, 2056 deletions
diff --git a/include/asm-ppc64/agp.h b/include/asm-ppc64/agp.h
index be27cfa8c5b0..ca9e423307f4 100644
--- a/include/asm-ppc64/agp.h
+++ b/include/asm-ppc64/agp.h
@@ -10,4 +10,14 @@
10#define flush_agp_mappings() 10#define flush_agp_mappings()
11#define flush_agp_cache() mb() 11#define flush_agp_cache() mb()
12 12
13/* Convert a physical address to an address suitable for the GART. */
14#define phys_to_gart(x) (x)
15#define gart_to_phys(x) (x)
16
17/* GATT allocation. Returns/accepts GATT kernel virtual address. */
18#define alloc_gatt_pages(order) \
19 ((char *)__get_free_pages(GFP_KERNEL, (order)))
20#define free_gatt_pages(table, order) \
21 free_pages((unsigned long)(table), (order))
22
13#endif 23#endif
diff --git a/include/asm-ppc64/dma.h b/include/asm-ppc64/dma.h
index d693b8026bc3..dfd1f69059ba 100644
--- a/include/asm-ppc64/dma.h
+++ b/include/asm-ppc64/dma.h
@@ -27,6 +27,8 @@
27/* Doesn't really apply... */ 27/* Doesn't really apply... */
28#define MAX_DMA_ADDRESS (~0UL) 28#define MAX_DMA_ADDRESS (~0UL)
29 29
30#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
31
30#define dma_outb outb 32#define dma_outb outb
31#define dma_inb inb 33#define dma_inb inb
32 34
@@ -323,4 +325,5 @@ extern int isa_dma_bridge_buggy;
323#else 325#else
324#define isa_dma_bridge_buggy (0) 326#define isa_dma_bridge_buggy (0)
325#endif 327#endif
328#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
326#endif /* _ASM_DMA_H */ 329#endif /* _ASM_DMA_H */
diff --git a/include/asm-ppc64/elf.h b/include/asm-ppc64/elf.h
index 6c42d61bedd1..085eedb956fe 100644
--- a/include/asm-ppc64/elf.h
+++ b/include/asm-ppc64/elf.h
@@ -221,9 +221,7 @@ do { \
221 set_thread_flag(TIF_ABI_PENDING); \ 221 set_thread_flag(TIF_ABI_PENDING); \
222 else \ 222 else \
223 clear_thread_flag(TIF_ABI_PENDING); \ 223 clear_thread_flag(TIF_ABI_PENDING); \
224 if (ibcs2) \ 224 if (personality(current->personality) != PER_LINUX32) \
225 set_personality(PER_SVR4); \
226 else if (current->personality != PER_LINUX32) \
227 set_personality(PER_LINUX); \ 225 set_personality(PER_LINUX); \
228} while (0) 226} while (0)
229 227
diff --git a/include/asm-ppc64/iSeries/HvCall.h b/include/asm-ppc64/iSeries/HvCall.h
index d9a2e74e2399..c3f19475c0d9 100644
--- a/include/asm-ppc64/iSeries/HvCall.h
+++ b/include/asm-ppc64/iSeries/HvCall.h
@@ -1,84 +1,36 @@
1/* 1/*
2 * HvCall.h 2 * HvCall.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19/*
20//=========================================================================== 20 * This file contains the "hypervisor call" interface which is used to
21// 21 * drive the hypervisor from the OS.
22// This file contains the "hypervisor call" interface which is used to 22 */
23// drive the hypervisor from the OS.
24//
25//===========================================================================
26#ifndef _HVCALL_H 23#ifndef _HVCALL_H
27#define _HVCALL_H 24#define _HVCALL_H
28 25
29//-------------------------------------------------------------------
30// Standard Includes
31//-------------------------------------------------------------------
32#include <asm/iSeries/HvCallSc.h> 26#include <asm/iSeries/HvCallSc.h>
33#include <asm/iSeries/HvTypes.h> 27#include <asm/iSeries/HvTypes.h>
34#include <asm/paca.h> 28#include <asm/paca.h>
35 29
36/*
37enum HvCall_ReturnCode
38{
39 HvCall_Good = 0,
40 HvCall_Partial = 1,
41 HvCall_NotOwned = 2,
42 HvCall_NotFreed = 3,
43 HvCall_UnspecifiedError = 4
44};
45
46enum HvCall_TypeOfSIT
47{
48 HvCall_ReduceOnly = 0,
49 HvCall_Unconditional = 1
50};
51
52enum HvCall_TypeOfYield
53{
54 HvCall_YieldTimed = 0, // Yield until specified time
55 HvCall_YieldToActive = 1, // Yield until all active procs have run
56 HvCall_YieldToProc = 2 // Yield until the specified processor has run
57};
58
59enum HvCall_InterruptMasks
60{
61 HvCall_MaskIPI = 0x00000001,
62 HvCall_MaskLpEvent = 0x00000002,
63 HvCall_MaskLpProd = 0x00000004,
64 HvCall_MaskTimeout = 0x00000008
65};
66
67enum HvCall_VaryOffChunkRc
68{
69 HvCall_VaryOffSucceeded = 0,
70 HvCall_VaryOffWithdrawn = 1,
71 HvCall_ChunkInLoadArea = 2,
72 HvCall_ChunkInHPT = 3,
73 HvCall_ChunkNotAccessible = 4,
74 HvCall_ChunkInUse = 5
75};
76*/
77
78/* Type of yield for HvCallBaseYieldProcessor */ 30/* Type of yield for HvCallBaseYieldProcessor */
79#define HvCall_YieldTimed 0 // Yield until specified time (tb) 31#define HvCall_YieldTimed 0 /* Yield until specified time (tb) */
80#define HvCall_YieldToActive 1 // Yield until all active procs have run 32#define HvCall_YieldToActive 1 /* Yield until all active procs have run */
81#define HvCall_YieldToProc 2 // Yield until the specified processor has run 33#define HvCall_YieldToProc 2 /* Yield until the specified processor has run */
82 34
83/* interrupt masks for setEnabledInterrupts */ 35/* interrupt masks for setEnabledInterrupts */
84#define HvCall_MaskIPI 0x00000001 36#define HvCall_MaskIPI 0x00000001
@@ -86,7 +38,7 @@ enum HvCall_VaryOffChunkRc
86#define HvCall_MaskLpProd 0x00000004 38#define HvCall_MaskLpProd 0x00000004
87#define HvCall_MaskTimeout 0x00000008 39#define HvCall_MaskTimeout 0x00000008
88 40
89/* Log buffer formats */ 41/* Log buffer formats */
90#define HvCall_LogBuffer_ASCII 0 42#define HvCall_LogBuffer_ASCII 0
91#define HvCall_LogBuffer_EBCDIC 1 43#define HvCall_LogBuffer_EBCDIC 1
92 44
@@ -95,7 +47,7 @@ enum HvCall_VaryOffChunkRc
95#define HvCallBaseGetHwPatch HvCallBase + 2 47#define HvCallBaseGetHwPatch HvCallBase + 2
96#define HvCallBaseReIplSpAttn HvCallBase + 3 48#define HvCallBaseReIplSpAttn HvCallBase + 3
97#define HvCallBaseSetASR HvCallBase + 4 49#define HvCallBaseSetASR HvCallBase + 4
98#define HvCallBaseSetASRAndRfi HvCallBase + 5 50#define HvCallBaseSetASRAndRfi HvCallBase + 5
99#define HvCallBaseSetIMR HvCallBase + 6 51#define HvCallBaseSetIMR HvCallBase + 6
100#define HvCallBaseSendIPI HvCallBase + 7 52#define HvCallBaseSendIPI HvCallBase + 7
101#define HvCallBaseTerminateMachine HvCallBase + 8 53#define HvCallBaseTerminateMachine HvCallBase + 8
@@ -115,91 +67,47 @@ enum HvCall_VaryOffChunkRc
115#define HvCallBaseGetLogBufferCodePage HvCallBase + 22 67#define HvCallBaseGetLogBufferCodePage HvCallBase + 22
116#define HvCallBaseGetLogBufferFormat HvCallBase + 23 68#define HvCallBaseGetLogBufferFormat HvCallBase + 23
117#define HvCallBaseGetLogBufferLength HvCallBase + 24 69#define HvCallBaseGetLogBufferLength HvCallBase + 24
118#define HvCallBaseReadLogBuffer HvCallBase + 25 70#define HvCallBaseReadLogBuffer HvCallBase + 25
119#define HvCallBaseSetLogBufferFormatAndCodePage HvCallBase + 26 71#define HvCallBaseSetLogBufferFormatAndCodePage HvCallBase + 26
120#define HvCallBaseWriteLogBuffer HvCallBase + 27 72#define HvCallBaseWriteLogBuffer HvCallBase + 27
121#define HvCallBaseRouter28 HvCallBase + 28 73#define HvCallBaseRouter28 HvCallBase + 28
122#define HvCallBaseRouter29 HvCallBase + 29 74#define HvCallBaseRouter29 HvCallBase + 29
123#define HvCallBaseRouter30 HvCallBase + 30 75#define HvCallBaseRouter30 HvCallBase + 30
124#define HvCallBaseSetDebugBus HvCallBase + 31 76#define HvCallBaseSetDebugBus HvCallBase + 31
125 77
126#define HvCallCcSetDABR HvCallCc + 7 78#define HvCallCcSetDABR HvCallCc + 7
127 79
128//===================================================================================== 80static inline void HvCall_setVirtualDecr(void)
129static inline void HvCall_setVirtualDecr(void)
130{ 81{
131 /* Ignore any error return codes - most likely means that the target value for the 82 /*
132 * LP has been increased and this vary off would bring us below the new target. */ 83 * Ignore any error return codes - most likely means that the
84 * target value for the LP has been increased and this vary off
85 * would bring us below the new target.
86 */
133 HvCall0(HvCallBaseSetVirtualDecr); 87 HvCall0(HvCallBaseSetVirtualDecr);
134} 88}
135//=====================================================================
136static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
137{
138 HvCall2( HvCallBaseYieldProcessor, typeOfYield, yieldParm );
139}
140//=====================================================================
141static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts)
142{
143 HvCall1(HvCallBaseSetEnabledInterrupts,enabledInterrupts);
144}
145
146//=====================================================================
147static inline void HvCall_clearLogBuffer(HvLpIndex lpindex)
148{
149 HvCall1(HvCallBaseClearLogBuffer,lpindex);
150}
151
152//=====================================================================
153static inline u32 HvCall_getLogBufferCodePage(HvLpIndex lpindex)
154{
155 u32 retVal = HvCall1(HvCallBaseGetLogBufferCodePage,lpindex);
156 return retVal;
157}
158
159//=====================================================================
160static inline int HvCall_getLogBufferFormat(HvLpIndex lpindex)
161{
162 int retVal = HvCall1(HvCallBaseGetLogBufferFormat,lpindex);
163 return retVal;
164}
165
166//=====================================================================
167static inline u32 HvCall_getLogBufferLength(HvLpIndex lpindex)
168{
169 u32 retVal = HvCall1(HvCallBaseGetLogBufferLength,lpindex);
170 return retVal;
171}
172 89
173//===================================================================== 90static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
174static inline void HvCall_setLogBufferFormatAndCodepage(int format, u32 codePage)
175{ 91{
176 HvCall2(HvCallBaseSetLogBufferFormatAndCodePage,format, codePage); 92 HvCall2(HvCallBaseYieldProcessor, typeOfYield, yieldParm);
177} 93}
178 94
179//===================================================================== 95static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts)
180int HvCall_readLogBuffer(HvLpIndex lpindex, void *buffer, u64 bufLen);
181void HvCall_writeLogBuffer(const void *buffer, u64 bufLen);
182
183//=====================================================================
184static inline void HvCall_sendIPI(struct paca_struct * targetPaca)
185{ 96{
186 HvCall1( HvCallBaseSendIPI, targetPaca->paca_index ); 97 HvCall1(HvCallBaseSetEnabledInterrupts, enabledInterrupts);
187} 98}
188 99
189//===================================================================== 100static inline void HvCall_setLogBufferFormatAndCodepage(int format,
190static inline void HvCall_terminateMachineSrc(void) 101 u32 codePage)
191{ 102{
192 HvCall0( HvCallBaseTerminateMachineSrc ); 103 HvCall2(HvCallBaseSetLogBufferFormatAndCodePage, format, codePage);
193} 104}
194 105
195static inline void HvCall_setDABR(unsigned long val) 106extern void HvCall_writeLogBuffer(const void *buffer, u64 bufLen);
196{
197 HvCall1(HvCallCcSetDABR, val);
198}
199 107
200static inline void HvCall_setDebugBus(unsigned long val) 108static inline void HvCall_sendIPI(struct paca_struct *targetPaca)
201{ 109{
202 HvCall1(HvCallBaseSetDebugBus, val); 110 HvCall1(HvCallBaseSendIPI, targetPaca->paca_index);
203} 111}
204 112
205#endif /* _HVCALL_H */ 113#endif /* _HVCALL_H */
diff --git a/include/asm-ppc64/iSeries/HvCallCfg.h b/include/asm-ppc64/iSeries/HvCallCfg.h
deleted file mode 100644
index 9f40f16de533..000000000000
--- a/include/asm-ppc64/iSeries/HvCallCfg.h
+++ /dev/null
@@ -1,213 +0,0 @@
1/*
2 * HvCallCfg.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20//=====================================================================================
21//
22// This file contains the "hypervisor call" interface which is used to
23// drive the hypervisor from the OS.
24//
25//=====================================================================================
26#ifndef _HVCALLCFG_H
27#define _HVCALLCFG_H
28
29//-------------------------------------------------------------------
30// Standard Includes
31//-------------------------------------------------------------------
32#include <asm/iSeries/HvCallSc.h>
33#include <asm/iSeries/HvTypes.h>
34
35//-------------------------------------------------------------------------------------
36// Constants
37//-------------------------------------------------------------------------------------
38
39enum HvCallCfg_ReqQual
40{
41 HvCallCfg_Cur = 0,
42 HvCallCfg_Init = 1,
43 HvCallCfg_Max = 2,
44 HvCallCfg_Min = 3
45};
46
47#define HvCallCfgGetLps HvCallCfg + 0
48#define HvCallCfgGetActiveLpMap HvCallCfg + 1
49#define HvCallCfgGetLpVrmIndex HvCallCfg + 2
50#define HvCallCfgGetLpMinSupportedPlicVrmIndex HvCallCfg + 3
51#define HvCallCfgGetLpMinCompatablePlicVrmIndex HvCallCfg + 4
52#define HvCallCfgGetLpVrmName HvCallCfg + 5
53#define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6
54#define HvCallCfgGetPhysicalProcessors HvCallCfg + 7
55#define HvCallCfgGetSystemMsChunks HvCallCfg + 8
56#define HvCallCfgGetMsChunks HvCallCfg + 9
57#define HvCallCfgGetInteractivePercentage HvCallCfg + 10
58#define HvCallCfgIsBusDedicated HvCallCfg + 11
59#define HvCallCfgGetBusOwner HvCallCfg + 12
60#define HvCallCfgGetBusAllocation HvCallCfg + 13
61#define HvCallCfgGetBusUnitOwner HvCallCfg + 14
62#define HvCallCfgGetBusUnitAllocation HvCallCfg + 15
63#define HvCallCfgGetVirtualBusPool HvCallCfg + 16
64#define HvCallCfgGetBusUnitInterruptProc HvCallCfg + 17
65#define HvCallCfgGetConfiguredBusUnitsForIntProc HvCallCfg + 18
66#define HvCallCfgGetRioSanBusPool HvCallCfg + 19
67#define HvCallCfgGetSharedPoolIndex HvCallCfg + 20
68#define HvCallCfgGetSharedProcUnits HvCallCfg + 21
69#define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22
70#define HvCallCfgRouter23 HvCallCfg + 23
71#define HvCallCfgRouter24 HvCallCfg + 24
72#define HvCallCfgRouter25 HvCallCfg + 25
73#define HvCallCfgRouter26 HvCallCfg + 26
74#define HvCallCfgRouter27 HvCallCfg + 27
75#define HvCallCfgGetMinRuntimeMsChunks HvCallCfg + 28
76#define HvCallCfgSetMinRuntimeMsChunks HvCallCfg + 29
77#define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30
78#define HvCallCfgGetLpExecutionMode HvCallCfg + 31
79#define HvCallCfgGetHostingLpIndex HvCallCfg + 32
80
81//====================================================================
82static inline HvLpIndex HvCallCfg_getLps(void)
83{
84 HvLpIndex retVal = HvCall0(HvCallCfgGetLps);
85 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
86 return retVal;
87}
88//====================================================================
89static inline int HvCallCfg_isBusDedicated(u64 busIndex)
90{
91 int retVal = HvCall1(HvCallCfgIsBusDedicated,busIndex);
92 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
93 return retVal;
94}
95//====================================================================
96static inline HvLpIndex HvCallCfg_getBusOwner(u64 busIndex)
97{
98 HvLpIndex retVal = HvCall1(HvCallCfgGetBusOwner,busIndex);
99 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
100 return retVal;
101}
102//====================================================================
103static inline HvLpIndexMap HvCallCfg_getBusAllocation(u64 busIndex)
104{
105 HvLpIndexMap retVal = HvCall1(HvCallCfgGetBusAllocation,busIndex);
106 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
107 return retVal;
108}
109//====================================================================
110static inline HvLpIndexMap HvCallCfg_getActiveLpMap(void)
111{
112 HvLpIndexMap retVal = HvCall0(HvCallCfgGetActiveLpMap);
113 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
114 return retVal;
115}
116//====================================================================
117static inline HvLpVirtualLanIndexMap HvCallCfg_getVirtualLanIndexMap(HvLpIndex lp)
118{
119 // This is a new function in V5R1 so calls to this on older
120 // hypervisors will return -1
121 u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp);
122 if(retVal == -1)
123 retVal = 0;
124 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
125 return retVal;
126}
127//===================================================================
128static inline u64 HvCallCfg_getSystemMsChunks(void)
129{
130 u64 retVal = HvCall0(HvCallCfgGetSystemMsChunks);
131 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
132 return retVal;
133}
134//===================================================================
135static inline u64 HvCallCfg_getMsChunks(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
136{
137 u64 retVal = HvCall2(HvCallCfgGetMsChunks,lp,qual);
138 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
139 return retVal;
140}
141//===================================================================
142static inline u64 HvCallCfg_getMinRuntimeMsChunks(HvLpIndex lp)
143{
144 // NOTE: This function was added in v5r1 so older hypervisors will return a -1 value
145 u64 retVal = HvCall1(HvCallCfgGetMinRuntimeMsChunks,lp);
146 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
147 return retVal;
148}
149//===================================================================
150static inline u64 HvCallCfg_setMinRuntimeMsChunks(u64 chunks)
151{
152 u64 retVal = HvCall1(HvCallCfgSetMinRuntimeMsChunks,chunks);
153 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
154 return retVal;
155}
156//===================================================================
157static inline u64 HvCallCfg_getSystemPhysicalProcessors(void)
158{
159 u64 retVal = HvCall0(HvCallCfgGetSystemPhysicalProcessors);
160 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
161 return retVal;
162}
163//===================================================================
164static inline u64 HvCallCfg_getPhysicalProcessors(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
165{
166 u64 retVal = HvCall2(HvCallCfgGetPhysicalProcessors,lp,qual);
167 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
168 return retVal;
169}
170//===================================================================
171static inline u64 HvCallCfg_getConfiguredBusUnitsForInterruptProc(HvLpIndex lp,
172 u16 hvLogicalProcIndex)
173{
174 u64 retVal = HvCall2(HvCallCfgGetConfiguredBusUnitsForIntProc,lp,hvLogicalProcIndex);
175 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
176 return retVal;
177
178}
179//==================================================================
180static inline HvLpSharedPoolIndex HvCallCfg_getSharedPoolIndex(HvLpIndex lp)
181{
182 HvLpSharedPoolIndex retVal =
183 HvCall1(HvCallCfgGetSharedPoolIndex,lp);
184 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
185 return retVal;
186
187}
188//==================================================================
189static inline u64 HvCallCfg_getSharedProcUnits(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
190{
191 u64 retVal = HvCall2(HvCallCfgGetSharedProcUnits,lp,qual);
192 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
193 return retVal;
194
195}
196//==================================================================
197static inline u64 HvCallCfg_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
198{
199 u16 retVal = HvCall1(HvCallCfgGetNumProcsInSharedPool,sPI);
200 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
201 return retVal;
202
203}
204//==================================================================
205static inline HvLpIndex HvCallCfg_getHostingLpIndex(HvLpIndex lp)
206{
207 u64 retVal = HvCall1(HvCallCfgGetHostingLpIndex,lp);
208 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
209 return retVal;
210
211}
212
213#endif /* _HVCALLCFG_H */
diff --git a/include/asm-ppc64/iSeries/HvCallEvent.h b/include/asm-ppc64/iSeries/HvCallEvent.h
index 191ddce0c2c6..5d9a327d0122 100644
--- a/include/asm-ppc64/iSeries/HvCallEvent.h
+++ b/include/asm-ppc64/iSeries/HvCallEvent.h
@@ -1,32 +1,28 @@
1/* 1/*
2 * HvCallEvent.h 2 * HvCallEvent.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19
20/* 19/*
21 * This file contains the "hypervisor call" interface which is used to 20 * This file contains the "hypervisor call" interface which is used to
22 * drive the hypervisor from the OS. 21 * drive the hypervisor from the OS.
23 */ 22 */
24#ifndef _HVCALLEVENT_H 23#ifndef _HVCALLEVENT_H
25#define _HVCALLEVENT_H 24#define _HVCALLEVENT_H
26 25
27/*
28 * Standard Includes
29 */
30#include <asm/iSeries/HvCallSc.h> 26#include <asm/iSeries/HvCallSc.h>
31#include <asm/iSeries/HvTypes.h> 27#include <asm/iSeries/HvTypes.h>
32#include <asm/abs_addr.h> 28#include <asm/abs_addr.h>
@@ -71,7 +67,7 @@ typedef u64 HvLpDma_Rc;
71#define HvCallEventCloseLpEventPath HvCallEvent + 2 67#define HvCallEventCloseLpEventPath HvCallEvent + 2
72#define HvCallEventDmaBufList HvCallEvent + 3 68#define HvCallEventDmaBufList HvCallEvent + 3
73#define HvCallEventDmaSingle HvCallEvent + 4 69#define HvCallEventDmaSingle HvCallEvent + 4
74#define HvCallEventDmaToSp HvCallEvent + 5 70#define HvCallEventDmaToSp HvCallEvent + 5
75#define HvCallEventGetOverflowLpEvents HvCallEvent + 6 71#define HvCallEventGetOverflowLpEvents HvCallEvent + 6
76#define HvCallEventGetSourceLpInstanceId HvCallEvent + 7 72#define HvCallEventGetSourceLpInstanceId HvCallEvent + 7
77#define HvCallEventGetTargetLpInstanceId HvCallEvent + 8 73#define HvCallEventGetTargetLpInstanceId HvCallEvent + 8
@@ -85,14 +81,12 @@ typedef u64 HvLpDma_Rc;
85 81
86static inline void HvCallEvent_getOverflowLpEvents(u8 queueIndex) 82static inline void HvCallEvent_getOverflowLpEvents(u8 queueIndex)
87{ 83{
88 HvCall1(HvCallEventGetOverflowLpEvents,queueIndex); 84 HvCall1(HvCallEventGetOverflowLpEvents, queueIndex);
89 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
90} 85}
91 86
92static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex) 87static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex)
93{ 88{
94 HvCall1(HvCallEventSetInterLpQueueIndex,queueIndex); 89 HvCall1(HvCallEventSetInterLpQueueIndex, queueIndex);
95 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
96} 90}
97 91
98static inline void HvCallEvent_setLpEventStack(u8 queueIndex, 92static inline void HvCallEvent_setLpEventStack(u8 queueIndex,
@@ -103,7 +97,6 @@ static inline void HvCallEvent_setLpEventStack(u8 queueIndex,
103 abs_addr = virt_to_abs(eventStackAddr); 97 abs_addr = virt_to_abs(eventStackAddr);
104 HvCall3(HvCallEventSetLpEventStack, queueIndex, abs_addr, 98 HvCall3(HvCallEventSetLpEventStack, queueIndex, abs_addr,
105 eventStackSize); 99 eventStackSize);
106 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
107} 100}
108 101
109static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex, 102static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
@@ -111,22 +104,18 @@ static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
111{ 104{
112 HvCall2(HvCallEventSetLpEventQueueInterruptProc, queueIndex, 105 HvCall2(HvCallEventSetLpEventQueueInterruptProc, queueIndex,
113 lpLogicalProcIndex); 106 lpLogicalProcIndex);
114 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
115} 107}
116 108
117static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event) 109static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event)
118{ 110{
119 u64 abs_addr; 111 u64 abs_addr;
120 HvLpEvent_Rc retVal;
121 112
122#ifdef DEBUG_SENDEVENT 113#ifdef DEBUG_SENDEVENT
123 printk("HvCallEvent_signalLpEvent: *event = %016lx\n ", 114 printk("HvCallEvent_signalLpEvent: *event = %016lx\n ",
124 (unsigned long)event); 115 (unsigned long)event);
125#endif 116#endif
126 abs_addr = virt_to_abs(event); 117 abs_addr = virt_to_abs(event);
127 retVal = (HvLpEvent_Rc)HvCall1(HvCallEventSignalLpEvent, abs_addr); 118 return HvCall1(HvCallEventSignalLpEvent, abs_addr);
128 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
129 return retVal;
130} 119}
131 120
132static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp, 121static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
@@ -136,9 +125,7 @@ static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
136 u64 eventData1, u64 eventData2, u64 eventData3, 125 u64 eventData1, u64 eventData2, u64 eventData3,
137 u64 eventData4, u64 eventData5) 126 u64 eventData4, u64 eventData5)
138{ 127{
139 HvLpEvent_Rc retVal; 128 /* Pack the misc bits into a single Dword to pass to PLIC */
140
141 // Pack the misc bits into a single Dword to pass to PLIC
142 union { 129 union {
143 struct HvCallEvent_PackedParms parms; 130 struct HvCallEvent_PackedParms parms;
144 u64 dword; 131 u64 dword;
@@ -152,67 +139,49 @@ static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
152 packed.parms.xSourceInstId = sourceInstanceId; 139 packed.parms.xSourceInstId = sourceInstanceId;
153 packed.parms.xTargetInstId = targetInstanceId; 140 packed.parms.xTargetInstId = targetInstanceId;
154 141
155 retVal = (HvLpEvent_Rc)HvCall7(HvCallEventSignalLpEventParms, 142 return HvCall7(HvCallEventSignalLpEventParms, packed.dword,
156 packed.dword, correlationToken, eventData1,eventData2, 143 correlationToken, eventData1, eventData2,
157 eventData3,eventData4, eventData5); 144 eventData3, eventData4, eventData5);
158 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
159 return retVal;
160} 145}
161 146
162static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event) 147static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event)
163{ 148{
164 u64 abs_addr; 149 u64 abs_addr;
165 HvLpEvent_Rc retVal;
166 150
167 abs_addr = virt_to_abs(event); 151 abs_addr = virt_to_abs(event);
168 retVal = (HvLpEvent_Rc)HvCall1(HvCallEventAckLpEvent, abs_addr); 152 return HvCall1(HvCallEventAckLpEvent, abs_addr);
169 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
170 return retVal;
171} 153}
172 154
173static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event) 155static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event)
174{ 156{
175 u64 abs_addr; 157 u64 abs_addr;
176 HvLpEvent_Rc retVal;
177 158
178 abs_addr = virt_to_abs(event); 159 abs_addr = virt_to_abs(event);
179 retVal = (HvLpEvent_Rc)HvCall1(HvCallEventCancelLpEvent, abs_addr); 160 return HvCall1(HvCallEventCancelLpEvent, abs_addr);
180 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
181 return retVal;
182} 161}
183 162
184static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId( 163static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId(
185 HvLpIndex targetLp, HvLpEvent_Type type) 164 HvLpIndex targetLp, HvLpEvent_Type type)
186{ 165{
187 HvLpInstanceId retVal; 166 return HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type);
188
189 retVal = HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type);
190 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
191 return retVal;
192} 167}
193 168
194static inline HvLpInstanceId HvCallEvent_getTargetLpInstanceId( 169static inline HvLpInstanceId HvCallEvent_getTargetLpInstanceId(
195 HvLpIndex targetLp, HvLpEvent_Type type) 170 HvLpIndex targetLp, HvLpEvent_Type type)
196{ 171{
197 HvLpInstanceId retVal; 172 return HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type);
198
199 retVal = HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type);
200 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
201 return retVal;
202} 173}
203 174
204static inline void HvCallEvent_openLpEventPath(HvLpIndex targetLp, 175static inline void HvCallEvent_openLpEventPath(HvLpIndex targetLp,
205 HvLpEvent_Type type) 176 HvLpEvent_Type type)
206{ 177{
207 HvCall2(HvCallEventOpenLpEventPath, targetLp, type); 178 HvCall2(HvCallEventOpenLpEventPath, targetLp, type);
208 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
209} 179}
210 180
211static inline void HvCallEvent_closeLpEventPath(HvLpIndex targetLp, 181static inline void HvCallEvent_closeLpEventPath(HvLpIndex targetLp,
212 HvLpEvent_Type type) 182 HvLpEvent_Type type)
213{ 183{
214 HvCall2(HvCallEventCloseLpEventPath, targetLp, type); 184 HvCall2(HvCallEventCloseLpEventPath, targetLp, type);
215 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
216} 185}
217 186
218static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type, 187static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
@@ -224,8 +193,7 @@ static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
224 /* Do these need to be converted to absolute addresses? */ 193 /* Do these need to be converted to absolute addresses? */
225 u64 localBufList, u64 remoteBufList, u32 transferLength) 194 u64 localBufList, u64 remoteBufList, u32 transferLength)
226{ 195{
227 HvLpDma_Rc retVal; 196 /* Pack the misc bits into a single Dword to pass to PLIC */
228 // Pack the misc bits into a single Dword to pass to PLIC
229 union { 197 union {
230 struct HvCallEvent_PackedDmaParms parms; 198 struct HvCallEvent_PackedDmaParms parms;
231 u64 dword; 199 u64 dword;
@@ -241,11 +209,8 @@ static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
241 packed.parms.xLocalInstId = localInstanceId; 209 packed.parms.xLocalInstId = localInstanceId;
242 packed.parms.xRemoteInstId = remoteInstanceId; 210 packed.parms.xRemoteInstId = remoteInstanceId;
243 211
244 retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaBufList, 212 return HvCall4(HvCallEventDmaBufList, packed.dword, localBufList,
245 packed.dword, localBufList, remoteBufList, 213 remoteBufList, transferLength);
246 transferLength);
247 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
248 return retVal;
249} 214}
250 215
251static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type, 216static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
@@ -256,8 +221,7 @@ static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
256 HvLpDma_AddressType remoteAddressType, 221 HvLpDma_AddressType remoteAddressType,
257 u64 localAddrOrTce, u64 remoteAddrOrTce, u32 transferLength) 222 u64 localAddrOrTce, u64 remoteAddrOrTce, u32 transferLength)
258{ 223{
259 HvLpDma_Rc retVal; 224 /* Pack the misc bits into a single Dword to pass to PLIC */
260 // Pack the misc bits into a single Dword to pass to PLIC
261 union { 225 union {
262 struct HvCallEvent_PackedDmaParms parms; 226 struct HvCallEvent_PackedDmaParms parms;
263 u64 dword; 227 u64 dword;
@@ -273,25 +237,17 @@ static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
273 packed.parms.xLocalInstId = localInstanceId; 237 packed.parms.xLocalInstId = localInstanceId;
274 packed.parms.xRemoteInstId = remoteInstanceId; 238 packed.parms.xRemoteInstId = remoteInstanceId;
275 239
276 retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaSingle, 240 return (HvLpDma_Rc)HvCall4(HvCallEventDmaSingle, packed.dword,
277 packed.dword, localAddrOrTce, remoteAddrOrTce, 241 localAddrOrTce, remoteAddrOrTce, transferLength);
278 transferLength);
279 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
280 return retVal;
281} 242}
282 243
283static inline HvLpDma_Rc HvCallEvent_dmaToSp(void* local, u32 remote, 244static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote,
284 u32 length, HvLpDma_Direction dir) 245 u32 length, HvLpDma_Direction dir)
285{ 246{
286 u64 abs_addr; 247 u64 abs_addr;
287 HvLpDma_Rc retVal;
288 248
289 abs_addr = virt_to_abs(local); 249 abs_addr = virt_to_abs(local);
290 retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaToSp, abs_addr, remote, 250 return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir);
291 length, dir);
292 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
293 return retVal;
294} 251}
295 252
296
297#endif /* _HVCALLEVENT_H */ 253#endif /* _HVCALLEVENT_H */
diff --git a/include/asm-ppc64/iSeries/HvCallHpt.h b/include/asm-ppc64/iSeries/HvCallHpt.h
index da769873d18b..66f38222ff75 100644
--- a/include/asm-ppc64/iSeries/HvCallHpt.h
+++ b/include/asm-ppc64/iSeries/HvCallHpt.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvCallHpt.h 2 * HvCallHpt.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,21 +19,15 @@
19#ifndef _HVCALLHPT_H 19#ifndef _HVCALLHPT_H
20#define _HVCALLHPT_H 20#define _HVCALLHPT_H
21 21
22//============================================================================ 22/*
23// 23 * This file contains the "hypervisor call" interface which is used to
24// This file contains the "hypervisor call" interface which is used to 24 * drive the hypervisor from the OS.
25// drive the hypervisor from the OS. 25 */
26//
27//============================================================================
28 26
29#include <asm/iSeries/HvCallSc.h> 27#include <asm/iSeries/HvCallSc.h>
30#include <asm/iSeries/HvTypes.h> 28#include <asm/iSeries/HvTypes.h>
31#include <asm/mmu.h> 29#include <asm/mmu.h>
32 30
33//-----------------------------------------------------------------------------
34// Constants
35//-----------------------------------------------------------------------------
36
37#define HvCallHptGetHptAddress HvCallHpt + 0 31#define HvCallHptGetHptAddress HvCallHpt + 0
38#define HvCallHptGetHptPages HvCallHpt + 1 32#define HvCallHptGetHptPages HvCallHpt + 1
39#define HvCallHptSetPp HvCallHpt + 5 33#define HvCallHptSetPp HvCallHpt + 5
@@ -47,81 +41,63 @@
47#define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18 41#define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18
48 42
49 43
50//============================================================================ 44static inline u64 HvCallHpt_getHptAddress(void)
51static inline u64 HvCallHpt_getHptAddress(void)
52{ 45{
53 u64 retval = HvCall0(HvCallHptGetHptAddress); 46 return HvCall0(HvCallHptGetHptAddress);
54 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
55 return retval;
56} 47}
57//============================================================================ 48
58static inline u64 HvCallHpt_getHptPages(void) 49static inline u64 HvCallHpt_getHptPages(void)
59{ 50{
60 u64 retval = HvCall0(HvCallHptGetHptPages); 51 return HvCall0(HvCallHptGetHptPages);
61 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
62 return retval;
63} 52}
64//============================================================================= 53
65static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value) 54static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value)
66{ 55{
67 HvCall2( HvCallHptSetPp, hpteIndex, value ); 56 HvCall2(HvCallHptSetPp, hpteIndex, value);
68 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
69} 57}
70//============================================================================= 58
71static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff ) 59static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff)
72{ 60{
73 HvCall3( HvCallHptSetSwBits, hpteIndex, bitson, bitsoff ); 61 HvCall3(HvCallHptSetSwBits, hpteIndex, bitson, bitsoff);
74 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
75} 62}
76//============================================================================= 63
77static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex) 64static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex)
78
79{ 65{
80 HvCall1( HvCallHptInvalidateNoSyncICache, hpteIndex ); 66 HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
81 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
82} 67}
83//============================================================================= 68
84static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson, u8 bitsoff ) 69static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson,
85 70 u8 bitsoff)
86{ 71{
87 u64 compressedStatus; 72 u64 compressedStatus;
88 compressedStatus = HvCall4( HvCallHptInvalidateSetSwBitsGet, hpteIndex, bitson, bitsoff, 1 ); 73
89 HvCall1( HvCallHptInvalidateNoSyncICache, hpteIndex ); 74 compressedStatus = HvCall4(HvCallHptInvalidateSetSwBitsGet,
90 // getPaca()->adjustHmtForNoOfSpinLocksHeld(); 75 hpteIndex, bitson, bitsoff, 1);
76 HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
91 return compressedStatus; 77 return compressedStatus;
92} 78}
93//============================================================================= 79
94static inline u64 HvCallHpt_findValid( HPTE *hpte, u64 vpn ) 80static inline u64 HvCallHpt_findValid(HPTE *hpte, u64 vpn)
95{ 81{
96 u64 retIndex = HvCall3Ret16( HvCallHptFindValid, hpte, vpn, 0, 0 ); 82 return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
97 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
98 return retIndex;
99} 83}
100//============================================================================= 84
101static inline u64 HvCallHpt_findNextValid( HPTE *hpte, u32 hpteIndex, u8 bitson, u8 bitsoff ) 85static inline u64 HvCallHpt_findNextValid(HPTE *hpte, u32 hpteIndex,
86 u8 bitson, u8 bitsoff)
102{ 87{
103 u64 retIndex = HvCall3Ret16( HvCallHptFindNextValid, hpte, hpteIndex, bitson, bitsoff ); 88 return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
104 // getPaca()->adjustHmtForNoOfSpinLocksHeld(); 89 bitson, bitsoff);
105 return retIndex;
106} 90}
107//============================================================================= 91
108static inline void HvCallHpt_get( HPTE *hpte, u32 hpteIndex ) 92static inline void HvCallHpt_get(HPTE *hpte, u32 hpteIndex)
109{ 93{
110 HvCall2Ret16( HvCallHptGet, hpte, hpteIndex, 0 ); 94 HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
111 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
112} 95}
113//============================================================================ 96
114static inline void HvCallHpt_addValidate( u32 hpteIndex, 97static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, HPTE *hpte)
115 u32 hBit,
116 HPTE *hpte )
117
118{ 98{
119 HvCall4( HvCallHptAddValidate, hpteIndex, 99 HvCall4(HvCallHptAddValidate, hpteIndex, hBit, (*((u64 *)hpte)),
120 hBit, (*((u64 *)hpte)), (*(((u64 *)hpte)+1)) ); 100 (*(((u64 *)hpte)+1)));
121 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
122} 101}
123 102
124
125//=============================================================================
126
127#endif /* _HVCALLHPT_H */ 103#endif /* _HVCALLHPT_H */
diff --git a/include/asm-ppc64/iSeries/HvCallPci.h b/include/asm-ppc64/iSeries/HvCallPci.h
index 6887b619288e..c8d675c40f5e 100644
--- a/include/asm-ppc64/iSeries/HvCallPci.h
+++ b/include/asm-ppc64/iSeries/HvCallPci.h
@@ -1,26 +1,26 @@
1/************************************************************************/ 1/*
2/* Provides the Hypervisor PCI calls for iSeries Linux Parition. */ 2 * Provides the Hypervisor PCI calls for iSeries Linux Parition.
3/* Copyright (C) 2001 <Wayne G Holm> <IBM Corporation> */ 3 * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
4/* */ 4 *
5/* This program is free software; you can redistribute it and/or modify */ 5 * This program is free software; you can redistribute it and/or modify
6/* it under the terms of the GNU General Public License as published by */ 6 * it under the terms of the GNU General Public License as published by
7/* the Free Software Foundation; either version 2 of the License, or */ 7 * the Free Software Foundation; either version 2 of the License, or
8/* (at your option) any later version. */ 8 * (at your option) any later version.
9/* */ 9 *
10/* This program is distributed in the hope that it will be useful, */ 10 * This program is distributed in the hope that it will be useful,
11/* but WITHOUT ANY WARRANTY; without even the implied warranty of */ 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13/* GNU General Public License for more details. */ 13 * GNU General Public License for more details.
14/* */ 14 *
15/* You should have received a copy of the GNU General Public License */ 15 * You should have received a copy of the GNU General Public License
16/* along with this program; if not, write to the: */ 16 * along with this program; if not, write to the:
17/* Free Software Foundation, Inc., */ 17 * Free Software Foundation, Inc.,
18/* 59 Temple Place, Suite 330, */ 18 * 59 Temple Place, Suite 330,
19/* Boston, MA 02111-1307 USA */ 19 * Boston, MA 02111-1307 USA
20/************************************************************************/ 20 *
21/* Change Activity: */ 21 * Change Activity:
22/* Created, Jan 9, 2001 */ 22 * Created, Jan 9, 2001
23/************************************************************************/ 23 */
24 24
25#ifndef _HVCALLPCI_H 25#ifndef _HVCALLPCI_H
26#define _HVCALLPCI_H 26#define _HVCALLPCI_H
@@ -34,8 +34,8 @@
34 */ 34 */
35struct HvCallPci_DsaAddr { 35struct HvCallPci_DsaAddr {
36 u16 busNumber; /* PHB index? */ 36 u16 busNumber; /* PHB index? */
37 u8 subBusNumber; /* PCI bus number? */ 37 u8 subBusNumber; /* PCI bus number? */
38 u8 deviceId; /* device and function? */ 38 u8 deviceId; /* device and function? */
39 u8 barNumber; 39 u8 barNumber;
40 u8 reserved[3]; 40 u8 reserved[3];
41}; 41};
@@ -52,34 +52,37 @@ struct HvCallPci_LoadReturn {
52 52
53enum HvCallPci_DeviceType { 53enum HvCallPci_DeviceType {
54 HvCallPci_NodeDevice = 1, 54 HvCallPci_NodeDevice = 1,
55 HvCallPci_SpDevice = 2, 55 HvCallPci_SpDevice = 2,
56 HvCallPci_IopDevice = 3, 56 HvCallPci_IopDevice = 3,
57 HvCallPci_BridgeDevice = 4, 57 HvCallPci_BridgeDevice = 4,
58 HvCallPci_MultiFunctionDevice = 5, 58 HvCallPci_MultiFunctionDevice = 5,
59 HvCallPci_IoaDevice = 6 59 HvCallPci_IoaDevice = 6
60}; 60};
61 61
62 62
63struct HvCallPci_DeviceInfo { 63struct HvCallPci_DeviceInfo {
64 u32 deviceType; // See DeviceType enum for values 64 u32 deviceType; /* See DeviceType enum for values */
65}; 65};
66 66
67struct HvCallPci_BusUnitInfo { 67struct HvCallPci_BusUnitInfo {
68 u32 sizeReturned; // length of data returned 68 u32 sizeReturned; /* length of data returned */
69 u32 deviceType; // see DeviceType enum for values 69 u32 deviceType; /* see DeviceType enum for values */
70}; 70};
71 71
72struct HvCallPci_BridgeInfo { 72struct HvCallPci_BridgeInfo {
73 struct HvCallPci_BusUnitInfo busUnitInfo; // Generic bus unit info 73 struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
74 u8 subBusNumber; // Bus number of secondary bus 74 u8 subBusNumber; /* Bus number of secondary bus */
75 u8 maxAgents; // Max idsels on secondary bus 75 u8 maxAgents; /* Max idsels on secondary bus */
76 u8 maxSubBusNumber; // Max Sub Bus 76 u8 maxSubBusNumber; /* Max Sub Bus */
77 u8 logicalSlotNumber; // Logical Slot Number for IOA 77 u8 logicalSlotNumber; /* Logical Slot Number for IOA */
78}; 78};
79
80 79
81// Maximum BusUnitInfo buffer size. Provided for clients so they can allocate 80
82// a buffer big enough for any type of bus unit. Increase as needed. 81/*
82 * Maximum BusUnitInfo buffer size. Provided for clients so
83 * they can allocate a buffer big enough for any type of bus
84 * unit. Increase as needed.
85 */
83enum {HvCallPci_MaxBusUnitInfoSize = 128}; 86enum {HvCallPci_MaxBusUnitInfoSize = 128};
84 87
85struct HvCallPci_BarParms { 88struct HvCallPci_BarParms {
@@ -89,12 +92,12 @@ struct HvCallPci_BarParms {
89 u64 protectStart; 92 u64 protectStart;
90 u64 protectEnd; 93 u64 protectEnd;
91 u64 relocationOffset; 94 u64 relocationOffset;
92 u64 pciAddress; 95 u64 pciAddress;
93 u64 reserved[3]; 96 u64 reserved[3];
94}; 97};
95 98
96enum HvCallPci_VpdType { 99enum HvCallPci_VpdType {
97 HvCallPci_BusVpd = 1, 100 HvCallPci_BusVpd = 1,
98 HvCallPci_BusAdapterVpd = 2 101 HvCallPci_BusAdapterVpd = 2
99}; 102};
100 103
@@ -123,15 +126,13 @@ enum HvCallPci_VpdType {
123#define HvCallPciUnmaskInterrupts HvCallPci + 49 126#define HvCallPciUnmaskInterrupts HvCallPci + 49
124#define HvCallPciGetBusUnitInfo HvCallPci + 50 127#define HvCallPciGetBusUnitInfo HvCallPci + 50
125 128
126//============================================================================
127static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber, 129static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
128 u8 deviceId, u32 offset, 130 u8 deviceId, u32 offset, u8 *value)
129 u8 *value)
130{ 131{
131 struct HvCallPci_DsaAddr dsa; 132 struct HvCallPci_DsaAddr dsa;
132 struct HvCallPci_LoadReturn retVal; 133 struct HvCallPci_LoadReturn retVal;
133 134
134 *((u64*)&dsa) = 0; 135 *((u64*)&dsa) = 0;
135 136
136 dsa.busNumber = busNumber; 137 dsa.busNumber = busNumber;
137 dsa.subBusNumber = subBusNumber; 138 dsa.subBusNumber = subBusNumber;
@@ -139,21 +140,18 @@ static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
139 140
140 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0); 141 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
141 142
142 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
143
144 *value = retVal.value; 143 *value = retVal.value;
145 144
146 return retVal.rc; 145 return retVal.rc;
147} 146}
148//============================================================================ 147
149static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber, 148static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
150 u8 deviceId, u32 offset, 149 u8 deviceId, u32 offset, u16 *value)
151 u16 *value)
152{ 150{
153 struct HvCallPci_DsaAddr dsa; 151 struct HvCallPci_DsaAddr dsa;
154 struct HvCallPci_LoadReturn retVal; 152 struct HvCallPci_LoadReturn retVal;
155 153
156 *((u64*)&dsa) = 0; 154 *((u64*)&dsa) = 0;
157 155
158 dsa.busNumber = busNumber; 156 dsa.busNumber = busNumber;
159 dsa.subBusNumber = subBusNumber; 157 dsa.subBusNumber = subBusNumber;
@@ -161,21 +159,18 @@ static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
161 159
162 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0); 160 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
163 161
164 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
165
166 *value = retVal.value; 162 *value = retVal.value;
167 163
168 return retVal.rc; 164 return retVal.rc;
169} 165}
170//============================================================================ 166
171static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber, 167static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
172 u8 deviceId, u32 offset, 168 u8 deviceId, u32 offset, u32 *value)
173 u32 *value)
174{ 169{
175 struct HvCallPci_DsaAddr dsa; 170 struct HvCallPci_DsaAddr dsa;
176 struct HvCallPci_LoadReturn retVal; 171 struct HvCallPci_LoadReturn retVal;
177 172
178 *((u64*)&dsa) = 0; 173 *((u64*)&dsa) = 0;
179 174
180 dsa.busNumber = busNumber; 175 dsa.busNumber = busNumber;
181 dsa.subBusNumber = subBusNumber; 176 dsa.subBusNumber = subBusNumber;
@@ -183,84 +178,61 @@ static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
183 178
184 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0); 179 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
185 180
186 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
187
188 *value = retVal.value; 181 *value = retVal.value;
189 182
190 return retVal.rc; 183 return retVal.rc;
191} 184}
192//============================================================================ 185
193static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber, 186static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
194 u8 deviceId, u32 offset, 187 u8 deviceId, u32 offset, u8 value)
195 u8 value)
196{ 188{
197 struct HvCallPci_DsaAddr dsa; 189 struct HvCallPci_DsaAddr dsa;
198 u64 retVal;
199 190
200 *((u64*)&dsa) = 0; 191 *((u64*)&dsa) = 0;
201 192
202 dsa.busNumber = busNumber; 193 dsa.busNumber = busNumber;
203 dsa.subBusNumber = subBusNumber; 194 dsa.subBusNumber = subBusNumber;
204 dsa.deviceId = deviceId; 195 dsa.deviceId = deviceId;
205 196
206 retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0); 197 return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
207
208 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
209
210 return retVal;
211} 198}
212//============================================================================ 199
213static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber, 200static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
214 u8 deviceId, u32 offset, 201 u8 deviceId, u32 offset, u16 value)
215 u16 value)
216{ 202{
217 struct HvCallPci_DsaAddr dsa; 203 struct HvCallPci_DsaAddr dsa;
218 u64 retVal;
219 204
220 *((u64*)&dsa) = 0; 205 *((u64*)&dsa) = 0;
221 206
222 dsa.busNumber = busNumber; 207 dsa.busNumber = busNumber;
223 dsa.subBusNumber = subBusNumber; 208 dsa.subBusNumber = subBusNumber;
224 dsa.deviceId = deviceId; 209 dsa.deviceId = deviceId;
225 210
226 retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0); 211 return HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
227
228 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
229
230 return retVal;
231} 212}
232//============================================================================ 213
233static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber, 214static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
234 u8 deviceId, u32 offset, 215 u8 deviceId, u32 offset, u32 value)
235 u32 value)
236{ 216{
237 struct HvCallPci_DsaAddr dsa; 217 struct HvCallPci_DsaAddr dsa;
238 u64 retVal;
239 218
240 *((u64*)&dsa) = 0; 219 *((u64*)&dsa) = 0;
241 220
242 dsa.busNumber = busNumber; 221 dsa.busNumber = busNumber;
243 dsa.subBusNumber = subBusNumber; 222 dsa.subBusNumber = subBusNumber;
244 dsa.deviceId = deviceId; 223 dsa.deviceId = deviceId;
245 224
246 retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0); 225 return HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
247
248 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
249
250 return retVal;
251} 226}
252//============================================================================ 227
253static inline u64 HvCallPci_barLoad8(u16 busNumberParm, 228static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
254 u8 subBusParm, 229 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
255 u8 deviceIdParm, 230 u8 *valueParm)
256 u8 barNumberParm,
257 u64 offsetParm,
258 u8* valueParm)
259{ 231{
260 struct HvCallPci_DsaAddr dsa; 232 struct HvCallPci_DsaAddr dsa;
261 struct HvCallPci_LoadReturn retVal; 233 struct HvCallPci_LoadReturn retVal;
262 234
263 *((u64*)&dsa) = 0; 235 *((u64*)&dsa) = 0;
264 236
265 dsa.busNumber = busNumberParm; 237 dsa.busNumber = busNumberParm;
266 dsa.subBusNumber = subBusParm; 238 dsa.subBusNumber = subBusParm;
@@ -269,24 +241,19 @@ static inline u64 HvCallPci_barLoad8(u16 busNumberParm,
269 241
270 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0); 242 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
271 243
272 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
273
274 *valueParm = retVal.value; 244 *valueParm = retVal.value;
275 245
276 return retVal.rc; 246 return retVal.rc;
277} 247}
278//============================================================================ 248
279static inline u64 HvCallPci_barLoad16(u16 busNumberParm, 249static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
280 u8 subBusParm, 250 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
281 u8 deviceIdParm, 251 u16 *valueParm)
282 u8 barNumberParm,
283 u64 offsetParm,
284 u16* valueParm)
285{ 252{
286 struct HvCallPci_DsaAddr dsa; 253 struct HvCallPci_DsaAddr dsa;
287 struct HvCallPci_LoadReturn retVal; 254 struct HvCallPci_LoadReturn retVal;
288 255
289 *((u64*)&dsa) = 0; 256 *((u64*)&dsa) = 0;
290 257
291 dsa.busNumber = busNumberParm; 258 dsa.busNumber = busNumberParm;
292 dsa.subBusNumber = subBusParm; 259 dsa.subBusNumber = subBusParm;
@@ -295,24 +262,19 @@ static inline u64 HvCallPci_barLoad16(u16 busNumberParm,
295 262
296 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0); 263 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
297 264
298 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
299
300 *valueParm = retVal.value; 265 *valueParm = retVal.value;
301 266
302 return retVal.rc; 267 return retVal.rc;
303} 268}
304//============================================================================ 269
305static inline u64 HvCallPci_barLoad32(u16 busNumberParm, 270static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
306 u8 subBusParm, 271 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
307 u8 deviceIdParm, 272 u32 *valueParm)
308 u8 barNumberParm,
309 u64 offsetParm,
310 u32* valueParm)
311{ 273{
312 struct HvCallPci_DsaAddr dsa; 274 struct HvCallPci_DsaAddr dsa;
313 struct HvCallPci_LoadReturn retVal; 275 struct HvCallPci_LoadReturn retVal;
314 276
315 *((u64*)&dsa) = 0; 277 *((u64*)&dsa) = 0;
316 278
317 dsa.busNumber = busNumberParm; 279 dsa.busNumber = busNumberParm;
318 dsa.subBusNumber = subBusParm; 280 dsa.subBusNumber = subBusParm;
@@ -321,24 +283,19 @@ static inline u64 HvCallPci_barLoad32(u16 busNumberParm,
321 283
322 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0); 284 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
323 285
324 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
325
326 *valueParm = retVal.value; 286 *valueParm = retVal.value;
327 287
328 return retVal.rc; 288 return retVal.rc;
329} 289}
330//============================================================================ 290
331static inline u64 HvCallPci_barLoad64(u16 busNumberParm, 291static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
332 u8 subBusParm, 292 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
333 u8 deviceIdParm, 293 u64 *valueParm)
334 u8 barNumberParm,
335 u64 offsetParm,
336 u64* valueParm)
337{ 294{
338 struct HvCallPci_DsaAddr dsa; 295 struct HvCallPci_DsaAddr dsa;
339 struct HvCallPci_LoadReturn retVal; 296 struct HvCallPci_LoadReturn retVal;
340 297
341 *((u64*)&dsa) = 0; 298 *((u64*)&dsa) = 0;
342 299
343 dsa.busNumber = busNumberParm; 300 dsa.busNumber = busNumberParm;
344 dsa.subBusNumber = subBusParm; 301 dsa.subBusNumber = subBusParm;
@@ -347,112 +304,81 @@ static inline u64 HvCallPci_barLoad64(u16 busNumberParm,
347 304
348 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0); 305 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
349 306
350 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
351
352 *valueParm = retVal.value; 307 *valueParm = retVal.value;
353 308
354 return retVal.rc; 309 return retVal.rc;
355} 310}
356//============================================================================ 311
357static inline u64 HvCallPci_barStore8(u16 busNumberParm, 312static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
358 u8 subBusParm, 313 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
359 u8 deviceIdParm, 314 u8 valueParm)
360 u8 barNumberParm,
361 u64 offsetParm,
362 u8 valueParm)
363{ 315{
364 struct HvCallPci_DsaAddr dsa; 316 struct HvCallPci_DsaAddr dsa;
365 u64 retVal;
366 317
367 *((u64*)&dsa) = 0; 318 *((u64*)&dsa) = 0;
368 319
369 dsa.busNumber = busNumberParm; 320 dsa.busNumber = busNumberParm;
370 dsa.subBusNumber = subBusParm; 321 dsa.subBusNumber = subBusParm;
371 dsa.deviceId = deviceIdParm; 322 dsa.deviceId = deviceIdParm;
372 dsa.barNumber = barNumberParm; 323 dsa.barNumber = barNumberParm;
373 324
374 retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0); 325 return HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm,
375 326 valueParm, 0);
376 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
377
378 return retVal;
379} 327}
380//============================================================================ 328
381static inline u64 HvCallPci_barStore16(u16 busNumberParm, 329static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
382 u8 subBusParm, 330 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
383 u8 deviceIdParm, 331 u16 valueParm)
384 u8 barNumberParm,
385 u64 offsetParm,
386 u16 valueParm)
387{ 332{
388 struct HvCallPci_DsaAddr dsa; 333 struct HvCallPci_DsaAddr dsa;
389 u64 retVal;
390 334
391 *((u64*)&dsa) = 0; 335 *((u64*)&dsa) = 0;
392 336
393 dsa.busNumber = busNumberParm; 337 dsa.busNumber = busNumberParm;
394 dsa.subBusNumber = subBusParm; 338 dsa.subBusNumber = subBusParm;
395 dsa.deviceId = deviceIdParm; 339 dsa.deviceId = deviceIdParm;
396 dsa.barNumber = barNumberParm; 340 dsa.barNumber = barNumberParm;
397 341
398 retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0); 342 return HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm,
399 343 valueParm, 0);
400 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
401
402 return retVal;
403} 344}
404//============================================================================ 345
405static inline u64 HvCallPci_barStore32(u16 busNumberParm, 346static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
406 u8 subBusParm, 347 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
407 u8 deviceIdParm, 348 u32 valueParm)
408 u8 barNumberParm,
409 u64 offsetParm,
410 u32 valueParm)
411{ 349{
412 struct HvCallPci_DsaAddr dsa; 350 struct HvCallPci_DsaAddr dsa;
413 u64 retVal;
414 351
415 *((u64*)&dsa) = 0; 352 *((u64*)&dsa) = 0;
416 353
417 dsa.busNumber = busNumberParm; 354 dsa.busNumber = busNumberParm;
418 dsa.subBusNumber = subBusParm; 355 dsa.subBusNumber = subBusParm;
419 dsa.deviceId = deviceIdParm; 356 dsa.deviceId = deviceIdParm;
420 dsa.barNumber = barNumberParm; 357 dsa.barNumber = barNumberParm;
421 358
422 retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0); 359 return HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm,
423 360 valueParm, 0);
424 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
425
426 return retVal;
427} 361}
428//============================================================================ 362
429static inline u64 HvCallPci_barStore64(u16 busNumberParm, 363static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
430 u8 subBusParm, 364 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
431 u8 deviceIdParm, 365 u64 valueParm)
432 u8 barNumberParm,
433 u64 offsetParm,
434 u64 valueParm)
435{ 366{
436 struct HvCallPci_DsaAddr dsa; 367 struct HvCallPci_DsaAddr dsa;
437 u64 retVal;
438 368
439 *((u64*)&dsa) = 0; 369 *((u64*)&dsa) = 0;
440 370
441 dsa.busNumber = busNumberParm; 371 dsa.busNumber = busNumberParm;
442 dsa.subBusNumber = subBusParm; 372 dsa.subBusNumber = subBusParm;
443 dsa.deviceId = deviceIdParm; 373 dsa.deviceId = deviceIdParm;
444 dsa.barNumber = barNumberParm; 374 dsa.barNumber = barNumberParm;
445 375
446 retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0); 376 return HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm,
447 377 valueParm, 0);
448 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
449
450 return retVal;
451} 378}
452//============================================================================ 379
453static inline u64 HvCallPci_eoi(u16 busNumberParm, 380static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
454 u8 subBusParm, 381 u8 deviceIdParm)
455 u8 deviceIdParm)
456{ 382{
457 struct HvCallPci_DsaAddr dsa; 383 struct HvCallPci_DsaAddr dsa;
458 struct HvCallPci_LoadReturn retVal; 384 struct HvCallPci_LoadReturn retVal;
@@ -465,20 +391,13 @@ static inline u64 HvCallPci_eoi(u16 busNumberParm,
465 391
466 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa); 392 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
467 393
468 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
469
470 return retVal.rc; 394 return retVal.rc;
471} 395}
472//============================================================================ 396
473static inline u64 HvCallPci_getBarParms(u16 busNumberParm, 397static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
474 u8 subBusParm, 398 u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
475 u8 deviceIdParm,
476 u8 barNumberParm,
477 u64 parms,
478 u32 sizeofParms)
479{ 399{
480 struct HvCallPci_DsaAddr dsa; 400 struct HvCallPci_DsaAddr dsa;
481 u64 retVal;
482 401
483 *((u64*)&dsa) = 0; 402 *((u64*)&dsa) = 0;
484 403
@@ -487,62 +406,41 @@ static inline u64 HvCallPci_getBarParms(u16 busNumberParm,
487 dsa.deviceId = deviceIdParm; 406 dsa.deviceId = deviceIdParm;
488 dsa.barNumber = barNumberParm; 407 dsa.barNumber = barNumberParm;
489 408
490 retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms); 409 return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
491
492 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
493
494 return retVal;
495} 410}
496//============================================================================ 411
497static inline u64 HvCallPci_maskFisr(u16 busNumberParm, 412static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
498 u8 subBusParm, 413 u8 deviceIdParm, u64 fisrMask)
499 u8 deviceIdParm,
500 u64 fisrMask)
501{ 414{
502 struct HvCallPci_DsaAddr dsa; 415 struct HvCallPci_DsaAddr dsa;
503 u64 retVal;
504 416
505 *((u64*)&dsa) = 0; 417 *((u64*)&dsa) = 0;
506 418
507 dsa.busNumber = busNumberParm; 419 dsa.busNumber = busNumberParm;
508 dsa.subBusNumber = subBusParm; 420 dsa.subBusNumber = subBusParm;
509 dsa.deviceId = deviceIdParm; 421 dsa.deviceId = deviceIdParm;
510 422
511 retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask); 423 return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
512
513 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
514
515 return retVal;
516} 424}
517//============================================================================ 425
518static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, 426static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
519 u8 subBusParm, 427 u8 deviceIdParm, u64 fisrMask)
520 u8 deviceIdParm,
521 u64 fisrMask)
522{ 428{
523 struct HvCallPci_DsaAddr dsa; 429 struct HvCallPci_DsaAddr dsa;
524 u64 retVal;
525 430
526 *((u64*)&dsa) = 0; 431 *((u64*)&dsa) = 0;
527 432
528 dsa.busNumber = busNumberParm; 433 dsa.busNumber = busNumberParm;
529 dsa.subBusNumber = subBusParm; 434 dsa.subBusNumber = subBusParm;
530 dsa.deviceId = deviceIdParm; 435 dsa.deviceId = deviceIdParm;
531 436
532 retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask); 437 return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
533
534 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
535
536 return retVal;
537} 438}
538//============================================================================ 439
539static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, 440static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
540 u8 subBusParm, 441 u8 deviceIdParm, u64 onNotOff)
541 u8 deviceIdParm,
542 u64 onNotOff)
543{ 442{
544 struct HvCallPci_DsaAddr dsa; 443 struct HvCallPci_DsaAddr dsa;
545 u64 retVal;
546 444
547 *((u64*)&dsa) = 0; 445 *((u64*)&dsa) = 0;
548 446
@@ -550,21 +448,13 @@ static inline u64 HvCallPci_setSlotReset(u16 busNumberParm,
550 dsa.subBusNumber = subBusParm; 448 dsa.subBusNumber = subBusParm;
551 dsa.deviceId = deviceIdParm; 449 dsa.deviceId = deviceIdParm;
552 450
553 retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff); 451 return HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
554
555 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
556
557 return retVal;
558} 452}
559//============================================================================ 453
560static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, 454static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
561 u8 subBusParm, 455 u8 deviceNumberParm, u64 parms, u32 sizeofParms)
562 u8 deviceNumberParm,
563 u64 parms,
564 u32 sizeofParms)
565{ 456{
566 struct HvCallPci_DsaAddr dsa; 457 struct HvCallPci_DsaAddr dsa;
567 u64 retVal;
568 458
569 *((u64*)&dsa) = 0; 459 *((u64*)&dsa) = 0;
570 460
@@ -572,102 +462,72 @@ static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm,
572 dsa.subBusNumber = subBusParm; 462 dsa.subBusNumber = subBusParm;
573 dsa.deviceId = deviceNumberParm << 4; 463 dsa.deviceId = deviceNumberParm << 4;
574 464
575 retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms); 465 return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
576
577 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
578
579 return retVal;
580} 466}
581//============================================================================ 467
582static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, 468static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
583 u8 subBusParm, 469 u8 deviceIdParm, u64 interruptMask)
584 u8 deviceIdParm,
585 u64 interruptMask)
586{ 470{
587 struct HvCallPci_DsaAddr dsa; 471 struct HvCallPci_DsaAddr dsa;
588 u64 retVal;
589 472
590 *((u64*)&dsa) = 0; 473 *((u64*)&dsa) = 0;
591 474
592 dsa.busNumber = busNumberParm; 475 dsa.busNumber = busNumberParm;
593 dsa.subBusNumber = subBusParm; 476 dsa.subBusNumber = subBusParm;
594 dsa.deviceId = deviceIdParm; 477 dsa.deviceId = deviceIdParm;
595 478
596 retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask); 479 return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
597
598 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
599
600 return retVal;
601} 480}
602//============================================================================ 481
603static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, 482static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
604 u8 subBusParm, 483 u8 deviceIdParm, u64 interruptMask)
605 u8 deviceIdParm,
606 u64 interruptMask)
607{ 484{
608 struct HvCallPci_DsaAddr dsa; 485 struct HvCallPci_DsaAddr dsa;
609 u64 retVal;
610 486
611 *((u64*)&dsa) = 0; 487 *((u64*)&dsa) = 0;
612 488
613 dsa.busNumber = busNumberParm; 489 dsa.busNumber = busNumberParm;
614 dsa.subBusNumber = subBusParm; 490 dsa.subBusNumber = subBusParm;
615 dsa.deviceId = deviceIdParm; 491 dsa.deviceId = deviceIdParm;
616 492
617 retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask); 493 return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
618
619 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
620
621 return retVal;
622} 494}
623//============================================================================
624 495
625static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, 496static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
626 u8 subBusParm, 497 u8 deviceIdParm, u64 parms, u32 sizeofParms)
627 u8 deviceIdParm,
628 u64 parms,
629 u32 sizeofParms)
630{ 498{
631 struct HvCallPci_DsaAddr dsa; 499 struct HvCallPci_DsaAddr dsa;
632 u64 retVal;
633 500
634 *((u64*)&dsa) = 0; 501 *((u64*)&dsa) = 0;
635 502
636 dsa.busNumber = busNumberParm; 503 dsa.busNumber = busNumberParm;
637 dsa.subBusNumber = subBusParm; 504 dsa.subBusNumber = subBusParm;
638 dsa.deviceId = deviceIdParm; 505 dsa.deviceId = deviceIdParm;
639 506
640 retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms); 507 return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms,
641 508 sizeofParms);
642 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
643
644 return retVal;
645} 509}
646//============================================================================
647 510
648static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, u16 sizeParm) 511static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
512 u16 sizeParm)
649{ 513{
650 int xRetSize; 514 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
651 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd); 515 sizeParm, HvCallPci_BusVpd);
652 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
653 if (xRc == -1) 516 if (xRc == -1)
654 xRetSize = -1; 517 return -1;
655 else 518 else
656 xRetSize = xRc & 0xFFFF; 519 return xRc & 0xFFFF;
657 return xRetSize;
658} 520}
659//============================================================================
660 521
661static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, u16 sizeParm) 522static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
523 u16 sizeParm)
662{ 524{
663 int xRetSize; 525 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
664 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd); 526 sizeParm, HvCallPci_BusAdapterVpd);
665 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
666 if (xRc == -1) 527 if (xRc == -1)
667 xRetSize = -1; 528 return -1;
668 else 529 else
669 xRetSize = xRc & 0xFFFF; 530 return xRc & 0xFFFF;
670 return xRetSize;
671} 531}
672//============================================================================ 532
673#endif /* _HVCALLPCI_H */ 533#endif /* _HVCALLPCI_H */
diff --git a/include/asm-ppc64/iSeries/HvCallSc.h b/include/asm-ppc64/iSeries/HvCallSc.h
index eea258447642..a62cef3822f9 100644
--- a/include/asm-ppc64/iSeries/HvCallSc.h
+++ b/include/asm-ppc64/iSeries/HvCallSc.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvCallSc.h 2 * HvCallSc.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,7 +19,7 @@
19#ifndef _HVCALLSC_H 19#ifndef _HVCALLSC_H
20#define _HVCALLSC_H 20#define _HVCALLSC_H
21 21
22#include <asm/iSeries/HvTypes.h> 22#include <linux/types.h>
23 23
24#define HvCallBase 0x8000000000000000ul 24#define HvCallBase 0x8000000000000000ul
25#define HvCallCc 0x8001000000000000ul 25#define HvCallCc 0x8001000000000000ul
@@ -30,22 +30,22 @@
30#define HvCallSm 0x8007000000000000ul 30#define HvCallSm 0x8007000000000000ul
31#define HvCallXm 0x8009000000000000ul 31#define HvCallXm 0x8009000000000000ul
32 32
33u64 HvCall0( u64 ); 33extern u64 HvCall0(u64);
34u64 HvCall1( u64, u64 ); 34extern u64 HvCall1(u64, u64);
35u64 HvCall2( u64, u64, u64 ); 35extern u64 HvCall2(u64, u64, u64);
36u64 HvCall3( u64, u64, u64, u64 ); 36extern u64 HvCall3(u64, u64, u64, u64);
37u64 HvCall4( u64, u64, u64, u64, u64 ); 37extern u64 HvCall4(u64, u64, u64, u64, u64);
38u64 HvCall5( u64, u64, u64, u64, u64, u64 ); 38extern u64 HvCall5(u64, u64, u64, u64, u64, u64);
39u64 HvCall6( u64, u64, u64, u64, u64, u64, u64 ); 39extern u64 HvCall6(u64, u64, u64, u64, u64, u64, u64);
40u64 HvCall7( u64, u64, u64, u64, u64, u64, u64, u64 ); 40extern u64 HvCall7(u64, u64, u64, u64, u64, u64, u64, u64);
41 41
42u64 HvCall0Ret16( u64, void * ); 42extern u64 HvCall0Ret16(u64, void *);
43u64 HvCall1Ret16( u64, void *, u64 ); 43extern u64 HvCall1Ret16(u64, void *, u64);
44u64 HvCall2Ret16( u64, void *, u64, u64 ); 44extern u64 HvCall2Ret16(u64, void *, u64, u64);
45u64 HvCall3Ret16( u64, void *, u64, u64, u64 ); 45extern u64 HvCall3Ret16(u64, void *, u64, u64, u64);
46u64 HvCall4Ret16( u64, void *, u64, u64, u64, u64 ); 46extern u64 HvCall4Ret16(u64, void *, u64, u64, u64, u64);
47u64 HvCall5Ret16( u64, void *, u64, u64, u64, u64, u64 ); 47extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64);
48u64 HvCall6Ret16( u64, void *, u64, u64, u64, u64, u64, u64 ); 48extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64);
49u64 HvCall7Ret16( u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64 ); 49extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64);
50 50
51#endif /* _HVCALLSC_H */ 51#endif /* _HVCALLSC_H */
diff --git a/include/asm-ppc64/iSeries/HvCallSm.h b/include/asm-ppc64/iSeries/HvCallSm.h
index 9050c94a529d..8a3dbb071a43 100644
--- a/include/asm-ppc64/iSeries/HvCallSm.h
+++ b/include/asm-ppc64/iSeries/HvCallSm.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvCallSm.h 2 * HvCallSm.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,34 +19,20 @@
19#ifndef _HVCALLSM_H 19#ifndef _HVCALLSM_H
20#define _HVCALLSM_H 20#define _HVCALLSM_H
21 21
22//============================================================================ 22/*
23// 23 * This file contains the "hypervisor call" interface which is used to
24// This file contains the "hypervisor call" interface which is used to 24 * drive the hypervisor from the OS.
25// drive the hypervisor from the OS. 25 */
26//
27//============================================================================
28 26
29//-------------------------------------------------------------------
30// Standard Includes
31//-------------------------------------------------------------------
32#include <asm/iSeries/HvCallSc.h> 27#include <asm/iSeries/HvCallSc.h>
33#include <asm/iSeries/HvTypes.h> 28#include <asm/iSeries/HvTypes.h>
34 29
35//-----------------------------------------------------------------------------
36// Constants
37//-----------------------------------------------------------------------------
38
39#define HvCallSmGet64BitsOfAccessMap HvCallSm + 11 30#define HvCallSmGet64BitsOfAccessMap HvCallSm + 11
40 31
41 32static inline u64 HvCallSm_get64BitsOfAccessMap(HvLpIndex lpIndex,
42//============================================================================ 33 u64 indexIntoBitMap)
43static inline u64 HvCallSm_get64BitsOfAccessMap(
44 HvLpIndex lpIndex, u64 indexIntoBitMap )
45{ 34{
46 u64 retval = HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, 35 return HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, indexIntoBitMap);
47 indexIntoBitMap );
48 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
49 return retval;
50} 36}
51//============================================================================ 37
52#endif /* _HVCALLSM_H */ 38#endif /* _HVCALLSM_H */
diff --git a/include/asm-ppc64/iSeries/HvCallXm.h b/include/asm-ppc64/iSeries/HvCallXm.h
index bfb898f4db8d..8b9ba608daaf 100644
--- a/include/asm-ppc64/iSeries/HvCallXm.h
+++ b/include/asm-ppc64/iSeries/HvCallXm.h
@@ -1,30 +1,13 @@
1//============================================================================ 1/*
2// Header File Id 2 * This file contains the "hypervisor call" interface which is used to
3// Name______________: HvCallXm.H 3 * drive the hypervisor from SLIC.
4// 4 */
5// Description_______:
6//
7// This file contains the "hypervisor call" interface which is used to
8// drive the hypervisor from SLIC.
9//
10//============================================================================
11#ifndef _HVCALLXM_H 5#ifndef _HVCALLXM_H
12#define _HVCALLXM_H 6#define _HVCALLXM_H
13 7
14//-------------------------------------------------------------------
15// Forward declarations
16//-------------------------------------------------------------------
17
18//-------------------------------------------------------------------
19// Standard Includes
20//-------------------------------------------------------------------
21#include <asm/iSeries/HvCallSc.h> 8#include <asm/iSeries/HvCallSc.h>
22#include <asm/iSeries/HvTypes.h> 9#include <asm/iSeries/HvTypes.h>
23 10
24//-----------------------------------------------------------------------------
25// Constants
26//-----------------------------------------------------------------------------
27
28#define HvCallXmGetTceTableParms HvCallXm + 0 11#define HvCallXmGetTceTableParms HvCallXm + 0
29#define HvCallXmTestBus HvCallXm + 1 12#define HvCallXmTestBus HvCallXm + 1
30#define HvCallXmConnectBusUnit HvCallXm + 2 13#define HvCallXmConnectBusUnit HvCallXm + 2
@@ -33,63 +16,63 @@
33#define HvCallXmSetTce HvCallXm + 11 16#define HvCallXmSetTce HvCallXm + 11
34#define HvCallXmSetTces HvCallXm + 13 17#define HvCallXmSetTces HvCallXm + 13
35 18
19/*
20 * Structure passed to HvCallXm_getTceTableParms
21 */
22struct iommu_table_cb {
23 unsigned long itc_busno; /* Bus number for this tce table */
24 unsigned long itc_start; /* Will be NULL for secondary */
25 unsigned long itc_totalsize; /* Size (in pages) of whole table */
26 unsigned long itc_offset; /* Index into real tce table of the
27 start of our section */
28 unsigned long itc_size; /* Size (in pages) of our section */
29 unsigned long itc_index; /* Index of this tce table */
30 unsigned short itc_maxtables; /* Max num of tables for partition */
31 unsigned char itc_virtbus; /* Flag to indicate virtual bus */
32 unsigned char itc_slotno; /* IOA Tce Slot Index */
33 unsigned char itc_rsvd[4];
34};
36 35
37 36static inline void HvCallXm_getTceTableParms(u64 cb)
38//============================================================================
39static inline void HvCallXm_getTceTableParms(u64 cb)
40{ 37{
41 HvCall1(HvCallXmGetTceTableParms, cb); 38 HvCall1(HvCallXmGetTceTableParms, cb);
42 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
43} 39}
44//============================================================================ 40
45static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce) 41static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce)
46{ 42{
47 u64 retval = HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce ); 43 return HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce);
48 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
49 return retval;
50}
51//============================================================================
52static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset, u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4)
53{
54 u64 retval = HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces,
55 tce1, tce2, tce3, tce4 );
56 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
57 return retval;
58} 44}
59//============================================================================= 45
60static inline u64 HvCallXm_testBus(u16 busNumber) 46static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset,
47 u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4)
61{ 48{
62 u64 retVal = HvCall1(HvCallXmTestBus, busNumber); 49 return HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces,
63 // getPaca()->adjustHmtForNoOfSpinLocksHeld(); 50 tce1, tce2, tce3, tce4);
64 return retVal;
65} 51}
66//===================================================================================== 52
67static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber, u8 deviceId) 53static inline u64 HvCallXm_testBus(u16 busNumber)
68{ 54{
69 u64 busUnitNumber = (subBusNumber << 8) | deviceId; 55 return HvCall1(HvCallXmTestBus, busNumber);
70 u64 retVal = HvCall2(HvCallXmTestBusUnit, busNumber, busUnitNumber);
71 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
72 return retVal;
73} 56}
74//===================================================================================== 57
75static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber, u8 deviceId, 58static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber,
76 u64 interruptToken) 59 u8 deviceId)
77{ 60{
78 u64 busUnitNumber = (subBusNumber << 8) | deviceId; 61 return HvCall2(HvCallXmTestBusUnit, busNumber,
79 u64 queueIndex = 0; // HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard)); 62 (subBusNumber << 8) | deviceId);
63}
80 64
81 u64 retVal = HvCall5(HvCallXmConnectBusUnit, busNumber, busUnitNumber, 65static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber,
82 interruptToken, 0, queueIndex); 66 u8 deviceId, u64 interruptToken)
83 // getPaca()->adjustHmtForNoOfSpinLocksHeld(); 67{
84 return retVal; 68 return HvCall5(HvCallXmConnectBusUnit, busNumber,
69 (subBusNumber << 8) | deviceId, interruptToken, 0,
70 0 /* HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard)) */);
85} 71}
86//===================================================================================== 72
87static inline u64 HvCallXm_loadTod(void) 73static inline u64 HvCallXm_loadTod(void)
88{ 74{
89 u64 retVal = HvCall0(HvCallXmLoadTod); 75 return HvCall0(HvCallXmLoadTod);
90 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
91 return retVal;
92} 76}
93//=====================================================================================
94 77
95#endif /* _HVCALLXM_H */ 78#endif /* _HVCALLXM_H */
diff --git a/include/asm-ppc64/iSeries/HvLpConfig.h b/include/asm-ppc64/iSeries/HvLpConfig.h
index bdbd70f42c9d..f1cf1e70ca3c 100644
--- a/include/asm-ppc64/iSeries/HvLpConfig.h
+++ b/include/asm-ppc64/iSeries/HvLpConfig.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvLpConfig.h 2 * HvLpConfig.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,262 +19,120 @@
19#ifndef _HVLPCONFIG_H 19#ifndef _HVLPCONFIG_H
20#define _HVLPCONFIG_H 20#define _HVLPCONFIG_H
21 21
22//=========================================================================== 22/*
23// 23 * This file contains the interface to the LPAR configuration data
24// This file contains the interface to the LPAR configuration data 24 * to determine which resources should be allocated to each partition.
25// to determine which resources should be allocated to each partition. 25 */
26//
27//===========================================================================
28 26
29#include <asm/iSeries/HvCallCfg.h> 27#include <asm/iSeries/HvCallSc.h>
30#include <asm/iSeries/HvTypes.h> 28#include <asm/iSeries/HvTypes.h>
31#include <asm/iSeries/ItLpNaca.h> 29#include <asm/iSeries/ItLpNaca.h>
32#include <asm/iSeries/LparData.h>
33 30
34//------------------------------------------------------------------- 31enum {
35// Constants 32 HvCallCfg_Cur = 0,
36//------------------------------------------------------------------- 33 HvCallCfg_Init = 1,
34 HvCallCfg_Max = 2,
35 HvCallCfg_Min = 3
36};
37
38#define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6
39#define HvCallCfgGetPhysicalProcessors HvCallCfg + 7
40#define HvCallCfgGetMsChunks HvCallCfg + 9
41#define HvCallCfgGetSharedPoolIndex HvCallCfg + 20
42#define HvCallCfgGetSharedProcUnits HvCallCfg + 21
43#define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22
44#define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30
45#define HvCallCfgGetHostingLpIndex HvCallCfg + 32
37 46
38extern HvLpIndex HvLpConfig_getLpIndex_outline(void); 47extern HvLpIndex HvLpConfig_getLpIndex_outline(void);
39 48
40//===================================================================
41static inline HvLpIndex HvLpConfig_getLpIndex(void) 49static inline HvLpIndex HvLpConfig_getLpIndex(void)
42{ 50{
43 return itLpNaca.xLpIndex; 51 return itLpNaca.xLpIndex;
44} 52}
45//=================================================================== 53
46static inline HvLpIndex HvLpConfig_getPrimaryLpIndex(void) 54static inline HvLpIndex HvLpConfig_getPrimaryLpIndex(void)
47{ 55{
48 return itLpNaca.xPrimaryLpIndex; 56 return itLpNaca.xPrimaryLpIndex;
49} 57}
50//================================================================= 58
51static inline HvLpIndex HvLpConfig_getLps(void) 59static inline u64 HvLpConfig_getMsChunks(void)
52{
53 return HvCallCfg_getLps();
54}
55//=================================================================
56static inline HvLpIndexMap HvLpConfig_getActiveLpMap(void)
57{
58 return HvCallCfg_getActiveLpMap();
59}
60//=================================================================
61static inline u64 HvLpConfig_getSystemMsMegs(void)
62{
63 return HvCallCfg_getSystemMsChunks() / HVCHUNKSPERMEG;
64}
65//=================================================================
66static inline u64 HvLpConfig_getSystemMsChunks(void)
67{
68 return HvCallCfg_getSystemMsChunks();
69}
70//=================================================================
71static inline u64 HvLpConfig_getSystemMsPages(void)
72{
73 return HvCallCfg_getSystemMsChunks() * HVPAGESPERCHUNK;
74}
75//================================================================
76static inline u64 HvLpConfig_getMsMegs(void)
77{
78 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur) / HVCHUNKSPERMEG;
79}
80//================================================================
81static inline u64 HvLpConfig_getMsChunks(void)
82{
83 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
84}
85//================================================================
86static inline u64 HvLpConfig_getMsPages(void)
87{
88 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur) * HVPAGESPERCHUNK;
89}
90//================================================================
91static inline u64 HvLpConfig_getMinMsMegs(void)
92{
93 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min) / HVCHUNKSPERMEG;
94}
95//================================================================
96static inline u64 HvLpConfig_getMinMsChunks(void)
97{
98 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min);
99}
100//================================================================
101static inline u64 HvLpConfig_getMinMsPages(void)
102{
103 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min) * HVPAGESPERCHUNK;
104}
105//================================================================
106static inline u64 HvLpConfig_getMinRuntimeMsMegs(void)
107{
108 return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex()) / HVCHUNKSPERMEG;
109}
110//===============================================================
111static inline u64 HvLpConfig_getMinRuntimeMsChunks(void)
112{
113 return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex());
114}
115//===============================================================
116static inline u64 HvLpConfig_getMinRuntimeMsPages(void)
117{
118 return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex()) * HVPAGESPERCHUNK;
119}
120//===============================================================
121static inline u64 HvLpConfig_getMaxMsMegs(void)
122{
123 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max) / HVCHUNKSPERMEG;
124}
125//===============================================================
126static inline u64 HvLpConfig_getMaxMsChunks(void)
127{
128 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max);
129}
130//===============================================================
131static inline u64 HvLpConfig_getMaxMsPages(void)
132{
133 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max) * HVPAGESPERCHUNK;
134}
135//===============================================================
136static inline u64 HvLpConfig_getInitMsMegs(void)
137{
138 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init) / HVCHUNKSPERMEG;
139}
140//===============================================================
141static inline u64 HvLpConfig_getInitMsChunks(void)
142{
143 return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init);
144}
145//===============================================================
146static inline u64 HvLpConfig_getInitMsPages(void)
147{ return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init) * HVPAGESPERCHUNK;
148}
149//===============================================================
150static inline u64 HvLpConfig_getSystemPhysicalProcessors(void)
151{
152 return HvCallCfg_getSystemPhysicalProcessors();
153}
154//===============================================================
155static inline u64 HvLpConfig_getSystemLogicalProcessors(void)
156{
157 return HvCallCfg_getSystemPhysicalProcessors() * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
158}
159//===============================================================
160static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
161{
162 return HvCallCfg_getNumProcsInSharedPool(sPI);
163}
164//===============================================================
165static inline u64 HvLpConfig_getPhysicalProcessors(void)
166{
167 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
168}
169//===============================================================
170static inline u64 HvLpConfig_getLogicalProcessors(void)
171{
172 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Cur) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
173}
174//===============================================================
175static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void)
176{
177 return HvCallCfg_getSharedPoolIndex(HvLpConfig_getLpIndex());
178}
179//===============================================================
180static inline u64 HvLpConfig_getSharedProcUnits(void)
181{
182 return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
183}
184//===============================================================
185static inline u64 HvLpConfig_getMinSharedProcUnits(void)
186{
187 return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Min);
188}
189//===============================================================
190static inline u64 HvLpConfig_getMaxSharedProcUnits(void)
191{
192 return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Max);
193}
194//===============================================================
195static inline u64 HvLpConfig_getMinPhysicalProcessors(void)
196{
197 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Min);
198}
199//===============================================================
200static inline u64 HvLpConfig_getMinLogicalProcessors(void)
201{
202 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Min) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
203}
204//===============================================================
205static inline u64 HvLpConfig_getMaxPhysicalProcessors(void)
206{
207 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Max);
208}
209//===============================================================
210static inline u64 HvLpConfig_getMaxLogicalProcessors(void)
211{
212 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Max) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
213}
214//===============================================================
215static inline u64 HvLpConfig_getInitPhysicalProcessors(void)
216{ 60{
217 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Init); 61 return HvCall2(HvCallCfgGetMsChunks, HvLpConfig_getLpIndex(),
62 HvCallCfg_Cur);
218} 63}
219//=============================================================== 64
220static inline u64 HvLpConfig_getInitLogicalProcessors(void) 65static inline u64 HvLpConfig_getSystemPhysicalProcessors(void)
221{ 66{
222 return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Init) * (/*getPaca()->getSecondaryThreadCount() +*/ 1); 67 return HvCall0(HvCallCfgGetSystemPhysicalProcessors);
223} 68}
224//================================================================ 69
225static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void) 70static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
226{ 71{
227 return HvCallCfg_getVirtualLanIndexMap(HvLpConfig_getLpIndex_outline()); 72 return (u16)HvCall1(HvCallCfgGetNumProcsInSharedPool, sPI);
228} 73}
229//=============================================================== 74
230static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp(HvLpIndex lp) 75static inline u64 HvLpConfig_getPhysicalProcessors(void)
231{ 76{
232 return HvCallCfg_getVirtualLanIndexMap(lp); 77 return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(),
78 HvCallCfg_Cur);
233} 79}
234//================================================================ 80
235static inline HvLpIndex HvLpConfig_getBusOwner(HvBusNumber busNumber) 81static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void)
236{ 82{
237 return HvCallCfg_getBusOwner(busNumber); 83 return HvCall1(HvCallCfgGetSharedPoolIndex, HvLpConfig_getLpIndex());
238} 84}
239//=============================================================== 85
240static inline int HvLpConfig_isBusDedicated(HvBusNumber busNumber) 86static inline u64 HvLpConfig_getSharedProcUnits(void)
241{ 87{
242 return HvCallCfg_isBusDedicated(busNumber); 88 return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(),
89 HvCallCfg_Cur);
243} 90}
244//================================================================ 91
245static inline HvLpIndexMap HvLpConfig_getBusAllocation(HvBusNumber busNumber) 92static inline u64 HvLpConfig_getMaxSharedProcUnits(void)
246{ 93{
247 return HvCallCfg_getBusAllocation(busNumber); 94 return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(),
95 HvCallCfg_Max);
248} 96}
249//================================================================ 97
250// returns the absolute real address of the load area 98static inline u64 HvLpConfig_getMaxPhysicalProcessors(void)
251static inline u64 HvLpConfig_getLoadAddress(void)
252{ 99{
253 return itLpNaca.xLoadAreaAddr & 0x7fffffffffffffff; 100 return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(),
101 HvCallCfg_Max);
254} 102}
255//================================================================ 103
256static inline u64 HvLpConfig_getLoadPages(void) 104static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp(
257{ 105 HvLpIndex lp)
258 return itLpNaca.xLoadAreaChunks * HVPAGESPERCHUNK; 106{
107 /*
108 * This is a new function in V5R1 so calls to this on older
109 * hypervisors will return -1
110 */
111 u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp);
112 if (retVal == -1)
113 retVal = 0;
114 return retVal;
259} 115}
260//================================================================ 116
261static inline int HvLpConfig_isBusOwnedByThisLp(HvBusNumber busNumber) 117static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void)
262{ 118{
263 HvLpIndex busOwner = HvLpConfig_getBusOwner(busNumber); 119 return HvLpConfig_getVirtualLanIndexMapForLp(
264 return (busOwner == HvLpConfig_getLpIndex()); 120 HvLpConfig_getLpIndex_outline());
265} 121}
266//================================================================ 122
267static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1, HvLpIndex lp2) 123static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1,
124 HvLpIndex lp2)
268{ 125{
269 HvLpVirtualLanIndexMap virtualLanIndexMap1 = HvCallCfg_getVirtualLanIndexMap( lp1 ); 126 HvLpVirtualLanIndexMap virtualLanIndexMap1 =
270 HvLpVirtualLanIndexMap virtualLanIndexMap2 = HvCallCfg_getVirtualLanIndexMap( lp2 ); 127 HvLpConfig_getVirtualLanIndexMapForLp(lp1);
128 HvLpVirtualLanIndexMap virtualLanIndexMap2 =
129 HvLpConfig_getVirtualLanIndexMapForLp(lp2);
271 return ((virtualLanIndexMap1 & virtualLanIndexMap2) != 0); 130 return ((virtualLanIndexMap1 & virtualLanIndexMap2) != 0);
272} 131}
273//================================================================ 132
274static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp) 133static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp)
275{ 134{
276 return HvCallCfg_getHostingLpIndex(lp); 135 return HvCall1(HvCallCfgGetHostingLpIndex, lp);
277} 136}
278//================================================================
279 137
280#endif /* _HVLPCONFIG_H */ 138#endif /* _HVLPCONFIG_H */
diff --git a/include/asm-ppc64/iSeries/HvLpEvent.h b/include/asm-ppc64/iSeries/HvLpEvent.h
index 30936e433064..865000de79b6 100644
--- a/include/asm-ppc64/iSeries/HvLpEvent.h
+++ b/include/asm-ppc64/iSeries/HvLpEvent.h
@@ -1,27 +1,24 @@
1/* 1/*
2 * HvLpEvent.h 2 * HvLpEvent.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20//====================================================================== 20/* This file contains the class for HV events in the system. */
21// 21
22// This file contains the class for HV events in the system.
23//
24//=====================================================================
25#ifndef _HVLPEVENT_H 22#ifndef _HVLPEVENT_H
26#define _HVLPEVENT_H 23#define _HVLPEVENT_H
27 24
@@ -30,69 +27,70 @@
30#include <asm/iSeries/HvTypes.h> 27#include <asm/iSeries/HvTypes.h>
31#include <asm/iSeries/HvCallEvent.h> 28#include <asm/iSeries/HvCallEvent.h>
32 29
33//===================================================================== 30/*
34// 31 * HvLpEvent is the structure for Lp Event messages passed between
35// HvLpEvent is the structure for Lp Event messages passed between 32 * partitions through PLIC.
36// partitions through PLIC. 33 */
37// 34
38//===================================================================== 35struct HvEventFlags {
39 36 u8 xValid:1; /* Indicates a valid request x00-x00 */
40struct HvEventFlags 37 u8 xRsvd1:4; /* Reserved ... */
41{ 38 u8 xAckType:1; /* Immediate or deferred ... */
42 u8 xValid:1; // Indicates a valid request x00-x00 39 u8 xAckInd:1; /* Indicates if ACK required ... */
43 u8 xRsvd1:4; // Reserved ... 40 u8 xFunction:1; /* Interrupt or Acknowledge ... */
44 u8 xAckType:1; // Immediate or deferred ...
45 u8 xAckInd:1; // Indicates if ACK required ...
46 u8 xFunction:1; // Interrupt or Acknowledge ...
47}; 41};
48 42
49 43
50struct HvLpEvent 44struct HvLpEvent {
51{ 45 struct HvEventFlags xFlags; /* Event flags x00-x00 */
52 struct HvEventFlags xFlags; // Event flags x00-x00 46 u8 xType; /* Type of message x01-x01 */
53 u8 xType; // Type of message x01-x01 47 u16 xSubtype; /* Subtype for event x02-x03 */
54 u16 xSubtype; // Subtype for event x02-x03 48 u8 xSourceLp; /* Source LP x04-x04 */
55 u8 xSourceLp; // Source LP x04-x04 49 u8 xTargetLp; /* Target LP x05-x05 */
56 u8 xTargetLp; // Target LP x05-x05 50 u8 xSizeMinus1; /* Size of Derived class - 1 x06-x06 */
57 u8 xSizeMinus1; // Size of Derived class - 1 x06-x06 51 u8 xRc; /* RC for Ack flows x07-x07 */
58 u8 xRc; // RC for Ack flows x07-x07 52 u16 xSourceInstanceId; /* Source sides instance id x08-x09 */
59 u16 xSourceInstanceId; // Source sides instance id x08-x09 53 u16 xTargetInstanceId; /* Target sides instance id x0A-x0B */
60 u16 xTargetInstanceId; // Target sides instance id x0A-x0B
61 union { 54 union {
62 u32 xSubtypeData; // Data usable by the subtype x0C-x0F 55 u32 xSubtypeData; /* Data usable by the subtype x0C-x0F */
63 u16 xSubtypeDataShort[2]; // Data as 2 shorts 56 u16 xSubtypeDataShort[2]; /* Data as 2 shorts */
64 u8 xSubtypeDataChar[4]; // Data as 4 chars 57 u8 xSubtypeDataChar[4]; /* Data as 4 chars */
65 } x; 58 } x;
66 59
67 u64 xCorrelationToken; // Unique value for source/type x10-x17 60 u64 xCorrelationToken; /* Unique value for source/type x10-x17 */
68}; 61};
69 62
70// Lp Event handler function
71typedef void (*LpEventHandler)(struct HvLpEvent *, struct pt_regs *); 63typedef void (*LpEventHandler)(struct HvLpEvent *, struct pt_regs *);
72 64
73// Register a handler for an event type 65/* Register a handler for an event type - returns 0 on success */
74// returns 0 on success 66extern int HvLpEvent_registerHandler(HvLpEvent_Type eventType,
75extern int HvLpEvent_registerHandler( HvLpEvent_Type eventType, LpEventHandler hdlr); 67 LpEventHandler hdlr);
76
77// Unregister a handler for an event type
78// This call will sleep until the handler being removed is guaranteed to
79// be no longer executing on any CPU. Do not call with locks held.
80//
81// returns 0 on success
82// Unregister will fail if there are any paths open for the type
83extern int HvLpEvent_unregisterHandler( HvLpEvent_Type eventType );
84 68
85// Open an Lp Event Path for an event type 69/*
86// returns 0 on success 70 * Unregister a handler for an event type
87// openPath will fail if there is no handler registered for the event type. 71 *
88// The lpIndex specified is the partition index for the target partition 72 * This call will sleep until the handler being removed is guaranteed to
89// (for VirtualIo, VirtualLan and SessionMgr) other types specify zero) 73 * be no longer executing on any CPU. Do not call with locks held.
90extern int HvLpEvent_openPath( HvLpEvent_Type eventType, HvLpIndex lpIndex ); 74 *
75 * returns 0 on success
76 * Unregister will fail if there are any paths open for the type
77 */
78extern int HvLpEvent_unregisterHandler(HvLpEvent_Type eventType);
91 79
80/*
81 * Open an Lp Event Path for an event type
82 * returns 0 on success
83 * openPath will fail if there is no handler registered for the event type.
84 * The lpIndex specified is the partition index for the target partition
85 * (for VirtualIo, VirtualLan and SessionMgr) other types specify zero)
86 */
87extern int HvLpEvent_openPath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
92 88
93// Close an Lp Event Path for a type and partition 89/*
94// returns 0 on sucess 90 * Close an Lp Event Path for a type and partition
95extern int HvLpEvent_closePath( HvLpEvent_Type eventType, HvLpIndex lpIndex ); 91 * returns 0 on sucess
92 */
93extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
96 94
97#define HvLpEvent_Type_Hypervisor 0 95#define HvLpEvent_Type_Hypervisor 0
98#define HvLpEvent_Type_MachineFac 1 96#define HvLpEvent_Type_MachineFac 1
@@ -141,4 +139,4 @@ extern int HvLpEvent_closePath( HvLpEvent_Type eventType, HvLpIndex lpIndex );
141#define HvLpDma_Rc_InvalidAddress 4 139#define HvLpDma_Rc_InvalidAddress 4
142#define HvLpDma_Rc_InvalidLength 5 140#define HvLpDma_Rc_InvalidLength 5
143 141
144#endif // _HVLPEVENT_H 142#endif /* _HVLPEVENT_H */
diff --git a/include/asm-ppc64/iSeries/HvReleaseData.h b/include/asm-ppc64/iSeries/HvReleaseData.h
index 183e5e738c26..01a1f13ea4a0 100644
--- a/include/asm-ppc64/iSeries/HvReleaseData.h
+++ b/include/asm-ppc64/iSeries/HvReleaseData.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvReleaseData.h 2 * HvReleaseData.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,47 +19,45 @@
19#ifndef _HVRELEASEDATA_H 19#ifndef _HVRELEASEDATA_H
20#define _HVRELEASEDATA_H 20#define _HVRELEASEDATA_H
21 21
22//============================================================================= 22/*
23// 23 * This control block contains the critical information about the
24// This control block contains the critical information about the 24 * release so that it can be changed in the future (ie, the virtual
25// release so that it can be changed in the future (ie, the virtual 25 * address of the OS's NACA).
26// address of the OS's NACA). 26 */
27//
28#include <asm/types.h> 27#include <asm/types.h>
29#include <asm/naca.h> 28#include <asm/naca.h>
30 29
31//============================================================================= 30/*
32// 31 * When we IPL a secondary partition, we will check if if the
33// When we IPL a secondary partition, we will check if if the 32 * secondary xMinPlicVrmIndex > the primary xVrmIndex.
34// secondary xMinPlicVrmIndex > the primary xVrmIndex. 33 * If it is then this tells PLIC that this secondary is not
35// If it is then this tells PLIC that this secondary is not 34 * supported running on this "old" of a level of PLIC.
36// supported running on this "old" of a level of PLIC. 35 *
37// 36 * Likewise, we will compare the primary xMinSlicVrmIndex to
38// Likewise, we will compare the primary xMinSlicVrmIndex to 37 * the secondary xVrmIndex.
39// the secondary xVrmIndex. 38 * If the primary xMinSlicVrmDelta > secondary xVrmDelta then we
40// If the primary xMinSlicVrmDelta > secondary xVrmDelta then we 39 * know that this PLIC does not support running an OS "that old".
41// know that this PLIC does not support running an OS "that old". 40 */
42//
43//=============================================================================
44 41
45struct HvReleaseData 42struct HvReleaseData {
46{ 43 u32 xDesc; /* Descriptor "HvRD" ebcdic x00-x03 */
47 u32 xDesc; // Descriptor "HvRD" ebcdic x00-x03 44 u16 xSize; /* Size of this control block x04-x05 */
48 u16 xSize; // Size of this control block x04-x05 45 u16 xVpdAreasPtrOffset; /* Offset in NACA of ItVpdAreas x06-x07 */
49 u16 xVpdAreasPtrOffset; // Offset in NACA of ItVpdAreas x06-x07 46 struct naca_struct *xSlicNacaAddr; /* Virt addr of SLIC NACA x08-x0F */
50 struct naca_struct * xSlicNacaAddr; // Virt addr of SLIC NACA x08-x0F 47 u32 xMsNucDataOffset; /* Offset of Linux Mapping Data x10-x13 */
51 u32 xMsNucDataOffset; // Offset of Linux Mapping Data x10-x13 48 u32 xRsvd1; /* Reserved x14-x17 */
52 u32 xRsvd1; // Reserved x14-x17 49 u16 xTagsMode:1; /* 0 == tags active, 1 == tags inactive */
53 u16 xTagsMode:1; // 0 == tags active, 1 == tags inactive 50 u16 xAddressSize:1; /* 0 == 64-bit, 1 == 32-bit */
54 u16 xAddressSize:1; // 0 == 64-bit, 1 == 32-bit 51 u16 xNoSharedProcs:1; /* 0 == shared procs, 1 == no shared */
55 u16 xNoSharedProcs:1; // 0 == shared procs, 1 == no shared 52 u16 xNoHMT:1; /* 0 == allow HMT, 1 == no HMT */
56 u16 xNoHMT:1; // 0 == allow HMT, 1 == no HMT 53 u16 xRsvd2:12; /* Reserved x18-x19 */
57 u16 xRsvd2:12; // Reserved x18-x19 54 u16 xVrmIndex; /* VRM Index of OS image x1A-x1B */
58 u16 xVrmIndex; // VRM Index of OS image x1A-x1B 55 u16 xMinSupportedPlicVrmIndex; /* Min PLIC level (soft) x1C-x1D */
59 u16 xMinSupportedPlicVrmIndex;// Min PLIC level (soft) x1C-x1D 56 u16 xMinCompatablePlicVrmIndex; /* Min PLIC levelP (hard) x1E-x1F */
60 u16 xMinCompatablePlicVrmIndex;// Min PLIC levelP (hard) x1E-x1F 57 char xVrmName[12]; /* Displayable name x20-x2B */
61 char xVrmName[12]; // Displayable name x20-x2B 58 char xRsvd3[20]; /* Reserved x2C-x3F */
62 char xRsvd3[20]; // Reserved x2C-x3F
63}; 59};
64 60
61extern struct HvReleaseData hvReleaseData;
62
65#endif /* _HVRELEASEDATA_H */ 63#endif /* _HVRELEASEDATA_H */
diff --git a/include/asm-ppc64/iSeries/HvTypes.h b/include/asm-ppc64/iSeries/HvTypes.h
index 3ec49c1aec32..b1ef2b4cb3e3 100644
--- a/include/asm-ppc64/iSeries/HvTypes.h
+++ b/include/asm-ppc64/iSeries/HvTypes.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * HvTypes.h 2 * HvTypes.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,74 +19,60 @@
19#ifndef _HVTYPES_H 19#ifndef _HVTYPES_H
20#define _HVTYPES_H 20#define _HVTYPES_H
21 21
22//=========================================================================== 22/*
23// Header File Id 23 * General typedefs for the hypervisor.
24// Name______________: HvTypes.H 24 */
25//
26// Description_______:
27//
28// General typedefs for the hypervisor.
29//
30// Declared Class(es):
31//
32//===========================================================================
33 25
34#include <asm/types.h> 26#include <asm/types.h>
35 27
36//-------------------------------------------------------------------
37// Typedefs
38//-------------------------------------------------------------------
39typedef u8 HvLpIndex; 28typedef u8 HvLpIndex;
40typedef u16 HvLpInstanceId; 29typedef u16 HvLpInstanceId;
41typedef u64 HvLpTOD; 30typedef u64 HvLpTOD;
42typedef u64 HvLpSystemSerialNum; 31typedef u64 HvLpSystemSerialNum;
43typedef u8 HvLpDeviceSerialNum[12]; 32typedef u8 HvLpDeviceSerialNum[12];
44typedef u16 HvLpSanHwSet; 33typedef u16 HvLpSanHwSet;
45typedef u16 HvLpBus; 34typedef u16 HvLpBus;
46typedef u16 HvLpBoard; 35typedef u16 HvLpBoard;
47typedef u16 HvLpCard; 36typedef u16 HvLpCard;
48typedef u8 HvLpDeviceType[4]; 37typedef u8 HvLpDeviceType[4];
49typedef u8 HvLpDeviceModel[3]; 38typedef u8 HvLpDeviceModel[3];
50typedef u64 HvIoToken; 39typedef u64 HvIoToken;
51typedef u8 HvLpName[8]; 40typedef u8 HvLpName[8];
52typedef u32 HvIoId; 41typedef u32 HvIoId;
53typedef u64 HvRealMemoryIndex; 42typedef u64 HvRealMemoryIndex;
54typedef u32 HvLpIndexMap; // Must hold HvMaxArchitectedLps bits!!! 43typedef u32 HvLpIndexMap; /* Must hold HVMAXARCHITECTEDLPS bits!!! */
55typedef u16 HvLpVrmIndex; 44typedef u16 HvLpVrmIndex;
56typedef u32 HvXmGenerationId; 45typedef u32 HvXmGenerationId;
57typedef u8 HvLpBusPool; 46typedef u8 HvLpBusPool;
58typedef u8 HvLpSharedPoolIndex; 47typedef u8 HvLpSharedPoolIndex;
59typedef u16 HvLpSharedProcUnitsX100; 48typedef u16 HvLpSharedProcUnitsX100;
60typedef u8 HvLpVirtualLanIndex; 49typedef u8 HvLpVirtualLanIndex;
61typedef u16 HvLpVirtualLanIndexMap; // Must hold HvMaxArchitectedVirtualLans bits!!! 50typedef u16 HvLpVirtualLanIndexMap; /* Must hold HVMAXARCHITECTEDVIRTUALLANS bits!!! */
62typedef u16 HvBusNumber; // Hypervisor Bus Number 51typedef u16 HvBusNumber; /* Hypervisor Bus Number */
63typedef u8 HvSubBusNumber; // Hypervisor SubBus Number 52typedef u8 HvSubBusNumber; /* Hypervisor SubBus Number */
64typedef u8 HvAgentId; // Hypervisor DevFn 53typedef u8 HvAgentId; /* Hypervisor DevFn */
54
65 55
56#define HVMAXARCHITECTEDLPS 32
57#define HVMAXARCHITECTEDVIRTUALLANS 16
58#define HVMAXARCHITECTEDVIRTUALDISKS 32
59#define HVMAXARCHITECTEDVIRTUALCDROMS 8
60#define HVMAXARCHITECTEDVIRTUALTAPES 8
61#define HVCHUNKSIZE (256 * 1024)
62#define HVPAGESIZE (4 * 1024)
63#define HVLPMINMEGSPRIMARY 256
64#define HVLPMINMEGSSECONDARY 64
65#define HVCHUNKSPERMEG 4
66#define HVPAGESPERMEG 256
67#define HVPAGESPERCHUNK 64
66 68
67#define HVMAXARCHITECTEDLPS 32
68#define HVMAXARCHITECTEDVIRTUALLANS 16
69#define HVMAXARCHITECTEDVIRTUALDISKS 32
70#define HVMAXARCHITECTEDVIRTUALCDROMS 8
71#define HVMAXARCHITECTEDVIRTUALTAPES 8
72#define HVCHUNKSIZE 256 * 1024
73#define HVPAGESIZE 4 * 1024
74#define HVLPMINMEGSPRIMARY 256
75#define HVLPMINMEGSSECONDARY 64
76#define HVCHUNKSPERMEG 4
77#define HVPAGESPERMEG 256
78#define HVPAGESPERCHUNK 64
79
80#define HvMaxArchitectedLps ((HvLpIndex)HVMAXARCHITECTEDLPS)
81#define HvMaxArchitectedVirtualLans ((HvLpVirtualLanIndex)16)
82#define HvLpIndexInvalid ((HvLpIndex)0xff) 69#define HvLpIndexInvalid ((HvLpIndex)0xff)
83 70
84//-------------------------------------------------------------------- 71/*
85// Enums for the sub-components under PLIC 72 * Enums for the sub-components under PLIC
86// Used in HvCall and HvPrimaryCall 73 * Used in HvCall and HvPrimaryCall
87//-------------------------------------------------------------------- 74 */
88enum HvCallCompIds 75enum {
89{
90 HvCallCompId = 0, 76 HvCallCompId = 0,
91 HvCallCpuCtlsCompId = 1, 77 HvCallCpuCtlsCompId = 1,
92 HvCallCfgCompId = 2, 78 HvCallCfgCompId = 2,
@@ -97,18 +83,18 @@ enum HvCallCompIds
97 HvCallSmCompId = 7, 83 HvCallSmCompId = 7,
98 HvCallSpdCompId = 8, 84 HvCallSpdCompId = 8,
99 HvCallXmCompId = 9, 85 HvCallXmCompId = 9,
100 HvCallRioCompId = 10, 86 HvCallRioCompId = 10,
101 HvCallRsvd3CompId = 11, 87 HvCallRsvd3CompId = 11,
102 HvCallRsvd2CompId = 12, 88 HvCallRsvd2CompId = 12,
103 HvCallRsvd1CompId = 13, 89 HvCallRsvd1CompId = 13,
104 HvCallMaxCompId = 14, 90 HvCallMaxCompId = 14,
105 HvPrimaryCallCompId = 0, 91 HvPrimaryCallCompId = 0,
106 HvPrimaryCallCfgCompId = 1, 92 HvPrimaryCallCfgCompId = 1,
107 HvPrimaryCallPciCompId = 2, 93 HvPrimaryCallPciCompId = 2,
108 HvPrimaryCallSmCompId = 3, 94 HvPrimaryCallSmCompId = 3,
109 HvPrimaryCallSpdCompId = 4, 95 HvPrimaryCallSpdCompId = 4,
110 HvPrimaryCallXmCompId = 5, 96 HvPrimaryCallXmCompId = 5,
111 HvPrimaryCallRioCompId = 6, 97 HvPrimaryCallRioCompId = 6,
112 HvPrimaryCallRsvd7CompId = 7, 98 HvPrimaryCallRsvd7CompId = 7,
113 HvPrimaryCallRsvd6CompId = 8, 99 HvPrimaryCallRsvd6CompId = 8,
114 HvPrimaryCallRsvd5CompId = 9, 100 HvPrimaryCallRsvd5CompId = 9,
@@ -116,7 +102,7 @@ enum HvCallCompIds
116 HvPrimaryCallRsvd3CompId = 11, 102 HvPrimaryCallRsvd3CompId = 11,
117 HvPrimaryCallRsvd2CompId = 12, 103 HvPrimaryCallRsvd2CompId = 12,
118 HvPrimaryCallRsvd1CompId = 13, 104 HvPrimaryCallRsvd1CompId = 13,
119 HvPrimaryCallMaxCompId = HvCallMaxCompId 105 HvPrimaryCallMaxCompId = HvCallMaxCompId
120}; 106};
121 107
122struct HvLpBufferList { 108struct HvLpBufferList {
diff --git a/include/asm-ppc64/iSeries/IoHriMainStore.h b/include/asm-ppc64/iSeries/IoHriMainStore.h
index ff00e865f620..45ed3ea67d06 100644
--- a/include/asm-ppc64/iSeries/IoHriMainStore.h
+++ b/include/asm-ppc64/iSeries/IoHriMainStore.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * IoHriMainStore.h 2 * IoHriMainStore.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -21,7 +21,7 @@
21#define _IOHRIMAINSTORE_H 21#define _IOHRIMAINSTORE_H
22 22
23/* Main Store Vpd for Condor,iStar,sStar */ 23/* Main Store Vpd for Condor,iStar,sStar */
24struct IoHriMainStoreSegment4 { 24struct IoHriMainStoreSegment4 {
25 u8 msArea0Exists:1; 25 u8 msArea0Exists:1;
26 u8 msArea1Exists:1; 26 u8 msArea1Exists:1;
27 u8 msArea2Exists:1; 27 u8 msArea2Exists:1;
@@ -51,7 +51,7 @@ struct IoHriMainStoreSegment4 {
51 u8 msArea1HasRiserVpd:1; 51 u8 msArea1HasRiserVpd:1;
52 u8 msArea2HasRiserVpd:1; 52 u8 msArea2HasRiserVpd:1;
53 u8 msArea3HasRiserVpd:1; 53 u8 msArea3HasRiserVpd:1;
54 u8 reserved5:4; 54 u8 reserved5:4;
55 u8 reserved6; 55 u8 reserved6;
56 u16 reserved7; 56 u16 reserved7;
57 57
@@ -82,8 +82,8 @@ struct IoHriMainStoreVpdFruData {
82}; 82};
83 83
84struct IoHriMainStoreAdrRangeBlock { 84struct IoHriMainStoreAdrRangeBlock {
85 void * blockStart __attribute((packed)); 85 void *blockStart __attribute((packed));
86 void * blockEnd __attribute((packed)); 86 void *blockEnd __attribute((packed));
87 u32 blockProcChipId __attribute((packed)); 87 u32 blockProcChipId __attribute((packed));
88}; 88};
89 89
@@ -102,7 +102,7 @@ struct IoHriMainStoreArea4 {
102 u32 procNodeId __attribute((packed)); 102 u32 procNodeId __attribute((packed));
103 103
104 u32 numAdrRangeBlocks __attribute((packed)); 104 u32 numAdrRangeBlocks __attribute((packed));
105 struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed)); 105 struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed));
106 106
107 struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed)); 107 struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed));
108 struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed)); 108 struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed));
@@ -113,17 +113,17 @@ struct IoHriMainStoreArea4 {
113 struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed)); 113 struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed));
114 struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed)); 114 struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed));
115 115
116 void * msRamAreaArray __attribute((packed)); 116 void *msRamAreaArray __attribute((packed));
117 u32 msRamAreaArrayNumEntries __attribute((packed)); 117 u32 msRamAreaArrayNumEntries __attribute((packed));
118 u32 msRamAreaArrayEntrySize __attribute((packed)); 118 u32 msRamAreaArrayEntrySize __attribute((packed));
119 119
120 u32 numaDimmExists __attribute((packed)); 120 u32 numaDimmExists __attribute((packed));
121 u32 numaDimmFunctional __attribute((packed)); 121 u32 numaDimmFunctional __attribute((packed));
122 void * numaDimmArray __attribute((packed)); 122 void *numaDimmArray __attribute((packed));
123 u32 numaDimmArrayNumEntries __attribute((packed)); 123 u32 numaDimmArrayNumEntries __attribute((packed));
124 u32 numaDimmArrayEntrySize __attribute((packed)); 124 u32 numaDimmArrayEntrySize __attribute((packed));
125 125
126 struct IoHriMainStoreVpdIdData idData __attribute((packed)); 126 struct IoHriMainStoreVpdIdData idData __attribute((packed));
127 127
128 u64 powerData __attribute((packed)); 128 u64 powerData __attribute((packed));
129 u64 cardAssemblyPartNum __attribute((packed)); 129 u64 cardAssemblyPartNum __attribute((packed));
@@ -143,7 +143,7 @@ struct IoHriMainStoreArea4 {
143}; 143};
144 144
145 145
146struct IoHriMainStoreSegment5 { 146struct IoHriMainStoreSegment5 {
147 u16 reserved1; 147 u16 reserved1;
148 u8 reserved2; 148 u8 reserved2;
149 u8 msVpdFormat; 149 u8 msVpdFormat;
@@ -151,17 +151,16 @@ struct IoHriMainStoreSegment5 {
151 u32 totalMainStore; 151 u32 totalMainStore;
152 u64 maxConfiguredMsAdr; 152 u64 maxConfiguredMsAdr;
153 153
154 struct IoHriMainStoreArea4* msAreaArray; 154 struct IoHriMainStoreArea4 *msAreaArray;
155 u32 msAreaArrayNumEntries; 155 u32 msAreaArrayNumEntries;
156 u32 msAreaArrayEntrySize; 156 u32 msAreaArrayEntrySize;
157 157
158 u32 msAreaExists; 158 u32 msAreaExists;
159 u32 msAreaFunctional; 159 u32 msAreaFunctional;
160 160
161 u64 reserved3; 161 u64 reserved3;
162}; 162};
163 163
164extern u64 xMsVpd[];
164 165
165 166#endif /* _IOHRIMAINSTORE_H */
166#endif // _IOHRIMAINSTORE_H
167
diff --git a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h b/include/asm-ppc64/iSeries/IoHriProcessorVpd.h
index 965433888653..73b73d80b8b1 100644
--- a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h
+++ b/include/asm-ppc64/iSeries/IoHriProcessorVpd.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * IoHriProcessorVpd.h 2 * IoHriProcessorVpd.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,16 +19,12 @@
19#ifndef _IOHRIPROCESSORVPD_H 19#ifndef _IOHRIPROCESSORVPD_H
20#define _IOHRIPROCESSORVPD_H 20#define _IOHRIPROCESSORVPD_H
21 21
22//===================================================================
23//
24// This struct maps Processor Vpd that is DMAd to SLIC by CSP
25//
26
27#include <asm/types.h> 22#include <asm/types.h>
28 23
29struct IoHriProcessorVpd 24/*
30{ 25 * This struct maps Processor Vpd that is DMAd to SLIC by CSP
31 26 */
27struct IoHriProcessorVpd {
32 u8 xFormat; // VPD format indicator x00-x00 28 u8 xFormat; // VPD format indicator x00-x00
33 u8 xProcStatus:8; // Processor State x01-x01 29 u8 xProcStatus:8; // Processor State x01-x01
34 u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02 30 u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02
@@ -40,12 +36,12 @@ struct IoHriProcessorVpd
40 u16 xRsvd2; // Reserved x06-x07 36 u16 xRsvd2; // Reserved x06-x07
41 u32 xHwNodeId; // Hardware node id x08-x0B 37 u32 xHwNodeId; // Hardware node id x08-x0B
42 u32 xHwProcId; // Hardware processor id x0C-x0F 38 u32 xHwProcId; // Hardware processor id x0C-x0F
43 39
44 u32 xTypeNum; // Card Type/CCIN number x10-x13 40 u32 xTypeNum; // Card Type/CCIN number x10-x13
45 u32 xModelNum; // Model/Feature number x14-x17 41 u32 xModelNum; // Model/Feature number x14-x17
46 u64 xSerialNum; // Serial number x18-x1F 42 u64 xSerialNum; // Serial number x18-x1F
47 char xPartNum[12]; // Book Part or FPU number x20-x2B 43 char xPartNum[12]; // Book Part or FPU number x20-x2B
48 char xMfgID[4]; // Manufacturing ID x2C-x2F 44 char xMfgID[4]; // Manufacturing ID x2C-x2F
49 45
50 u32 xProcFreq; // Processor Frequency x30-x33 46 u32 xProcFreq; // Processor Frequency x30-x33
51 u32 xTimeBaseFreq; // Time Base Frequency x34-x37 47 u32 xTimeBaseFreq; // Time Base Frequency x34-x37
@@ -71,7 +67,7 @@ struct IoHriProcessorVpd
71 u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83 67 u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83
72 u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87 68 u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87
73 u64 xRsvd6; // Reserved x88-x8F 69 u64 xRsvd6; // Reserved x88-x8F
74 70
75 u64 xFruLabel; // Card Location Label x90-x97 71 u64 xFruLabel; // Card Location Label x90-x97
76 u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98 72 u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98
77 u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99 73 u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99
@@ -79,10 +75,12 @@ struct IoHriProcessorVpd
79 u8 xSmartCardPortNo; // Smart card port number x9C-x9C 75 u8 xSmartCardPortNo; // Smart card port number x9C-x9C
80 u8 xRsvd7; // Reserved x9D-x9D 76 u8 xRsvd7; // Reserved x9D-x9D
81 u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F 77 u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F
82 78
83 u8 xRsvd8[24]; // Reserved xA0-xB7 79 u8 xRsvd8[24]; // Reserved xA0-xB7
84 80
85 char xProcSrc[72]; // CSP format SRC xB8-xFF 81 char xProcSrc[72]; // CSP format SRC xB8-xFF
86}; 82};
87 83
84extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
85
88#endif /* _IOHRIPROCESSORVPD_H */ 86#endif /* _IOHRIPROCESSORVPD_H */
diff --git a/include/asm-ppc64/iSeries/ItExtVpdPanel.h b/include/asm-ppc64/iSeries/ItExtVpdPanel.h
index dee6b1273031..4c546a8802b4 100644
--- a/include/asm-ppc64/iSeries/ItExtVpdPanel.h
+++ b/include/asm-ppc64/iSeries/ItExtVpdPanel.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItExtVpdPanel.h 2 * ItExtVpdPanel.h
3 * Copyright (C) 2002 Dave Boutcher IBM Corporation 3 * Copyright (C) 2002 Dave Boutcher IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -20,39 +20,33 @@
20#define _ITEXTVPDPANEL_H 20#define _ITEXTVPDPANEL_H
21 21
22/* 22/*
23 * 23 * This struct maps the panel information
24 * This struct maps the panel information
25 * 24 *
26 * Warning: 25 * Warning:
27 * This data must match the architecture for the panel information 26 * This data must match the architecture for the panel information
28 *
29 */ 27 */
30 28
31
32/*-------------------------------------------------------------------
33 * Standard Includes
34 *-------------------------------------------------------------------
35*/
36#include <asm/types.h> 29#include <asm/types.h>
37 30
38struct ItExtVpdPanel 31struct ItExtVpdPanel {
39{ 32 /* Definition of the Extended Vpd On Panel Data Area */
40 // Definition of the Extended Vpd On Panel Data Area 33 char systemSerial[8];
41 char systemSerial[8]; 34 char mfgID[4];
42 char mfgID[4]; 35 char reserved1[24];
43 char reserved1[24]; 36 char machineType[4];
44 char machineType[4]; 37 char systemID[6];
45 char systemID[6]; 38 char somUniqueCnt[4];
46 char somUniqueCnt[4]; 39 char serialNumberCount;
47 char serialNumberCount; 40 char reserved2[7];
48 char reserved2[7]; 41 u16 bbu3;
49 u16 bbu3; 42 u16 bbu2;
50 u16 bbu2; 43 u16 bbu1;
51 u16 bbu1; 44 char xLocationLabel[8];
52 char xLocationLabel[8]; 45 u8 xRsvd1[6];
53 u8 xRsvd1[6]; 46 u16 xFrameId;
54 u16 xFrameId; 47 u8 xRsvd2[48];
55 u8 xRsvd2[48];
56}; 48};
57 49
58#endif /* _ITEXTVPDPANEL_H */ 50extern struct ItExtVpdPanel xItExtVpdPanel;
51
52#endif /* _ITEXTVPDPANEL_H */
diff --git a/include/asm-ppc64/iSeries/ItIplParmsReal.h b/include/asm-ppc64/iSeries/ItIplParmsReal.h
index 4d8b430ab12d..ae3417dc599e 100644
--- a/include/asm-ppc64/iSeries/ItIplParmsReal.h
+++ b/include/asm-ppc64/iSeries/ItIplParmsReal.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItIplParmsReal.h 2 * ItIplParmsReal.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,58 +19,53 @@
19#ifndef _ITIPLPARMSREAL_H 19#ifndef _ITIPLPARMSREAL_H
20#define _ITIPLPARMSREAL_H 20#define _ITIPLPARMSREAL_H
21 21
22//============================================================================== 22/*
23// 23 * This struct maps the IPL Parameters DMA'd from the SP.
24// This struct maps the IPL Parameters DMA'd from the SP. 24 *
25// 25 * Warning:
26// Warning: 26 * This data must map in exactly 64 bytes and match the architecture for
27// This data must map in exactly 64 bytes and match the architecture for 27 * the IPL parms
28// the IPL parms 28 */
29//
30//=============================================================================
31
32 29
33//-------------------------------------------------------------------
34// Standard Includes
35//-------------------------------------------------------------------
36#include <asm/types.h> 30#include <asm/types.h>
37 31
38struct ItIplParmsReal 32struct ItIplParmsReal {
39{ 33 u8 xFormat; // Defines format of IplParms x00-x00
40 u8 xFormat; // Defines format of IplParms x00-x00 34 u8 xRsvd01:6; // Reserved x01-x01
41 u8 xRsvd01:6; // Reserved x01-x01 35 u8 xAlternateSearch:1; // Alternate search indicator ...
42 u8 xAlternateSearch:1; // Alternate search indicator ... 36 u8 xUaSupplied:1; // UA Supplied on programmed IPL...
43 u8 xUaSupplied:1; // UA Supplied on programmed IPL ... 37 u8 xLsUaFormat; // Format byte for UA x02-x02
44 u8 xLsUaFormat; // Format byte for UA x02-x02 38 u8 xRsvd02; // Reserved x03-x03
45 u8 xRsvd02; // Reserved x03-x03 39 u32 xLsUa; // LS UA x04-x07
46 u32 xLsUa; // LS UA x04-x07 40 u32 xUnusedLsLid; // First OS LID to load x08-x0B
47 u32 xUnusedLsLid; // First OS LID to load x08-x0B 41 u16 xLsBusNumber; // LS Bus Number x0C-x0D
48 u16 xLsBusNumber; // LS Bus Number x0C-x0D 42 u8 xLsCardAdr; // LS Card Address x0E-x0E
49 u8 xLsCardAdr; // LS Card Address x0E-x0E 43 u8 xLsBoardAdr; // LS Board Address x0F-x0F
50 u8 xLsBoardAdr; // LS Board Address x0F-x0F 44 u32 xRsvd03; // Reserved x10-x13
51 u32 xRsvd03; // Reserved x10-x13 45 u8 xSpcnPresent:1; // SPCN present x14-x14
52 u8 xSpcnPresent:1; // SPCN present x14-x14 46 u8 xCpmPresent:1; // CPM present ...
53 u8 xCpmPresent:1; // CPM present ... 47 u8 xRsvd04:6; // Reserved ...
54 u8 xRsvd04:6; // Reserved ... 48 u8 xRsvd05:4; // Reserved x15-x15
55 u8 xRsvd05:4; // Reserved x15-x15 49 u8 xKeyLock:4; // Keylock setting ...
56 u8 xKeyLock:4; // Keylock setting ... 50 u8 xRsvd06:6; // Reserved x16-x16
57 u8 xRsvd06:6; // Reserved x16-x16 51 u8 xIplMode:2; // Ipl mode (A|B|C|D) ...
58 u8 xIplMode:2; // Ipl mode (A|B|C|D) ... 52 u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17
59 u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17 53 u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiatedx18-x19
60 u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiated x18-x19 54 u16 xPowerOnResetIpl:1; // Indicate POR condition ...
61 u16 xPowerOnResetIpl:1; // Indicate POR condition ... 55 u16 xMainStorePreserved:1; // Main Storage is preserved ...
62 u16 xMainStorePreserved:1; // Main Storage is preserved ... 56 u16 xRsvd07:13; // Reserved ...
63 u16 xRsvd07:13; // Reserved ... 57 u16 xIplSource:16; // Ipl source x1A-x1B
64 u16 xIplSource:16; // Ipl source x1A-x1B 58 u8 xIplReason:8; // Reason for this IPL x1C-x1C
65 u8 xIplReason:8; // Reason for this IPL x1C-x1C 59 u8 xRsvd08; // Reserved x1D-x1D
66 u8 xRsvd08; // Reserved x1D-x1D 60 u16 xRsvd09; // Reserved x1E-x1F
67 u16 xRsvd09; // Reserved x1E-x1F 61 u16 xSysBoxType; // System Box Type x20-x21
68 u16 xSysBoxType; // System Box Type x20-x21 62 u16 xSysProcType; // System Processor Type x22-x23
69 u16 xSysProcType; // System Processor Type x22-x23 63 u32 xRsvd10; // Reserved x24-x27
70 u32 xRsvd10; // Reserved x24-x27 64 u64 xRsvd11; // Reserved x28-x2F
71 u64 xRsvd11; // Reserved x28-x2F 65 u64 xRsvd12; // Reserved x30-x37
72 u64 xRsvd12; // Reserved x30-x37 66 u64 xRsvd13; // Reserved x38-x3F
73 u64 xRsvd13; // Reserved x38-x3F
74}; 67};
75 68
69extern struct ItIplParmsReal xItIplParmsReal;
70
76#endif /* _ITIPLPARMSREAL_H */ 71#endif /* _ITIPLPARMSREAL_H */
diff --git a/include/asm-ppc64/iSeries/ItLpNaca.h b/include/asm-ppc64/iSeries/ItLpNaca.h
index 5baffddfae1b..225d0176779d 100644
--- a/include/asm-ppc64/iSeries/ItLpNaca.h
+++ b/include/asm-ppc64/iSeries/ItLpNaca.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItLpNaca.h 2 * ItLpNaca.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,18 +19,15 @@
19#ifndef _ITLPNACA_H 19#ifndef _ITLPNACA_H
20#define _ITLPNACA_H 20#define _ITLPNACA_H
21 21
22//============================================================================= 22#include <linux/types.h>
23//
24// This control block contains the data that is shared between the
25// hypervisor (PLIC) and the OS.
26//
27//=============================================================================
28 23
29struct ItLpNaca 24/*
30{ 25 * This control block contains the data that is shared between the
31//============================================================================= 26 * hypervisor (PLIC) and the OS.
27 */
28
29struct ItLpNaca {
32// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data 30// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
33//=============================================================================
34 u32 xDesc; // Eye catcher x00-x03 31 u32 xDesc; // Eye catcher x00-x03
35 u16 xSize; // Size of this class x04-x05 32 u16 xSize; // Size of this class x04-x05
36 u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07 33 u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07
@@ -59,30 +56,25 @@ struct ItLpNaca
59 u64 xLoadAreaAddr; // ER address of load area x28-x2F 56 u64 xLoadAreaAddr; // ER address of load area x28-x2F
60 u32 xLoadAreaChunks; // Chunks for the load area x30-x33 57 u32 xLoadAreaChunks; // Chunks for the load area x30-x33
61 u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37 58 u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37
62 // doing an ASR switch on PASE 59 // doing an ASR switch on PASE
63 // system call. 60 // system call.
64 u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f 61 u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
65 u8 xRsvd1_4[64]; // x40-x7F 62 u8 xRsvd1_4[64]; // x40-x7F
66 63
67//=============================================================================
68// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data 64// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
69//=============================================================================
70 u8 xRsvd2_0[128]; // Reserved x00-x7F 65 u8 xRsvd2_0[128]; // Reserved x00-x7F
71 66
72//=============================================================================
73// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators 67// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
74// NB: Padding required to keep xInterrruptHdlr at x300 which is required 68// NB: Padding required to keep xInterrruptHdlr at x300 which is required
75// for v4r4 PLIC. 69// for v4r4 PLIC.
76//=============================================================================
77 u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F 70 u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F
78 u8 xRsvd3_0[384]; // Reserved 180-2FF 71 u8 xRsvd3_0[384]; // Reserved 180-2FF
79//============================================================================= 72
80// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt 73// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt
81// handlers 74// handlers
82//=============================================================================
83 u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF 75 u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF
84}; 76};
85 77
86//============================================================================= 78extern struct ItLpNaca itLpNaca;
87 79
88#endif /* _ITLPNACA_H */ 80#endif /* _ITLPNACA_H */
diff --git a/include/asm-ppc64/iSeries/ItLpQueue.h b/include/asm-ppc64/iSeries/ItLpQueue.h
index 4f4dde2a638d..393299e04d7f 100644
--- a/include/asm-ppc64/iSeries/ItLpQueue.h
+++ b/include/asm-ppc64/iSeries/ItLpQueue.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItLpQueue.h 2 * ItLpQueue.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,54 +19,54 @@
19#ifndef _ITLPQUEUE_H 19#ifndef _ITLPQUEUE_H
20#define _ITLPQUEUE_H 20#define _ITLPQUEUE_H
21 21
22//============================================================================= 22/*
23// 23 * This control block defines the simple LP queue structure that is
24// This control block defines the simple LP queue structure that is 24 * shared between the hypervisor (PLIC) and the OS in order to send
25// shared between the hypervisor (PLIC) and the OS in order to send 25 * events to an LP.
26// events to an LP. 26 */
27//
28 27
29#include <asm/types.h> 28#include <asm/types.h>
30#include <asm/ptrace.h> 29#include <asm/ptrace.h>
31 30
32struct HvLpEvent; 31struct HvLpEvent;
33 32
34#define ITMaxLpQueues 8 33#define ITMaxLpQueues 8
35 34
36#define NotUsed 0 // Queue will not be used by PLIC 35#define NotUsed 0 // Queue will not be used by PLIC
37#define DedicatedIo 1 // Queue dedicated to IO processor specified 36#define DedicatedIo 1 // Queue dedicated to IO processor specified
38#define DedicatedLp 2 // Queue dedicated to LP specified 37#define DedicatedLp 2 // Queue dedicated to LP specified
39#define Shared 3 // Queue shared for both IO and LP 38#define Shared 3 // Queue shared for both IO and LP
40 39
41#define LpEventStackSize 4096 40#define LpEventStackSize 4096
42#define LpEventMaxSize 256 41#define LpEventMaxSize 256
43#define LpEventAlign 64 42#define LpEventAlign 64
44 43
45struct ItLpQueue 44struct ItLpQueue {
46{ 45/*
47// 46 * The xSlicCurEventPtr is the pointer to the next event stack entry
48// The xSlicCurEventPtr is the pointer to the next event stack entry that will 47 * that will become valid. The OS must peek at this entry to determine
49// become valid. The OS must peek at this entry to determine if it is valid. 48 * if it is valid. PLIC will set the valid indicator as the very last
50// PLIC will set the valid indicator as the very last store into that entry. 49 * store into that entry.
51// 50 *
52// When the OS has completed processing of the event then it will mark the event 51 * When the OS has completed processing of the event then it will mark
53// as invalid so that PLIC knows it can store into that event location again. 52 * the event as invalid so that PLIC knows it can store into that event
54// 53 * location again.
55// If the event stack fills and there are overflow events, then PLIC will set 54 *
56// the xPlicOverflowIntPending flag in which case the OS will have to fetch the 55 * If the event stack fills and there are overflow events, then PLIC
57// additional LP events once they have drained the event stack. 56 * will set the xPlicOverflowIntPending flag in which case the OS will
58// 57 * have to fetch the additional LP events once they have drained the
59// The first 16-bytes are known by both the OS and PLIC. The remainder of the 58 * event stack.
60// cache line is for use by the OS. 59 *
61// 60 * The first 16-bytes are known by both the OS and PLIC. The remainder
62//============================================================================= 61 * of the cache line is for use by the OS.
62 */
63 u8 xPlicOverflowIntPending;// 0x00 Overflow events are pending 63 u8 xPlicOverflowIntPending;// 0x00 Overflow events are pending
64 u8 xPlicStatus; // 0x01 DedicatedIo or DedicatedLp or NotUsed 64 u8 xPlicStatus; // 0x01 DedicatedIo or DedicatedLp or NotUsed
65 u16 xSlicLogicalProcIndex; // 0x02 Logical Proc Index for correlation 65 u16 xSlicLogicalProcIndex; // 0x02 Logical Proc Index for correlation
66 u8 xPlicRsvd[12]; // 0x04 66 u8 xPlicRsvd[12]; // 0x04
67 char* xSlicCurEventPtr; // 0x10 67 char *xSlicCurEventPtr; // 0x10
68 char* xSlicLastValidEventPtr; // 0x18 68 char *xSlicLastValidEventPtr; // 0x18
69 char* xSlicEventStackPtr; // 0x20 69 char *xSlicEventStackPtr; // 0x20
70 u8 xIndex; // 0x28 unique sequential index. 70 u8 xIndex; // 0x28 unique sequential index.
71 u8 xSlicRsvd[3]; // 0x29-2b 71 u8 xSlicRsvd[3]; // 0x29-2b
72 u32 xInUseWord; // 0x2C 72 u32 xInUseWord; // 0x2C
@@ -76,17 +76,9 @@ struct ItLpQueue
76 76
77extern struct ItLpQueue xItLpQueue; 77extern struct ItLpQueue xItLpQueue;
78 78
79extern struct HvLpEvent * ItLpQueue_getNextLpEvent( struct ItLpQueue * ); 79extern struct HvLpEvent *ItLpQueue_getNextLpEvent(struct ItLpQueue *);
80extern int ItLpQueue_isLpIntPending( struct ItLpQueue * ); 80extern int ItLpQueue_isLpIntPending(struct ItLpQueue *);
81extern unsigned ItLpQueue_process( struct ItLpQueue *, struct pt_regs * ); 81extern unsigned ItLpQueue_process(struct ItLpQueue *, struct pt_regs *);
82extern void ItLpQueue_clearValid( struct HvLpEvent * ); 82extern void ItLpQueue_clearValid(struct HvLpEvent *);
83
84static __inline__ void process_iSeries_events( void )
85{
86 __asm__ __volatile__ (
87 " li 0,0x5555 \n\
88 sc"
89 : : : "r0", "r3" );
90}
91 83
92#endif /* _ITLPQUEUE_H */ 84#endif /* _ITLPQUEUE_H */
diff --git a/include/asm-ppc64/iSeries/ItLpRegSave.h b/include/asm-ppc64/iSeries/ItLpRegSave.h
index dafc4c813788..1b3087e76205 100644
--- a/include/asm-ppc64/iSeries/ItLpRegSave.h
+++ b/include/asm-ppc64/iSeries/ItLpRegSave.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItLpRegSave.h 2 * ItLpRegSave.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,33 +19,30 @@
19#ifndef _ITLPREGSAVE_H 19#ifndef _ITLPREGSAVE_H
20#define _ITLPREGSAVE_H 20#define _ITLPREGSAVE_H
21 21
22//===================================================================================== 22/*
23// 23 * This control block contains the data that is shared between PLIC
24// This control block contains the data that is shared between PLIC 24 * and the OS
25// and the OS 25 */
26//
27//
28 26
29struct ItLpRegSave 27struct ItLpRegSave {
30{
31 u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003 28 u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003
32 u16 xSize; // Size of this class 004-005 29 u16 xSize; // Size of this class 004-005
33 u8 xInUse; // Area is live 006-007 30 u8 xInUse; // Area is live 006-007
34 u8 xRsvd1[9]; // Reserved 007-00F 31 u8 xRsvd1[9]; // Reserved 007-00F
35 32
36 u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F 33 u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F
37 u32 xCTRL; // Control Register 170-173 34 u32 xCTRL; // Control Register 170-173
38 u32 xDEC; // Decrementer 174-177 35 u32 xDEC; // Decrementer 174-177
39 u32 xFPSCR; // FP Status and Control Reg 178-17B 36 u32 xFPSCR; // FP Status and Control Reg 178-17B
40 u32 xPVR; // Processor Version Number 17C-17F 37 u32 xPVR; // Processor Version Number 17C-17F
41 38
42 u64 xMMCR0; // Monitor Mode Control Reg 0 180-187 39 u64 xMMCR0; // Monitor Mode Control Reg 0 180-187
43 u32 xPMC1; // Perf Monitor Counter 1 188-18B 40 u32 xPMC1; // Perf Monitor Counter 1 188-18B
44 u32 xPMC2; // Perf Monitor Counter 2 18C-18F 41 u32 xPMC2; // Perf Monitor Counter 2 18C-18F
45 u32 xPMC3; // Perf Monitor Counter 3 190-193 42 u32 xPMC3; // Perf Monitor Counter 3 190-193
46 u32 xPMC4; // Perf Monitor Counter 4 194-197 43 u32 xPMC4; // Perf Monitor Counter 4 194-197
47 u32 xPIR; // Processor ID Reg 198-19B 44 u32 xPIR; // Processor ID Reg 198-19B
48 45
49 u32 xMMCR1; // Monitor Mode Control Reg 1 19C-19F 46 u32 xMMCR1; // Monitor Mode Control Reg 1 19C-19F
50 u32 xMMCRA; // Monitor Mode Control Reg A 1A0-1A3 47 u32 xMMCRA; // Monitor Mode Control Reg A 1A0-1A3
51 u32 xPMC5; // Perf Monitor Counter 5 1A4-1A7 48 u32 xPMC5; // Perf Monitor Counter 5 1A4-1A7
@@ -57,17 +54,17 @@ struct ItLpRegSave
57 u32 xRsvd; // Reserved 1BC-1BF 54 u32 xRsvd; // Reserved 1BC-1BF
58 55
59 u64 xACCR; // Address Compare Control Reg 1C0-1C7 56 u64 xACCR; // Address Compare Control Reg 1C0-1C7
60 u64 xIMR; // Instruction Match Register 1C8-1CF 57 u64 xIMR; // Instruction Match Register 1C8-1CF
61 u64 xSDR1; // Storage Description Reg 1 1D0-1D7 58 u64 xSDR1; // Storage Description Reg 1 1D0-1D7
62 u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF 59 u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF
63 u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7 60 u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7
64 u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF 61 u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF
65 u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7 62 u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7
66 u64 xTB; // Time Base Register 1F8-1FF 63 u64 xTB; // Time Base Register 1F8-1FF
67 64
68 u64 xFPR[32]; // Floating Point Registers 200-2FF 65 u64 xFPR[32]; // Floating Point Registers 200-2FF
69 66
70 u64 xMSR; // Machine State Register 300-307 67 u64 xMSR; // Machine State Register 300-307
71 u64 xNIA; // Next Instruction Address 308-30F 68 u64 xNIA; // Next Instruction Address 308-30F
72 69
73 u64 xDABR; // Data Address Breakpoint Reg 310-317 70 u64 xDABR; // Data Address Breakpoint Reg 310-317
@@ -76,8 +73,8 @@ struct ItLpRegSave
76 u64 xHID0; // HW Implementation Dependent0 320-327 73 u64 xHID0; // HW Implementation Dependent0 320-327
77 74
78 u64 xHID4; // HW Implementation Dependent4 328-32F 75 u64 xHID4; // HW Implementation Dependent4 328-32F
79 u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337 76 u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337
80 u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F 77 u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F
81 u64 xSDAR; // Sample Data Address Register 340-347 78 u64 xSDAR; // Sample Data Address Register 340-347
82 u64 xSIAR; // Sample Inst Address Register 348-34F 79 u64 xSIAR; // Sample Inst Address Register 348-34F
83 80
diff --git a/include/asm-ppc64/iSeries/ItSpCommArea.h b/include/asm-ppc64/iSeries/ItSpCommArea.h
index f1b56f9e11e2..5535f8271c9f 100644
--- a/include/asm-ppc64/iSeries/ItSpCommArea.h
+++ b/include/asm-ppc64/iSeries/ItSpCommArea.h
@@ -1,29 +1,27 @@
1/* 1/*
2 * ItSpCommArea.h 2 * ItSpCommArea.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20
21#ifndef _ITSPCOMMAREA_H 20#ifndef _ITSPCOMMAREA_H
22#define _ITSPCOMMAREA_H 21#define _ITSPCOMMAREA_H
23 22
24 23
25struct SpCommArea 24struct SpCommArea {
26{
27 u32 xDesc; // Descriptor (only in new formats) 000-003 25 u32 xDesc; // Descriptor (only in new formats) 000-003
28 u8 xFormat; // Format (only in new formats) 004-004 26 u8 xFormat; // Format (only in new formats) 004-004
29 u8 xRsvd1[11]; // Reserved 005-00F 27 u8 xRsvd1[11]; // Reserved 005-00F
diff --git a/include/asm-ppc64/iSeries/ItVpdAreas.h b/include/asm-ppc64/iSeries/ItVpdAreas.h
index d120439f30a5..71b3ad24f95a 100644
--- a/include/asm-ppc64/iSeries/ItVpdAreas.h
+++ b/include/asm-ppc64/iSeries/ItVpdAreas.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * ItVpdAreas.h 2 * ItVpdAreas.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,78 +19,71 @@
19#ifndef _ITVPDAREAS_H 19#ifndef _ITVPDAREAS_H
20#define _ITVPDAREAS_H 20#define _ITVPDAREAS_H
21 21
22//===================================================================================== 22/*
23// 23 * This file defines the address and length of all of the VPD area passed to
24// This file defines the address and length of all of the VPD area passed to 24 * the OS from PLIC (most of which start from the SP).
25// the OS from PLIC (most of which start from the SP). 25 */
26//
27 26
28#include <asm/types.h> 27#include <asm/types.h>
29 28
30// VPD Entry index is carved in stone - cannot be changed (easily). 29/* VPD Entry index is carved in stone - cannot be changed (easily). */
31#define ItVpdCecVpd 0 30#define ItVpdCecVpd 0
32#define ItVpdDynamicSpace 1 31#define ItVpdDynamicSpace 1
33#define ItVpdExtVpd 2 32#define ItVpdExtVpd 2
34#define ItVpdExtVpdOnPanel 3 33#define ItVpdExtVpdOnPanel 3
35#define ItVpdFirstPaca 4 34#define ItVpdFirstPaca 4
36#define ItVpdIoVpd 5 35#define ItVpdIoVpd 5
37#define ItVpdIplParms 6 36#define ItVpdIplParms 6
38#define ItVpdMsVpd 7 37#define ItVpdMsVpd 7
39#define ItVpdPanelVpd 8 38#define ItVpdPanelVpd 8
40#define ItVpdLpNaca 9 39#define ItVpdLpNaca 9
41#define ItVpdBackplaneAndMaybeClockCardVpd 10 40#define ItVpdBackplaneAndMaybeClockCardVpd 10
42#define ItVpdRecoveryLogBuffer 11 41#define ItVpdRecoveryLogBuffer 11
43#define ItVpdSpCommArea 12 42#define ItVpdSpCommArea 12
44#define ItVpdSpLogBuffer 13 43#define ItVpdSpLogBuffer 13
45#define ItVpdSpLogBufferSave 14 44#define ItVpdSpLogBufferSave 14
46#define ItVpdSpCardVpd 15 45#define ItVpdSpCardVpd 15
47#define ItVpdFirstProcVpd 16 46#define ItVpdFirstProcVpd 16
48#define ItVpdApModelVpd 17 47#define ItVpdApModelVpd 17
49#define ItVpdClockCardVpd 18 48#define ItVpdClockCardVpd 18
50#define ItVpdBusExtCardVpd 19 49#define ItVpdBusExtCardVpd 19
51#define ItVpdProcCapacityVpd 20 50#define ItVpdProcCapacityVpd 20
52#define ItVpdInteractiveCapacityVpd 21 51#define ItVpdInteractiveCapacityVpd 21
53#define ItVpdFirstSlotLabel 22 52#define ItVpdFirstSlotLabel 22
54#define ItVpdFirstLpQueue 23 53#define ItVpdFirstLpQueue 23
55#define ItVpdFirstL3CacheVpd 24 54#define ItVpdFirstL3CacheVpd 24
56#define ItVpdFirstProcFruVpd 25 55#define ItVpdFirstProcFruVpd 25
57
58#define ItVpdMaxEntries 26
59 56
57#define ItVpdMaxEntries 26
60 58
61#define ItDmaMaxEntries 10 59#define ItDmaMaxEntries 10
62 60
63#define ItVpdAreasMaxSlotLabels 192 61#define ItVpdAreasMaxSlotLabels 192
64 62
65 63
66struct SlicVpdAdrs { 64struct ItVpdAreas {
67 u32 pad1; 65 u32 xSlicDesc; // Descriptor 000-003
68 void * vpdAddr; 66 u16 xSlicSize; // Size of this control block 004-005
67 u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface006-007
68 u16 xRsvd1:15; // Reserved bits ...
69 u16 xSlicVpdEntries; // Number of VPD entries 008-009
70 u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
71 u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
72 u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
73 u16 xSlicDmaToksOffset; // Offset into this of array 010-011
74 u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
75 u16 xSlicDmaLensOffset; // Offset into this of array 014-015
76 u16 xSlicVpdLensOffset; // Offset into this of array 016-017
77 u16 xSlicMaxSlotLabels; // Maximum number of slot labels018-019
78 u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
79 u8 xRsvd2[4]; // Reserved 01C-01F
80 u64 xRsvd3[12]; // Reserved 020-07F
81 u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
82 u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
83 u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
84 void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
69}; 85};
70 86
71 87extern struct ItVpdAreas itVpdAreas;
72struct ItVpdAreas
73{
74 u32 xSlicDesc; // Descriptor 000-003
75 u16 xSlicSize; // Size of this control block 004-005
76 u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface 006-007
77 u16 xRsvd1:15; // Reserved bits ...
78 u16 xSlicVpdEntries; // Number of VPD entries 008-009
79 u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
80 u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
81 u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
82 u16 xSlicDmaToksOffset; // Offset into this of array 010-011
83 u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
84 u16 xSlicDmaLensOffset; // Offset into this of array 014-015
85 u16 xSlicVpdLensOffset; // Offset into this of array 016-017
86 u16 xSlicMaxSlotLabels; // Maximum number of slot labels 018-019
87 u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
88 u8 xRsvd2[4]; // Reserved 01C-01F
89 u64 xRsvd3[12]; // Reserved 020-07F
90 u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
91 u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
92 u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
93 void * xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
94};
95 88
96#endif /* _ITVPDAREAS_H */ 89#endif /* _ITVPDAREAS_H */
diff --git a/include/asm-ppc64/iSeries/LparData.h b/include/asm-ppc64/iSeries/LparData.h
deleted file mode 100644
index e54f3b686e58..000000000000
--- a/include/asm-ppc64/iSeries/LparData.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * LparData.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef _LPARDATA_H
21#define _LPARDATA_H
22
23#include <asm/types.h>
24#include <asm/page.h>
25#include <asm/abs_addr.h>
26
27#include <asm/iSeries/ItLpNaca.h>
28#include <asm/iSeries/ItLpRegSave.h>
29#include <asm/iSeries/HvReleaseData.h>
30#include <asm/iSeries/LparMap.h>
31#include <asm/iSeries/ItVpdAreas.h>
32#include <asm/iSeries/ItIplParmsReal.h>
33#include <asm/iSeries/ItExtVpdPanel.h>
34#include <asm/iSeries/ItLpQueue.h>
35#include <asm/iSeries/IoHriProcessorVpd.h>
36
37extern struct LparMap xLparMap;
38extern struct HvReleaseData hvReleaseData;
39extern struct ItLpNaca itLpNaca;
40extern struct ItIplParmsReal xItIplParmsReal;
41extern struct ItExtVpdPanel xItExtVpdPanel;
42extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
43extern struct ItLpQueue xItLpQueue;
44extern struct ItVpdAreas itVpdAreas;
45extern u64 xMsVpd[];
46extern struct msChunks msChunks;
47
48
49#endif /* _LPARDATA_H */
diff --git a/include/asm-ppc64/iSeries/LparMap.h b/include/asm-ppc64/iSeries/LparMap.h
index 075205bb0f4a..038e5df7e9f8 100644
--- a/include/asm-ppc64/iSeries/LparMap.h
+++ b/include/asm-ppc64/iSeries/LparMap.h
@@ -1,17 +1,17 @@
1/* 1/*
2 * LparMap.h 2 * LparMap.h
3 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * Copyright (C) 2001 Mike Corrigan IBM Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -21,13 +21,14 @@
21 21
22#include <asm/types.h> 22#include <asm/types.h>
23 23
24/* The iSeries hypervisor will set up mapping for one or more 24/*
25 * The iSeries hypervisor will set up mapping for one or more
25 * ESID/VSID pairs (in SLB/segment registers) and will set up 26 * ESID/VSID pairs (in SLB/segment registers) and will set up
26 * mappings of one or more ranges of pages to VAs. 27 * mappings of one or more ranges of pages to VAs.
27 * We will have the hypervisor set up the ESID->VSID mapping 28 * We will have the hypervisor set up the ESID->VSID mapping
28 * for the four kernel segments (C-F). With shared processors, 29 * for the four kernel segments (C-F). With shared processors,
29 * the hypervisor will clear all segment registers and reload 30 * the hypervisor will clear all segment registers and reload
30 * these four whenever the processor is switched from one 31 * these four whenever the processor is switched from one
31 * partition to another. 32 * partition to another.
32 */ 33 */
33 34
@@ -38,30 +39,31 @@
38 * need to be located within the load area (if the total partition size 39 * need to be located within the load area (if the total partition size
39 * is 64 MB), but cannot be mapped. Typically, this should specify 40 * is 64 MB), but cannot be mapped. Typically, this should specify
40 * to map half (32 MB) of the load area. 41 * to map half (32 MB) of the load area.
41 * 42 *
42 * The hypervisor will set up page table entries for the number of 43 * The hypervisor will set up page table entries for the number of
43 * pages specified. 44 * pages specified.
44 * 45 *
45 * In 32-bit mode, the hypervisor will load all four of the 46 * In 32-bit mode, the hypervisor will load all four of the
46 * segment registers (identified by the low-order four bits of the 47 * segment registers (identified by the low-order four bits of the
47 * Esid field. In 64-bit mode, the hypervisor will load one SLB 48 * Esid field. In 64-bit mode, the hypervisor will load one SLB
48 * entry to map the Esid to the Vsid. 49 * entry to map the Esid to the Vsid.
49*/ 50*/
50 51
51// Hypervisor initially maps 32MB of the load area 52/* Hypervisor initially maps 32MB of the load area */
52#define HvPagesToMap 8192 53#define HvPagesToMap 8192
53 54
54struct LparMap 55struct LparMap {
55{ 56 u64 xNumberEsids; // Number of ESID/VSID pairs (1)
56 u64 xNumberEsids; // Number of ESID/VSID pairs (1) 57 u64 xNumberRanges; // Number of VA ranges to map (1)
57 u64 xNumberRanges; // Number of VA ranges to map (1) 58 u64 xSegmentTableOffs; // Page number within load area of seg table (0)
58 u64 xSegmentTableOffs; // Page number within load area of seg table (0) 59 u64 xRsvd[5];
59 u64 xRsvd[5]; // Reserved (0) 60 u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000)
60 u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000) 61 u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000)
61 u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000) 62 u64 xPages; // Number of pages to be mapped (8192)
62 u64 xPages; // Number of pages to be mapped (8192) 63 u64 xOffset; // Offset from start of load area (0)
63 u64 xOffset; // Offset from start of load area (0) 64 u64 xVPN; // Virtual Page Number (0x000C000000000000)
64 u64 xVPN; // Virtual Page Number (0x000C000000000000)
65}; 65};
66 66
67extern struct LparMap xLparMap;
68
67#endif /* _LPARMAP_H */ 69#endif /* _LPARMAP_H */
diff --git a/include/asm-ppc64/iSeries/XmPciLpEvent.h b/include/asm-ppc64/iSeries/XmPciLpEvent.h
deleted file mode 100644
index a3d27f116e49..000000000000
--- a/include/asm-ppc64/iSeries/XmPciLpEvent.h
+++ /dev/null
@@ -1,18 +0,0 @@
1
2#ifndef __XMPCILPEVENT_H__
3#define __XMPCILPEVENT_H__
4
5
6#ifdef __cplusplus
7extern "C" {
8#endif
9
10int XmPciLpEvent_init(void);
11void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
12
13
14#ifdef __cplusplus
15}
16#endif
17
18#endif /* __XMPCILPEVENT_H__ */
diff --git a/include/asm-ppc64/iSeries/iSeries_io.h b/include/asm-ppc64/iSeries/iSeries_io.h
index f52b7599b372..9f79413342b3 100644
--- a/include/asm-ppc64/iSeries/iSeries_io.h
+++ b/include/asm-ppc64/iSeries/iSeries_io.h
@@ -5,32 +5,33 @@
5 5
6#ifdef CONFIG_PPC_ISERIES 6#ifdef CONFIG_PPC_ISERIES
7#include <linux/types.h> 7#include <linux/types.h>
8/************************************************************************/ 8/*
9/* File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000. */ 9 * File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000.
10/************************************************************************/ 10 *
11/* Remaps the io.h for the iSeries Io */ 11 * Remaps the io.h for the iSeries Io
12/* Copyright (C) 20yy Allan H Trautman, IBM Corporation */ 12 * Copyright (C) 2000 Allan H Trautman, IBM Corporation
13/* */ 13 *
14/* This program is free software; you can redistribute it and/or modify */ 14 * This program is free software; you can redistribute it and/or modify
15/* it under the terms of the GNU General Public License as published by */ 15 * it under the terms of the GNU General Public License as published by
16/* the Free Software Foundation; either version 2 of the License, or */ 16 * the Free Software Foundation; either version 2 of the License, or
17/* (at your option) any later version. */ 17 * (at your option) any later version.
18/* */ 18 *
19/* This program is distributed in the hope that it will be useful, */ 19 * This program is distributed in the hope that it will be useful,
20/* but WITHOUT ANY WARRANTY; without even the implied warranty of */ 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22/* GNU General Public License for more details. */ 22 * GNU General Public License for more details.
23/* */ 23 *
24/* You should have received a copy of the GNU General Public License */ 24 * You should have received a copy of the GNU General Public License
25/* along with this program; if not, write to the: */ 25 * along with this program; if not, write to the:
26/* Free Software Foundation, Inc., */ 26 * Free Software Foundation, Inc.,
27/* 59 Temple Place, Suite 330, */ 27 * 59 Temple Place, Suite 330,
28/* Boston, MA 02111-1307 USA */ 28 * Boston, MA 02111-1307 USA
29/************************************************************************/ 29 *
30/* Change Activity: */ 30 * Change Activity:
31/* Created December 28, 2000 */ 31 * Created December 28, 2000
32/* End Change Activity */ 32 * End Change Activity
33/************************************************************************/ 33 */
34
34extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress); 35extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress);
35extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress); 36extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress);
36extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress); 37extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress);
@@ -39,8 +40,10 @@ extern void iSeries_Write_Word(u16 IoData, volatile void __iomem * IoAddress);
39extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress); 40extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress);
40 41
41extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n); 42extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n);
42extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source, size_t n); 43extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source,
43extern void iSeries_memcpy_fromio(void *dest, const volatile void __iomem *source, size_t n); 44 size_t n);
45extern void iSeries_memcpy_fromio(void *dest,
46 const volatile void __iomem *source, size_t n);
44 47
45#endif /* CONFIG_PPC_ISERIES */ 48#endif /* CONFIG_PPC_ISERIES */
46#endif /* _ISERIES_IO_H */ 49#endif /* _ISERIES_IO_H */
diff --git a/include/asm-ppc64/iSeries/iSeries_irq.h b/include/asm-ppc64/iSeries/iSeries_irq.h
index ff8ddede038c..6c9767ac1302 100644
--- a/include/asm-ppc64/iSeries/iSeries_irq.h
+++ b/include/asm-ppc64/iSeries/iSeries_irq.h
@@ -1,19 +1,8 @@
1#ifndef __ISERIES_IRQ_H__ 1#ifndef __ISERIES_IRQ_H__
2#define __ISERIES_IRQ_H__ 2#define __ISERIES_IRQ_H__
3 3
4#ifdef __cplusplus 4extern void iSeries_init_IRQ(void);
5extern "C" { 5extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
6#endif 6extern void iSeries_activate_IRQs(void);
7
8void iSeries_init_IRQ(void);
9int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
10int iSeries_assign_IRQ(int, HvBusNumber, HvSubBusNumber, HvAgentId);
11void iSeries_activate_IRQs(void);
12
13int XmPciLpEvent_init(void);
14
15#ifdef __cplusplus
16}
17#endif
18 7
19#endif /* __ISERIES_IRQ_H__ */ 8#endif /* __ISERIES_IRQ_H__ */
diff --git a/include/asm-ppc64/iSeries/iSeries_pci.h b/include/asm-ppc64/iSeries/iSeries_pci.h
index 5769cff4c00c..575f611f8b33 100644
--- a/include/asm-ppc64/iSeries/iSeries_pci.h
+++ b/include/asm-ppc64/iSeries/iSeries_pci.h
@@ -1,112 +1,88 @@
1#ifndef _ISERIES_64_PCI_H 1#ifndef _ISERIES_64_PCI_H
2#define _ISERIES_64_PCI_H 2#define _ISERIES_64_PCI_H
3 3
4/************************************************************************/ 4/*
5/* File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001. */ 5 * File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001.
6/************************************************************************/ 6 *
7/* Define some useful macros for the iSeries pci routines. */ 7 * Define some useful macros for the iSeries pci routines.
8/* Copyright (C) 2001 Allan H Trautman, IBM Corporation */ 8 * Copyright (C) 2001 Allan H Trautman, IBM Corporation
9/* */ 9 *
10/* This program is free software; you can redistribute it and/or modify */ 10 * This program is free software; you can redistribute it and/or modify
11/* it under the terms of the GNU General Public License as published by */ 11 * it under the terms of the GNU General Public License as published by
12/* the Free Software Foundation; either version 2 of the License, or */ 12 * the Free Software Foundation; either version 2 of the License, or
13/* (at your option) any later version. */ 13 * (at your option) any later version.
14/* */ 14 *
15/* This program is distributed in the hope that it will be useful, */ 15 * This program is distributed in the hope that it will be useful,
16/* but WITHOUT ANY WARRANTY; without even the implied warranty of */ 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18/* GNU General Public License for more details. */ 18 * GNU General Public License for more details.
19/* */ 19 *
20/* You should have received a copy of the GNU General Public License */ 20 * You should have received a copy of the GNU General Public License
21/* along with this program; if not, write to the: */ 21 * along with this program; if not, write to the:
22/* Free Software Foundation, Inc., */ 22 * Free Software Foundation, Inc.,
23/* 59 Temple Place, Suite 330, */ 23 * 59 Temple Place, Suite 330,
24/* Boston, MA 02111-1307 USA */ 24 * Boston, MA 02111-1307 USA
25/************************************************************************/ 25 *
26/* Change Activity: */ 26 * Change Activity:
27/* Created Feb 20, 2001 */ 27 * Created Feb 20, 2001
28/* Added device reset, March 22, 2001 */ 28 * Added device reset, March 22, 2001
29/* Ported to ppc64, May 25, 2001 */ 29 * Ported to ppc64, May 25, 2001
30/* End Change Activity */ 30 * End Change Activity
31/************************************************************************/ 31 */
32 32
33#include <asm/iSeries/HvCallPci.h> 33#include <asm/iSeries/HvCallPci.h>
34#include <asm/abs_addr.h> 34#include <asm/abs_addr.h>
35 35
36struct pci_dev; /* For Forward Reference */ 36struct pci_dev; /* For Forward Reference */
37struct iSeries_Device_Node; 37struct iSeries_Device_Node;
38 38
39/************************************************************************/ 39/*
40/* Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure */ 40 * Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure
41/************************************************************************/ 41 */
42 42
43#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber 43#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber
44#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber 44#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber
45#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId 45#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId
46#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr 46#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr
47#define ISERIES_DEVFUN(DevPtr) DevPtr->DevFn 47#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node *)PciDev->sysdata)
48#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node*)PciDev->sysdata)
49 48
50#define EADsMaxAgents 7 49#define EADsMaxAgents 7
51 50
52/************************************************************************/
53/* Decodes Linux DevFn to iSeries DevFn, bridge device, or function. */
54/* For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h */
55/************************************************************************/
56
57#define ISERIES_PCI_AGENTID(idsel,func) ((idsel & 0x0F) << 4) | (func & 0x07)
58#define ISERIES_ENCODE_DEVICE(agentid) ((0x10) | ((agentid&0x20)>>2) | (agentid&07))
59
60#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
61#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
62
63/* 51/*
64 * N.B. the ISERIES_DECODE_* macros are not used anywhere, and I think 52 * Decodes Linux DevFn to iSeries DevFn, bridge device, or function.
65 * the 0x71 (at least) must be wrong - 0x78 maybe? -- paulus. 53 * For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h
66 */ 54 */
67#define ISERIES_DECODE_DEVFN(linuxdevfn) (((linuxdevfn & 0x71) << 1) | (linuxdevfn & 0x07))
68#define ISERIES_DECODE_DEVICE(linuxdevfn) (((linuxdevfn & 0x38) >> 3) |(((linuxdevfn & 0x40) >> 2) + 0x10))
69#define ISERIES_DECODE_FUNCTION(linuxdevfn) (linuxdevfn & 0x07)
70 55
71/************************************************************************/ 56#define ISERIES_PCI_AGENTID(idsel, func) \
72/* Converts Virtual Address to Real Address for Hypervisor calls */ 57 (((idsel & 0x0F) << 4) | (func & 0x07))
73/************************************************************************/ 58#define ISERIES_ENCODE_DEVICE(agentid) \
59 ((0x10) | ((agentid & 0x20) >> 2) | (agentid & 0x07))
74 60
75#define ISERIES_HV_ADDR(virtaddr) (0x8000000000000000 | virt_to_abs(virtaddr)) 61#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
62#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
76 63
77/************************************************************************/ 64/*
78/* iSeries Device Information */ 65 * Converts Virtual Address to Real Address for Hypervisor calls
79/************************************************************************/ 66 */
67#define ISERIES_HV_ADDR(virtaddr) \
68 (0x8000000000000000 | virt_to_abs(virtaddr))
80 69
70/*
71 * iSeries Device Information
72 */
81struct iSeries_Device_Node { 73struct iSeries_Device_Node {
82 struct list_head Device_List; 74 struct list_head Device_List;
83 struct pci_dev* PciDev; /* Pointer to pci_dev structure*/ 75 struct pci_dev *PciDev;
84 union HvDsaMap DsaAddr; /* Direct Select Address */ 76 union HvDsaMap DsaAddr; /* Direct Select Address */
85 /* busNumber,subBusNumber, */ 77 /* busNumber, subBusNumber, */
86 /* deviceId, barNumber */ 78 /* deviceId, barNumber */
87 HvAgentId AgentId; /* Hypervisor DevFn */ 79 int DevFn; /* Linux devfn */
88 int DevFn; /* Linux devfn */ 80 int Irq; /* Assigned IRQ */
89 int BarOffset; 81 int Flags; /* Possible flags(disable/bist)*/
90 int Irq; /* Assigned IRQ */ 82 u8 LogicalSlot; /* Hv Slot Index for Tces */
91 int ReturnCode; /* Return Code Holder */ 83 struct iommu_table *iommu_table;/* Device TCE Table */
92 int IoRetry; /* Current Retry Count */
93 int Flags; /* Possible flags(disable/bist)*/
94 u16 Vendor; /* Vendor ID */
95 u8 LogicalSlot; /* Hv Slot Index for Tces */
96 struct iommu_table* iommu_table;/* Device TCE Table */
97 u8 PhbId; /* Phb Card is on. */
98 u16 Board; /* Board Number */
99 u8 FrameId; /* iSeries spcn Frame Id */
100 char CardLocation[4];/* Char format of planar vpd */
101 char Location[20]; /* Frame 1, Card C10 */
102}; 84};
103 85
104/************************************************************************/ 86extern void iSeries_Device_Information(struct pci_dev*, int);
105/* Functions */
106/************************************************************************/
107
108extern int iSeries_Device_Information(struct pci_dev*,char*, int);
109extern void iSeries_Get_Location_Code(struct iSeries_Device_Node*);
110extern int iSeries_Device_ToggleReset(struct pci_dev* PciDev, int AssertTime, int DelayTime);
111 87
112#endif /* _ISERIES_64_PCI_H */ 88#endif /* _ISERIES_64_PCI_H */
diff --git a/include/asm-ppc64/iSeries/iSeries_proc.h b/include/asm-ppc64/iSeries/iSeries_proc.h
deleted file mode 100644
index adb6dc14dd4d..000000000000
--- a/include/asm-ppc64/iSeries/iSeries_proc.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * iSeries_proc.h
3 * Copyright (C) 2001 Kyle A. Lucke IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef _ISERIES_PROC_H
20#define _ISERIES_PROC_H
21
22extern void iSeries_proc_early_init(void);
23
24#endif /* _iSeries_PROC_H */
diff --git a/include/asm-ppc64/iSeries/mf.h b/include/asm-ppc64/iSeries/mf.h
index 2e59a8e15a0b..7e6a0d936999 100644
--- a/include/asm-ppc64/iSeries/mf.h
+++ b/include/asm-ppc64/iSeries/mf.h
@@ -9,17 +9,16 @@
9 * all partitions in the iSeries. It also provides miscellaneous low-level 9 * all partitions in the iSeries. It also provides miscellaneous low-level
10 * machine facility type operations. 10 * machine facility type operations.
11 * 11 *
12 *
13 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by 13 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or 14 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version. 15 * (at your option) any later version.
17 * 16 *
18 * This program is distributed in the hope that it will be useful, 17 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details. 20 * GNU General Public License for more details.
22 * 21 *
23 * You should have received a copy of the GNU General Public License 22 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software 23 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -52,6 +51,7 @@ extern void mf_clear_src(void);
52extern void mf_init(void); 51extern void mf_init(void);
53 52
54extern int mf_get_rtc(struct rtc_time *tm); 53extern int mf_get_rtc(struct rtc_time *tm);
54extern int mf_get_boot_rtc(struct rtc_time *tm);
55extern int mf_set_rtc(struct rtc_time *tm); 55extern int mf_set_rtc(struct rtc_time *tm);
56 56
57#endif /* _ASM_PPC64_ISERIES_MF_H */ 57#endif /* _ASM_PPC64_ISERIES_MF_H */
diff --git a/include/asm-ppc64/iSeries/vio.h b/include/asm-ppc64/iSeries/vio.h
index 3e5766a849d6..6c05e6257f53 100644
--- a/include/asm-ppc64/iSeries/vio.h
+++ b/include/asm-ppc64/iSeries/vio.h
@@ -8,32 +8,32 @@
8 * Colin Devilbiss <devilbis@us.ibm.com> 8 * Colin Devilbiss <devilbis@us.ibm.com>
9 * 9 *
10 * (C) Copyright 2000 IBM Corporation 10 * (C) Copyright 2000 IBM Corporation
11 * 11 *
12 * This header file is used by the iSeries virtual I/O device 12 * This header file is used by the iSeries virtual I/O device
13 * drivers. It defines the interfaces to the common functions 13 * drivers. It defines the interfaces to the common functions
14 * (implemented in drivers/char/viopath.h) as well as defining 14 * (implemented in drivers/char/viopath.h) as well as defining
15 * common functions and structures. Currently (at the time I 15 * common functions and structures. Currently (at the time I
16 * wrote this comment) the iSeries virtual I/O device drivers 16 * wrote this comment) the iSeries virtual I/O device drivers
17 * that use this are 17 * that use this are
18 * drivers/block/viodasd.c 18 * drivers/block/viodasd.c
19 * drivers/char/viocons.c 19 * drivers/char/viocons.c
20 * drivers/char/viotape.c 20 * drivers/char/viotape.c
21 * drivers/cdrom/viocd.c 21 * drivers/cdrom/viocd.c
22 * 22 *
23 * The iSeries virtual ethernet support (veth.c) uses a whole 23 * The iSeries virtual ethernet support (veth.c) uses a whole
24 * different set of functions. 24 * different set of functions.
25 * 25 *
26 * This program is free software; you can redistribute it and/or 26 * This program is free software; you can redistribute it and/or
27 * modify it under the terms of the GNU General Public License as 27 * modify it under the terms of the GNU General Public License as
28 * published by the Free Software Foundation; either version 2 of the 28 * published by the Free Software Foundation; either version 2 of the
29 * License, or (at your option) anyu later version. 29 * License, or (at your option) anyu later version.
30 * 30 *
31 * This program is distributed in the hope that it will be useful, but 31 * This program is distributed in the hope that it will be useful, but
32 * WITHOUT ANY WARRANTY; without even the implied warranty of 32 * WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
34 * General Public License for more details. 34 * General Public License for more details.
35 * 35 *
36 * You should have received a copy of the GNU General Public License 36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software Foundation, 37 * along with this program; if not, write to the Free Software Foundation,
38 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 38 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 * 39 *
@@ -44,39 +44,41 @@
44#include <asm/iSeries/HvTypes.h> 44#include <asm/iSeries/HvTypes.h>
45#include <asm/iSeries/HvLpEvent.h> 45#include <asm/iSeries/HvLpEvent.h>
46 46
47/* iSeries virtual I/O events use the subtype field in 47/*
48 * iSeries virtual I/O events use the subtype field in
48 * HvLpEvent to figure out what kind of vio event is coming 49 * HvLpEvent to figure out what kind of vio event is coming
49 * in. We use a table to route these, and this defines 50 * in. We use a table to route these, and this defines
50 * the maximum number of distinct subtypes 51 * the maximum number of distinct subtypes
51 */ 52 */
52#define VIO_MAX_SUBTYPES 8 53#define VIO_MAX_SUBTYPES 8
53 54
54/* Each subtype can register a handler to process their events. 55/*
56 * Each subtype can register a handler to process their events.
55 * The handler must have this interface. 57 * The handler must have this interface.
56 */ 58 */
57typedef void (vio_event_handler_t) (struct HvLpEvent * event); 59typedef void (vio_event_handler_t) (struct HvLpEvent * event);
58 60
59int viopath_open(HvLpIndex remoteLp, int subtype, int numReq); 61extern int viopath_open(HvLpIndex remoteLp, int subtype, int numReq);
60int viopath_close(HvLpIndex remoteLp, int subtype, int numReq); 62extern int viopath_close(HvLpIndex remoteLp, int subtype, int numReq);
61int vio_setHandler(int subtype, vio_event_handler_t * beh); 63extern int vio_setHandler(int subtype, vio_event_handler_t * beh);
62int vio_clearHandler(int subtype); 64extern int vio_clearHandler(int subtype);
63int viopath_isactive(HvLpIndex lp); 65extern int viopath_isactive(HvLpIndex lp);
64HvLpInstanceId viopath_sourceinst(HvLpIndex lp); 66extern HvLpInstanceId viopath_sourceinst(HvLpIndex lp);
65HvLpInstanceId viopath_targetinst(HvLpIndex lp); 67extern HvLpInstanceId viopath_targetinst(HvLpIndex lp);
66void vio_set_hostlp(void); 68extern void vio_set_hostlp(void);
67void *vio_get_event_buffer(int subtype); 69extern void *vio_get_event_buffer(int subtype);
68void vio_free_event_buffer(int subtype, void *buffer); 70extern void vio_free_event_buffer(int subtype, void *buffer);
69 71
70extern HvLpIndex viopath_hostLp; 72extern HvLpIndex viopath_hostLp;
71extern HvLpIndex viopath_ourLp; 73extern HvLpIndex viopath_ourLp;
72 74
73#define VIOCHAR_MAX_DATA 200 75#define VIOCHAR_MAX_DATA 200
74 76
75#define VIOMAJOR_SUBTYPE_MASK 0xff00 77#define VIOMAJOR_SUBTYPE_MASK 0xff00
76#define VIOMINOR_SUBTYPE_MASK 0x00ff 78#define VIOMINOR_SUBTYPE_MASK 0x00ff
77#define VIOMAJOR_SUBTYPE_SHIFT 8 79#define VIOMAJOR_SUBTYPE_SHIFT 8
78 80
79#define VIOVERSION 0x0101 81#define VIOVERSION 0x0101
80 82
81/* 83/*
82 * This is the general structure for VIO errors; each module should have 84 * This is the general structure for VIO errors; each module should have
@@ -89,8 +91,8 @@ struct vio_error_entry {
89 int errno; 91 int errno;
90 const char *msg; 92 const char *msg;
91}; 93};
92const struct vio_error_entry *vio_lookup_rc(const struct vio_error_entry 94extern const struct vio_error_entry *vio_lookup_rc(
93 *local_table, u16 rc); 95 const struct vio_error_entry *local_table, u16 rc);
94 96
95enum viosubtypes { 97enum viosubtypes {
96 viomajorsubtype_monitor = 0x0100, 98 viomajorsubtype_monitor = 0x0100,
@@ -102,7 +104,6 @@ enum viosubtypes {
102 viomajorsubtype_scsi = 0x0700 104 viomajorsubtype_scsi = 0x0700
103}; 105};
104 106
105
106enum vioconfigsubtype { 107enum vioconfigsubtype {
107 vioconfigget = 0x0001, 108 vioconfigget = 0x0001,
108}; 109};
diff --git a/include/asm-ppc64/imalloc.h b/include/asm-ppc64/imalloc.h
index 3a45e918bf16..e46ff68a6e41 100644
--- a/include/asm-ppc64/imalloc.h
+++ b/include/asm-ppc64/imalloc.h
@@ -4,9 +4,9 @@
4/* 4/*
5 * Define the address range of the imalloc VM area. 5 * Define the address range of the imalloc VM area.
6 */ 6 */
7#define PHBS_IO_BASE IOREGIONBASE 7#define PHBS_IO_BASE VMALLOC_END
8#define IMALLOC_BASE (IOREGIONBASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */ 8#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
9#define IMALLOC_END (IOREGIONBASE + EADDR_MASK) 9#define IMALLOC_END (VMALLOC_START + EADDR_MASK)
10 10
11 11
12/* imalloc region types */ 12/* imalloc region types */
@@ -18,7 +18,9 @@
18 18
19extern struct vm_struct * im_get_free_area(unsigned long size); 19extern struct vm_struct * im_get_free_area(unsigned long size);
20extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size, 20extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
21 int region_type); 21 int region_type);
22unsigned long im_free(void *addr); 22extern void im_free(void *addr);
23
24extern unsigned long ioremap_bot;
23 25
24#endif /* _PPC64_IMALLOC_H */ 26#endif /* _PPC64_IMALLOC_H */
diff --git a/include/asm-ppc64/iommu.h b/include/asm-ppc64/iommu.h
index bd53ca4dcfa2..729de5cc21d9 100644
--- a/include/asm-ppc64/iommu.h
+++ b/include/asm-ppc64/iommu.h
@@ -82,24 +82,6 @@ struct iommu_table {
82 unsigned long *it_map; /* A simple allocation bitmap for now */ 82 unsigned long *it_map; /* A simple allocation bitmap for now */
83}; 83};
84 84
85#ifdef CONFIG_PPC_ISERIES
86struct iommu_table_cb {
87 unsigned long itc_busno; /* Bus number for this tce table */
88 unsigned long itc_start; /* Will be NULL for secondary */
89 unsigned long itc_totalsize; /* Size (in pages) of whole table */
90 unsigned long itc_offset; /* Index into real tce table of the
91 start of our section */
92 unsigned long itc_size; /* Size (in pages) of our section */
93 unsigned long itc_index; /* Index of this tce table */
94 unsigned short itc_maxtables; /* Max num of tables for partition */
95 unsigned char itc_virtbus; /* Flag to indicate virtual bus */
96 unsigned char itc_slotno; /* IOA Tce Slot Index */
97 unsigned char itc_rsvd[4];
98};
99
100extern struct iommu_table vio_tce_table; /* Tce table for virtual bus */
101#endif /* CONFIG_PPC_ISERIES */
102
103struct scatterlist; 85struct scatterlist;
104 86
105#ifdef CONFIG_PPC_MULTIPLATFORM 87#ifdef CONFIG_PPC_MULTIPLATFORM
@@ -122,9 +104,6 @@ extern void iommu_devnode_init_pSeries(struct device_node *dn);
122 104
123#ifdef CONFIG_PPC_ISERIES 105#ifdef CONFIG_PPC_ISERIES
124 106
125/* Walks all buses and creates iommu tables */
126extern void iommu_setup_iSeries(void);
127
128/* Initializes tables for bio buses */ 107/* Initializes tables for bio buses */
129extern void __init iommu_vio_init(void); 108extern void __init iommu_vio_init(void);
130 109
@@ -158,8 +137,12 @@ extern void iommu_init_early_pSeries(void);
158extern void iommu_init_early_iSeries(void); 137extern void iommu_init_early_iSeries(void);
159extern void iommu_init_early_u3(void); 138extern void iommu_init_early_u3(void);
160 139
140#ifdef CONFIG_PCI
161extern void pci_iommu_init(void); 141extern void pci_iommu_init(void);
162extern void pci_direct_iommu_init(void); 142extern void pci_direct_iommu_init(void);
143#else
144static inline void pci_iommu_init(void) { }
145#endif
163 146
164extern void alloc_u3_dart_table(void); 147extern void alloc_u3_dart_table(void);
165 148
diff --git a/include/asm-ppc64/paca.h b/include/asm-ppc64/paca.h
index 1a0223b5f3b8..ae76cae1483f 100644
--- a/include/asm-ppc64/paca.h
+++ b/include/asm-ppc64/paca.h
@@ -20,13 +20,13 @@
20#include <asm/types.h> 20#include <asm/types.h>
21#include <asm/lppaca.h> 21#include <asm/lppaca.h>
22#include <asm/iSeries/ItLpRegSave.h> 22#include <asm/iSeries/ItLpRegSave.h>
23#include <asm/iSeries/ItLpQueue.h>
23#include <asm/mmu.h> 24#include <asm/mmu.h>
24 25
25register struct paca_struct *local_paca asm("r13"); 26register struct paca_struct *local_paca asm("r13");
26#define get_paca() local_paca 27#define get_paca() local_paca
27 28
28struct task_struct; 29struct task_struct;
29struct ItLpQueue;
30 30
31/* 31/*
32 * Defines the layout of the paca. 32 * Defines the layout of the paca.
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
index bcd21789d3b7..257d87eb7c34 100644
--- a/include/asm-ppc64/page.h
+++ b/include/asm-ppc64/page.h
@@ -202,9 +202,7 @@ extern u64 ppc64_pft_size; /* Log 2 of page table size */
202#define PAGE_OFFSET ASM_CONST(0xC000000000000000) 202#define PAGE_OFFSET ASM_CONST(0xC000000000000000)
203#define KERNELBASE PAGE_OFFSET 203#define KERNELBASE PAGE_OFFSET
204#define VMALLOCBASE ASM_CONST(0xD000000000000000) 204#define VMALLOCBASE ASM_CONST(0xD000000000000000)
205#define IOREGIONBASE ASM_CONST(0xE000000000000000)
206 205
207#define IO_REGION_ID (IOREGIONBASE >> REGION_SHIFT)
208#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT) 206#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
209#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT) 207#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
210#define USER_REGION_ID (0UL) 208#define USER_REGION_ID (0UL)
diff --git a/include/asm-ppc64/pgtable.h b/include/asm-ppc64/pgtable.h
index 264c4f7993be..46cf61c2ff69 100644
--- a/include/asm-ppc64/pgtable.h
+++ b/include/asm-ppc64/pgtable.h
@@ -53,7 +53,8 @@
53 * Define the address range of the vmalloc VM area. 53 * Define the address range of the vmalloc VM area.
54 */ 54 */
55#define VMALLOC_START (0xD000000000000000ul) 55#define VMALLOC_START (0xD000000000000000ul)
56#define VMALLOC_END (VMALLOC_START + EADDR_MASK) 56#define VMALLOC_SIZE (0x10000000000UL)
57#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
57 58
58/* 59/*
59 * Bits in a linux-style PTE. These match the bits in the 60 * Bits in a linux-style PTE. These match the bits in the
@@ -239,9 +240,6 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
239/* This now only contains the vmalloc pages */ 240/* This now only contains the vmalloc pages */
240#define pgd_offset_k(address) pgd_offset(&init_mm, address) 241#define pgd_offset_k(address) pgd_offset(&init_mm, address)
241 242
242/* to find an entry in the ioremap page-table-directory */
243#define pgd_offset_i(address) (ioremap_pgd + pgd_index(address))
244
245/* 243/*
246 * The following only work if pte_present() is true. 244 * The following only work if pte_present() is true.
247 * Undefined behaviour if not.. 245 * Undefined behaviour if not..
@@ -459,15 +457,12 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr,
459#define __HAVE_ARCH_PTE_SAME 457#define __HAVE_ARCH_PTE_SAME
460#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) 458#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
461 459
462extern unsigned long ioremap_bot, ioremap_base;
463
464#define pmd_ERROR(e) \ 460#define pmd_ERROR(e) \
465 printk("%s:%d: bad pmd %08x.\n", __FILE__, __LINE__, pmd_val(e)) 461 printk("%s:%d: bad pmd %08x.\n", __FILE__, __LINE__, pmd_val(e))
466#define pgd_ERROR(e) \ 462#define pgd_ERROR(e) \
467 printk("%s:%d: bad pgd %08x.\n", __FILE__, __LINE__, pgd_val(e)) 463 printk("%s:%d: bad pgd %08x.\n", __FILE__, __LINE__, pgd_val(e))
468 464
469extern pgd_t swapper_pg_dir[]; 465extern pgd_t swapper_pg_dir[];
470extern pgd_t ioremap_dir[];
471 466
472extern void paging_init(void); 467extern void paging_init(void);
473 468
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index 0035efe2db2b..3084099086a8 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -120,103 +120,18 @@
120 120
121/* Special Purpose Registers (SPRNs)*/ 121/* Special Purpose Registers (SPRNs)*/
122 122
123#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */
124#define SPRN_CTR 0x009 /* Count Register */ 123#define SPRN_CTR 0x009 /* Count Register */
125#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ 124#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
126#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */ 125#define DABR_TRANSLATION (1UL << 2)
127#define SPRN_DAC2 0x3F7 /* Data Address Compare 2 */
128#define SPRN_DAR 0x013 /* Data Address Register */ 126#define SPRN_DAR 0x013 /* Data Address Register */
129#define SPRN_DBCR 0x3F2 /* Debug Control Regsiter */
130#define DBCR_EDM 0x80000000
131#define DBCR_IDM 0x40000000
132#define DBCR_RST(x) (((x) & 0x3) << 28)
133#define DBCR_RST_NONE 0
134#define DBCR_RST_CORE 1
135#define DBCR_RST_CHIP 2
136#define DBCR_RST_SYSTEM 3
137#define DBCR_IC 0x08000000 /* Instruction Completion Debug Evnt */
138#define DBCR_BT 0x04000000 /* Branch Taken Debug Event */
139#define DBCR_EDE 0x02000000 /* Exception Debug Event */
140#define DBCR_TDE 0x01000000 /* TRAP Debug Event */
141#define DBCR_FER 0x00F80000 /* First Events Remaining Mask */
142#define DBCR_FT 0x00040000 /* Freeze Timers on Debug Event */
143#define DBCR_IA1 0x00020000 /* Instr. Addr. Compare 1 Enable */
144#define DBCR_IA2 0x00010000 /* Instr. Addr. Compare 2 Enable */
145#define DBCR_D1R 0x00008000 /* Data Addr. Compare 1 Read Enable */
146#define DBCR_D1W 0x00004000 /* Data Addr. Compare 1 Write Enable */
147#define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */
148#define DAC_BYTE 0
149#define DAC_HALF 1
150#define DAC_WORD 2
151#define DAC_QUAD 3
152#define DBCR_D2R 0x00000800 /* Data Addr. Compare 2 Read Enable */
153#define DBCR_D2W 0x00000400 /* Data Addr. Compare 2 Write Enable */
154#define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */
155#define DBCR_SBT 0x00000040 /* Second Branch Taken Debug Event */
156#define DBCR_SED 0x00000020 /* Second Exception Debug Event */
157#define DBCR_STD 0x00000010 /* Second Trap Debug Event */
158#define DBCR_SIA 0x00000008 /* Second IAC Enable */
159#define DBCR_SDA 0x00000004 /* Second DAC Enable */
160#define DBCR_JOI 0x00000002 /* JTAG Serial Outbound Int. Enable */
161#define DBCR_JII 0x00000001 /* JTAG Serial Inbound Int. Enable */
162#define SPRN_DBCR0 0x3F2 /* Debug Control Register 0 */
163#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */
164#define SPRN_DBSR 0x3F0 /* Debug Status Register */
165#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */
166#define DCCR_NOCACHE 0 /* Noncacheable */
167#define DCCR_CACHE 1 /* Cacheable */
168#define SPRN_DCMP 0x3D1 /* Data TLB Compare Register */
169#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */
170#define DCWR_COPY 0 /* Copy-back */
171#define DCWR_WRITE 1 /* Write-through */
172#define SPRN_DEAR 0x3D5 /* Data Error Address Register */
173#define SPRN_DEC 0x016 /* Decrement Register */ 127#define SPRN_DEC 0x016 /* Decrement Register */
174#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */
175#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ 128#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
176#define DSISR_NOHPTE 0x40000000 /* no translation found */ 129#define DSISR_NOHPTE 0x40000000 /* no translation found */
177#define DSISR_PROTFAULT 0x08000000 /* protection fault */ 130#define DSISR_PROTFAULT 0x08000000 /* protection fault */
178#define DSISR_ISSTORE 0x02000000 /* access was a store */ 131#define DSISR_ISSTORE 0x02000000 /* access was a store */
179#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ 132#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
180#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */ 133#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */
181#define SPRN_EAR 0x11A /* External Address Register */
182#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */
183#define ESR_IMCP 0x80000000 /* Instr. Machine Check - Protection */
184#define ESR_IMCN 0x40000000 /* Instr. Machine Check - Non-config */
185#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */
186#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */
187#define ESR_PIL 0x08000000 /* Program Exception - Illegal */
188#define ESR_PPR 0x04000000 /* Program Exception - Priveleged */
189#define ESR_PTR 0x02000000 /* Program Exception - Trap */
190#define ESR_DST 0x00800000 /* Storage Exception - Data miss */
191#define ESR_DIZ 0x00400000 /* Storage Exception - Zone fault */
192#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */
193#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */
194#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */
195#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */ 134#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */
196#define HID0_EMCP (1<<31) /* Enable Machine Check pin */
197#define HID0_EBA (1<<29) /* Enable Bus Address Parity */
198#define HID0_EBD (1<<28) /* Enable Bus Data Parity */
199#define HID0_SBCLK (1<<27)
200#define HID0_EICE (1<<26)
201#define HID0_ECLK (1<<25)
202#define HID0_PAR (1<<24)
203#define HID0_DOZE (1<<23)
204#define HID0_NAP (1<<22)
205#define HID0_SLEEP (1<<21)
206#define HID0_DPM (1<<20)
207#define HID0_ICE (1<<15) /* Instruction Cache Enable */
208#define HID0_DCE (1<<14) /* Data Cache Enable */
209#define HID0_ILOCK (1<<13) /* Instruction Cache Lock */
210#define HID0_DLOCK (1<<12) /* Data Cache Lock */
211#define HID0_ICFI (1<<11) /* Instr. Cache Flash Invalidate */
212#define HID0_DCI (1<<10) /* Data Cache Invalidate */
213#define HID0_SPD (1<<9) /* Speculative disable */
214#define HID0_SGE (1<<7) /* Store Gathering Enable */
215#define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */
216#define HID0_BTIC (1<<5) /* Branch Target Instruction Cache Enable */
217#define HID0_ABE (1<<3) /* Address Broadcast Enable */
218#define HID0_BHTE (1<<2) /* Branch History Table Enable */
219#define HID0_BTCD (1<<1) /* Branch target cache disable */
220#define SPRN_MSRDORM 0x3F1 /* Hardware Implementation Register 1 */ 135#define SPRN_MSRDORM 0x3F1 /* Hardware Implementation Register 1 */
221#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ 136#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */
222#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ 137#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
@@ -225,23 +140,8 @@
225#define SPRN_HID5 0x3F6 /* 970 HID5 */ 140#define SPRN_HID5 0x3F6 /* 970 HID5 */
226#define SPRN_TSC 0x3FD /* Thread switch control */ 141#define SPRN_TSC 0x3FD /* Thread switch control */
227#define SPRN_TST 0x3FC /* Thread switch timeout */ 142#define SPRN_TST 0x3FC /* Thread switch timeout */
228#define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */
229#define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */
230#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
231#define ICCR_NOCACHE 0 /* Noncacheable */
232#define ICCR_CACHE 1 /* Cacheable */
233#define SPRN_ICDBDR 0x3D3 /* Instruction Cache Debug Data Register */
234#define SPRN_ICMP 0x3D5 /* Instruction TLB Compare Register */
235#define SPRN_ICTC 0x3FB /* Instruction Cache Throttling Control Reg */
236#define SPRN_IMISS 0x3D4 /* Instruction TLB Miss Register */
237#define SPRN_IMMR 0x27E /* Internal Memory Map Register */
238#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */ 143#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */
239#define SPRN_LR 0x008 /* Link Register */ 144#define SPRN_LR 0x008 /* Link Register */
240#define SPRN_PBL1 0x3FC /* Protection Bound Lower 1 */
241#define SPRN_PBL2 0x3FE /* Protection Bound Lower 2 */
242#define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */
243#define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */
244#define SPRN_PID 0x3B1 /* Process ID */
245#define SPRN_PIR 0x3FF /* Processor Identification Register */ 145#define SPRN_PIR 0x3FF /* Processor Identification Register */
246#define SPRN_PIT 0x3DB /* Programmable Interval Timer */ 146#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
247#define SPRN_PURR 0x135 /* Processor Utilization of Resources Register */ 147#define SPRN_PURR 0x135 /* Processor Utilization of Resources Register */
@@ -249,9 +149,6 @@
249#define SPRN_RPA 0x3D6 /* Required Physical Address Register */ 149#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
250#define SPRN_SDA 0x3BF /* Sampled Data Address Register */ 150#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
251#define SPRN_SDR1 0x019 /* MMU Hash Base Register */ 151#define SPRN_SDR1 0x019 /* MMU Hash Base Register */
252#define SPRN_SGR 0x3B9 /* Storage Guarded Register */
253#define SGR_NORMAL 0
254#define SGR_GUARDED 1
255#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */ 152#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */
256#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */ 153#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */
257#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */ 154#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */
@@ -264,50 +161,12 @@
264#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, W/O) */ 161#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, W/O) */
265#define SPRN_TBWU 0x11D /* Time Base Write Upper Register (super, W/O) */ 162#define SPRN_TBWU 0x11D /* Time Base Write Upper Register (super, W/O) */
266#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */ 163#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */
267#define SPRN_TCR 0x3DA /* Timer Control Register */
268#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
269#define WP_2_17 0 /* 2^17 clocks */
270#define WP_2_21 1 /* 2^21 clocks */
271#define WP_2_25 2 /* 2^25 clocks */
272#define WP_2_29 3 /* 2^29 clocks */
273#define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */
274#define WRC_NONE 0 /* No reset will occur */
275#define WRC_CORE 1 /* Core reset will occur */
276#define WRC_CHIP 2 /* Chip reset will occur */
277#define WRC_SYSTEM 3 /* System reset will occur */
278#define TCR_WIE 0x08000000 /* WDT Interrupt Enable */
279#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */
280#define TCR_FP(x) (((x)&0x3)<<24) /* FIT Period */
281#define FP_2_9 0 /* 2^9 clocks */
282#define FP_2_13 1 /* 2^13 clocks */
283#define FP_2_17 2 /* 2^17 clocks */
284#define FP_2_21 3 /* 2^21 clocks */
285#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */
286#define TCR_ARE 0x00400000 /* Auto Reload Enable */
287#define SPRN_THRM1 0x3FC /* Thermal Management Register 1 */
288#define THRM1_TIN (1<<0)
289#define THRM1_TIV (1<<1)
290#define THRM1_THRES (0x7f<<2)
291#define THRM1_TID (1<<29)
292#define THRM1_TIE (1<<30)
293#define THRM1_V (1<<31)
294#define SPRN_THRM2 0x3FD /* Thermal Management Register 2 */
295#define SPRN_THRM3 0x3FE /* Thermal Management Register 3 */
296#define THRM3_E (1<<31)
297#define SPRN_TSR 0x3D8 /* Timer Status Register */
298#define TSR_ENW 0x80000000 /* Enable Next Watchdog */
299#define TSR_WIS 0x40000000 /* WDT Interrupt Status */
300#define TSR_WRS(x) (((x)&0x3)<<28) /* WDT Reset Status */
301#define WRS_NONE 0 /* No WDT reset occurred */
302#define WRS_CORE 1 /* WDT forced core reset */
303#define WRS_CHIP 2 /* WDT forced chip reset */
304#define WRS_SYSTEM 3 /* WDT forced system reset */
305#define TSR_PIS 0x08000000 /* PIT Interrupt Status */
306#define TSR_FIS 0x04000000 /* FIT Interrupt Status */
307#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */ 164#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */
308#define SPRN_XER 0x001 /* Fixed Point Exception Register */ 165#define SPRN_XER 0x001 /* Fixed Point Exception Register */
309#define SPRN_ZPR 0x3B0 /* Zone Protection Register */
310#define SPRN_VRSAVE 0x100 /* Vector save */ 166#define SPRN_VRSAVE 0x100 /* Vector save */
167#define SPRN_CTRLF 0x088
168#define SPRN_CTRLT 0x098
169#define CTRL_RUNLATCH 0x1
311 170
312/* Performance monitor SPRs */ 171/* Performance monitor SPRs */
313#define SPRN_SIAR 780 172#define SPRN_SIAR 780
@@ -352,28 +211,19 @@
352#define CTR SPRN_CTR /* Counter Register */ 211#define CTR SPRN_CTR /* Counter Register */
353#define DAR SPRN_DAR /* Data Address Register */ 212#define DAR SPRN_DAR /* Data Address Register */
354#define DABR SPRN_DABR /* Data Address Breakpoint Register */ 213#define DABR SPRN_DABR /* Data Address Breakpoint Register */
355#define DCMP SPRN_DCMP /* Data TLB Compare Register */
356#define DEC SPRN_DEC /* Decrement Register */ 214#define DEC SPRN_DEC /* Decrement Register */
357#define DMISS SPRN_DMISS /* Data TLB Miss Register */
358#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */ 215#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */
359#define EAR SPRN_EAR /* External Address Register */
360#define HASH1 SPRN_HASH1 /* Primary Hash Address Register */
361#define HASH2 SPRN_HASH2 /* Secondary Hash Address Register */
362#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */ 216#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */
363#define MSRDORM SPRN_MSRDORM /* MSR Dormant Register */ 217#define MSRDORM SPRN_MSRDORM /* MSR Dormant Register */
364#define NIADORM SPRN_NIADORM /* NIA Dormant Register */ 218#define NIADORM SPRN_NIADORM /* NIA Dormant Register */
365#define TSC SPRN_TSC /* Thread switch control */ 219#define TSC SPRN_TSC /* Thread switch control */
366#define TST SPRN_TST /* Thread switch timeout */ 220#define TST SPRN_TST /* Thread switch timeout */
367#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */ 221#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */
368#define ICMP SPRN_ICMP /* Instruction TLB Compare Register */
369#define IMISS SPRN_IMISS /* Instruction TLB Miss Register */
370#define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map Register */
371#define L2CR SPRN_L2CR /* PPC 750 L2 control register */ 222#define L2CR SPRN_L2CR /* PPC 750 L2 control register */
372#define __LR SPRN_LR 223#define __LR SPRN_LR
373#define PVR SPRN_PVR /* Processor Version */ 224#define PVR SPRN_PVR /* Processor Version */
374#define PIR SPRN_PIR /* Processor ID */ 225#define PIR SPRN_PIR /* Processor ID */
375#define PURR SPRN_PURR /* Processor Utilization of Resource Register */ 226#define PURR SPRN_PURR /* Processor Utilization of Resource Register */
376//#define RPA SPRN_RPA /* Required Physical Address Register */
377#define SDR1 SPRN_SDR1 /* MMU hash base register */ 227#define SDR1 SPRN_SDR1 /* MMU hash base register */
378#define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */ 228#define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */
379#define SPR1 SPRN_SPRG1 229#define SPR1 SPRN_SPRG1
@@ -389,10 +239,6 @@
389#define TBRU SPRN_TBRU /* Time Base Read Upper Register */ 239#define TBRU SPRN_TBRU /* Time Base Read Upper Register */
390#define TBWL SPRN_TBWL /* Time Base Write Lower Register */ 240#define TBWL SPRN_TBWL /* Time Base Write Lower Register */
391#define TBWU SPRN_TBWU /* Time Base Write Upper Register */ 241#define TBWU SPRN_TBWU /* Time Base Write Upper Register */
392#define ICTC 1019
393#define THRM1 SPRN_THRM1 /* Thermal Management Register 1 */
394#define THRM2 SPRN_THRM2 /* Thermal Management Register 2 */
395#define THRM3 SPRN_THRM3 /* Thermal Management Register 3 */
396#define XER SPRN_XER 242#define XER SPRN_XER
397 243
398/* Processor Version Register (PVR) field extraction */ 244/* Processor Version Register (PVR) field extraction */
@@ -436,12 +282,6 @@
436#define XGLUE(a,b) a##b 282#define XGLUE(a,b) a##b
437#define GLUE(a,b) XGLUE(a,b) 283#define GLUE(a,b) XGLUE(a,b)
438 284
439/* iSeries CTRL register (for runlatch) */
440
441#define CTRLT 0x098
442#define CTRLF 0x088
443#define RUNLATCH 0x0001
444
445#ifdef __ASSEMBLY__ 285#ifdef __ASSEMBLY__
446 286
447#define _GLOBAL(name) \ 287#define _GLOBAL(name) \
@@ -590,16 +430,6 @@ struct thread_struct {
590} 430}
591 431
592/* 432/*
593 * Note: the vm_start and vm_end fields here should *not*
594 * be in kernel space. (Could vm_end == vm_start perhaps?)
595 */
596#define IOREMAP_MMAP { &ioremap_mm, 0, 0x1000, NULL, \
597 PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \
598 1, NULL, NULL }
599
600extern struct mm_struct ioremap_mm;
601
602/*
603 * Return saved PC of a blocked thread. For now, this is the "user" PC 433 * Return saved PC of a blocked thread. For now, this is the "user" PC
604 */ 434 */
605#define thread_saved_pc(tsk) \ 435#define thread_saved_pc(tsk) \
@@ -656,6 +486,24 @@ static inline void prefetchw(const void *x)
656 486
657#define HAVE_ARCH_PICK_MMAP_LAYOUT 487#define HAVE_ARCH_PICK_MMAP_LAYOUT
658 488
489static inline void ppc64_runlatch_on(void)
490{
491 unsigned long ctrl;
492
493 ctrl = mfspr(SPRN_CTRLF);
494 ctrl |= CTRL_RUNLATCH;
495 mtspr(SPRN_CTRLT, ctrl);
496}
497
498static inline void ppc64_runlatch_off(void)
499{
500 unsigned long ctrl;
501
502 ctrl = mfspr(SPRN_CTRLF);
503 ctrl &= ~CTRL_RUNLATCH;
504 mtspr(SPRN_CTRLT, ctrl);
505}
506
659#endif /* __KERNEL__ */ 507#endif /* __KERNEL__ */
660 508
661#endif /* __ASSEMBLY__ */ 509#endif /* __ASSEMBLY__ */
diff --git a/include/asm-ppc64/prom.h b/include/asm-ppc64/prom.h
index 2440a2c90ae9..04b1a84f7ca3 100644
--- a/include/asm-ppc64/prom.h
+++ b/include/asm-ppc64/prom.h
@@ -147,9 +147,7 @@ struct device_node {
147 struct device_node *sibling; 147 struct device_node *sibling;
148 struct device_node *next; /* next device of same type */ 148 struct device_node *next; /* next device of same type */
149 struct device_node *allnext; /* next in list of all nodes */ 149 struct device_node *allnext; /* next in list of all nodes */
150 struct proc_dir_entry *pde; /* this node's proc directory */ 150 struct proc_dir_entry *pde; /* this node's proc directory */
151 struct proc_dir_entry *name_link; /* name symlink */
152 struct proc_dir_entry *addr_link; /* addr symlink */
153 struct kref kref; 151 struct kref kref;
154 unsigned long _flags; 152 unsigned long _flags;
155}; 153};
@@ -174,15 +172,6 @@ static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_e
174 dn->pde = de; 172 dn->pde = de;
175} 173}
176 174
177static void inline set_node_name_link(struct device_node *dn, struct proc_dir_entry *de)
178{
179 dn->name_link = de;
180}
181
182static void inline set_node_addr_link(struct device_node *dn, struct proc_dir_entry *de)
183{
184 dn->addr_link = de;
185}
186 175
187/* OBSOLETE: Old stlye node lookup */ 176/* OBSOLETE: Old stlye node lookup */
188extern struct device_node *find_devices(const char *name); 177extern struct device_node *find_devices(const char *name);
diff --git a/include/asm-ppc64/smp.h b/include/asm-ppc64/smp.h
index c8646fa999c2..8115ecb8feee 100644
--- a/include/asm-ppc64/smp.h
+++ b/include/asm-ppc64/smp.h
@@ -45,7 +45,7 @@ void generic_cpu_die(unsigned int cpu);
45void generic_mach_cpu_die(void); 45void generic_mach_cpu_die(void);
46#endif 46#endif
47 47
48#define __smp_processor_id() (get_paca()->paca_index) 48#define raw_smp_processor_id() (get_paca()->paca_index)
49#define hard_smp_processor_id() (get_paca()->hw_cpu_id) 49#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
50 50
51extern cpumask_t cpu_sibling_map[NR_CPUS]; 51extern cpumask_t cpu_sibling_map[NR_CPUS];
diff --git a/include/asm-ppc64/thread_info.h b/include/asm-ppc64/thread_info.h
index 037b5e06083c..48b7900e90ec 100644
--- a/include/asm-ppc64/thread_info.h
+++ b/include/asm-ppc64/thread_info.h
@@ -96,7 +96,7 @@ static inline struct thread_info *current_thread_info(void)
96#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling 96#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
97 TIF_NEED_RESCHED */ 97 TIF_NEED_RESCHED */
98#define TIF_32BIT 5 /* 32 bit binary */ 98#define TIF_32BIT 5 /* 32 bit binary */
99#define TIF_RUN_LIGHT 6 /* iSeries run light */ 99/* #define SPARE 6 */
100#define TIF_ABI_PENDING 7 /* 32/64 bit switch needed */ 100#define TIF_ABI_PENDING 7 /* 32/64 bit switch needed */
101#define TIF_SYSCALL_AUDIT 8 /* syscall auditing active */ 101#define TIF_SYSCALL_AUDIT 8 /* syscall auditing active */
102#define TIF_SINGLESTEP 9 /* singlestepping active */ 102#define TIF_SINGLESTEP 9 /* singlestepping active */
@@ -110,7 +110,7 @@ static inline struct thread_info *current_thread_info(void)
110#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 110#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
111#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 111#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
112#define _TIF_32BIT (1<<TIF_32BIT) 112#define _TIF_32BIT (1<<TIF_32BIT)
113#define _TIF_RUN_LIGHT (1<<TIF_RUN_LIGHT) 113/* #define _SPARE (1<<SPARE) */
114#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) 114#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
115#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) 115#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
116#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) 116#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 05:37:48 -0500