diff options
| author | Ingo Molnar <mingo@elte.hu> | 2008-07-18 13:31:12 -0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-18 13:31:12 -0400 |
| commit | 3e370b29d35fb01bfb92c2814d6f79bf6a2cb970 (patch) | |
| tree | 3b8fb467d60bfe6a34686f4abdc3a60050ba40a4 /include/asm-powerpc/sigcontext.h | |
| parent | 88d1dce3a74367291f65a757fbdcaf17f042f30c (diff) | |
| parent | 5b664cb235e97afbf34db9c4d77f08ebd725335e (diff) | |
Merge branch 'linus' into x86/pci-ioapic-boot-irq-quirks
Conflicts:
drivers/pci/quirks.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-powerpc/sigcontext.h')
| -rw-r--r-- | include/asm-powerpc/sigcontext.h | 37 |
1 files changed, 36 insertions, 1 deletions
diff --git a/include/asm-powerpc/sigcontext.h b/include/asm-powerpc/sigcontext.h index 165d630e1cf3..9c1f24fd5d11 100644 --- a/include/asm-powerpc/sigcontext.h +++ b/include/asm-powerpc/sigcontext.h | |||
| @@ -43,9 +43,44 @@ struct sigcontext { | |||
| 43 | * it must be copied via a vector register to/from storage) or as a word. | 43 | * it must be copied via a vector register to/from storage) or as a word. |
| 44 | * The entry with index 33 contains the vrsave as the first word (offset 0) | 44 | * The entry with index 33 contains the vrsave as the first word (offset 0) |
| 45 | * within the quadword. | 45 | * within the quadword. |
| 46 | * | ||
| 47 | * Part of the VSX data is stored here also by extending vmx_restore | ||
| 48 | * by an additional 32 double words. Architecturally the layout of | ||
| 49 | * the VSR registers and how they overlap on top of the legacy FPR and | ||
| 50 | * VR registers is shown below: | ||
| 51 | * | ||
| 52 | * VSR doubleword 0 VSR doubleword 1 | ||
| 53 | * ---------------------------------------------------------------- | ||
| 54 | * VSR[0] | FPR[0] | | | ||
| 55 | * ---------------------------------------------------------------- | ||
| 56 | * VSR[1] | FPR[1] | | | ||
| 57 | * ---------------------------------------------------------------- | ||
| 58 | * | ... | | | ||
| 59 | * | ... | | | ||
| 60 | * ---------------------------------------------------------------- | ||
| 61 | * VSR[30] | FPR[30] | | | ||
| 62 | * ---------------------------------------------------------------- | ||
| 63 | * VSR[31] | FPR[31] | | | ||
| 64 | * ---------------------------------------------------------------- | ||
| 65 | * VSR[32] | VR[0] | | ||
| 66 | * ---------------------------------------------------------------- | ||
| 67 | * VSR[33] | VR[1] | | ||
| 68 | * ---------------------------------------------------------------- | ||
| 69 | * | ... | | ||
| 70 | * | ... | | ||
| 71 | * ---------------------------------------------------------------- | ||
| 72 | * VSR[62] | VR[30] | | ||
| 73 | * ---------------------------------------------------------------- | ||
| 74 | * VSR[63] | VR[31] | | ||
| 75 | * ---------------------------------------------------------------- | ||
| 76 | * | ||
| 77 | * FPR/VSR 0-31 doubleword 0 is stored in fp_regs, and VMX/VSR 32-63 | ||
| 78 | * is stored at the start of vmx_reserve. vmx_reserve is extended for | ||
| 79 | * backwards compatility to store VSR 0-31 doubleword 1 after the VMX | ||
| 80 | * registers and vscr/vrsave. | ||
| 46 | */ | 81 | */ |
| 47 | elf_vrreg_t __user *v_regs; | 82 | elf_vrreg_t __user *v_regs; |
| 48 | long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1]; | 83 | long vmx_reserve[ELF_NVRREG+ELF_NVRREG+32+1]; |
| 49 | #endif | 84 | #endif |
| 50 | }; | 85 | }; |
| 51 | 86 | ||