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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-11-22 13:06:44 -0500
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-11-22 13:06:44 -0500
commit0bd2af46839ad6262d25714a6ec0365db9d6b98f (patch)
treedcced72d230d69fd0c5816ac6dd03ab84799a93e /include/asm-powerpc/reg.h
parente138a5d2356729b8752e88520cc1525fae9794ac (diff)
parentf26b90440cd74c78fe10c9bd5160809704a9627c (diff)
Merge ../scsi-rc-fixes-2.6
Diffstat (limited to 'include/asm-powerpc/reg.h')
-rw-r--r--include/asm-powerpc/reg.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 8fb96811b55d..6faae7b14d55 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -591,6 +591,7 @@
591#define PV_630 0x0040 591#define PV_630 0x0040
592#define PV_630p 0x0041 592#define PV_630p 0x0041
593#define PV_970MP 0x0044 593#define PV_970MP 0x0044
594#define PV_970GX 0x0045
594#define PV_BE 0x0070 595#define PV_BE 0x0070
595#define PV_PA6T 0x0090 596#define PV_PA6T 0x0090
596 597
@@ -618,10 +619,35 @@
618 : "=r" (rval)); rval;}) 619 : "=r" (rval)); rval;})
619#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) 620#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v))
620 621
622#ifdef __powerpc64__
623#ifdef CONFIG_PPC_CELL
624#define mftb() ({unsigned long rval; \
625 asm volatile( \
626 "90: mftb %0;\n" \
627 "97: cmpwi %0,0;\n" \
628 " beq- 90b;\n" \
629 "99:\n" \
630 ".section __ftr_fixup,\"a\"\n" \
631 ".align 3\n" \
632 "98:\n" \
633 " .llong %1\n" \
634 " .llong %1\n" \
635 " .llong 97b-98b\n" \
636 " .llong 99b-98b\n" \
637 ".previous" \
638 : "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;})
639#else
621#define mftb() ({unsigned long rval; \ 640#define mftb() ({unsigned long rval; \
622 asm volatile("mftb %0" : "=r" (rval)); rval;}) 641 asm volatile("mftb %0" : "=r" (rval)); rval;})
642#endif /* !CONFIG_PPC_CELL */
643
644#else /* __powerpc64__ */
645
623#define mftbl() ({unsigned long rval; \ 646#define mftbl() ({unsigned long rval; \
624 asm volatile("mftbl %0" : "=r" (rval)); rval;}) 647 asm volatile("mftbl %0" : "=r" (rval)); rval;})
648#define mftbu() ({unsigned long rval; \
649 asm volatile("mftbu %0" : "=r" (rval)); rval;})
650#endif /* !__powerpc64__ */
625 651
626#define mttbl(v) asm volatile("mttbl %0":: "r"(v)) 652#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
627#define mttbu(v) asm volatile("mttbu %0":: "r"(v)) 653#define mttbu(v) asm volatile("mttbu %0":: "r"(v))