diff options
author | Michael Neuling <mikey@neuling.org> | 2006-08-07 03:34:50 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-08-08 03:08:58 -0400 |
commit | 5cf13911b1e72707b6f0eb39b2d819ec6e343d76 (patch) | |
tree | cdbd2bc3d6f6e1b6fde2d6fcda43abe186db0313 /include/asm-powerpc/lppaca.h | |
parent | 2f6093c84730b4bad65bcd0f2f904a5769b1dfc5 (diff) |
[POWERPC] Update lppaca offset comments
Update offset comments. No functional change.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/lppaca.h')
-rw-r--r-- | include/asm-powerpc/lppaca.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-powerpc/lppaca.h b/include/asm-powerpc/lppaca.h index 942bb450baff..821ea0c512b4 100644 --- a/include/asm-powerpc/lppaca.h +++ b/include/asm-powerpc/lppaca.h | |||
@@ -116,7 +116,7 @@ struct lppaca { | |||
116 | 116 | ||
117 | 117 | ||
118 | //============================================================================= | 118 | //============================================================================= |
119 | // CACHE_LINE_3 0x0100 - 0x007F: This line is shared with other processors | 119 | // CACHE_LINE_3 0x0100 - 0x017F: This line is shared with other processors |
120 | //============================================================================= | 120 | //============================================================================= |
121 | // This is the yield_count. An "odd" value (low bit on) means that | 121 | // This is the yield_count. An "odd" value (low bit on) means that |
122 | // the processor is yielded (either because of an OS yield or a PLIC | 122 | // the processor is yielded (either because of an OS yield or a PLIC |
@@ -128,7 +128,7 @@ struct lppaca { | |||
128 | u8 reserved6[124]; // Reserved x04-x7F | 128 | u8 reserved6[124]; // Reserved x04-x7F |
129 | 129 | ||
130 | //============================================================================= | 130 | //============================================================================= |
131 | // CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data | 131 | // CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data |
132 | //============================================================================= | 132 | //============================================================================= |
133 | u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF | 133 | u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF |
134 | } __attribute__((__aligned__(0x400))); | 134 | } __attribute__((__aligned__(0x400))); |